CN1689146A - 半导体器件及其制造方法 - Google Patents

半导体器件及其制造方法 Download PDF

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Publication number
CN1689146A
CN1689146A CN03824140.4A CN03824140A CN1689146A CN 1689146 A CN1689146 A CN 1689146A CN 03824140 A CN03824140 A CN 03824140A CN 1689146 A CN1689146 A CN 1689146A
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dielectric film
film
semiconductor device
rare earth
earth metal
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CN03824140.4A
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CN1689146B (zh
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杉田义博
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Fujitsu Semiconductor Ltd
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Fujitsu Ltd
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    • H01L21/3165—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
    • H01L21/31654—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself
    • H01L21/31658—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe
    • H01L21/31662—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe of silicon in uncombined form

Abstract

在Si衬底(11)的表面形成p阱(12)，形成元件分离绝缘膜(13)。接着，在整个面上形成薄的SiO2膜(14a)，在其上作为绝缘膜(14b)形成含有稀土类金属(例如La、Y)和Al的氧化膜。而且，在绝缘膜(14b)上形成多晶硅膜(15)。然后，通过进行例如1000℃左右的热处理，使SiO2膜(14a)和绝缘膜(14b)进行反应，形成含有稀土类金属和Al的硅酸盐膜。即，将SiO2膜(14a)和绝缘膜(14b)成为单一的硅酸盐膜。

Description

半导体器件及其制造方法
技术领域
本发明涉及适合于MOSFET或电容器的电介质膜、其形成方法、具有该电介质膜的半导体器件及半导体器件的制造方法。
背景技术
作为用于MOSFET等的场效应晶体管的栅绝缘膜和电容器的电容绝缘膜的高介电常数绝缘膜，寻求介电常数高的绝缘膜来取代硅氧化膜(SiO2膜)及氮氧化硅膜(SiON膜)。
作为这样的高介电常数绝缘膜，正在进行与包含稀土类金属的绝缘膜有关的研究。但是，在将稀土类金属表示为M时，单纯组成的M2O3膜在热和化学性上是不稳定的，所以不能原封不动地使用。
因此，提出有具有多层氧化膜结构的MOSFET，该多层氧化膜结构为在硅衬底上设置与硅衬底之间的界面能级良好的薄的SiO2膜，且在其上形成高介电常数的金属氧化物膜。此外，作为这样的金属氧化物膜，还提出使用稀土类金属氧化物膜。
但是，在这样的多层氧化膜结构中，如果在低温中进行成膜，且在低温中进行试验，则可获得相应的结果，但不能适用于实际的半导体器件。
即，在制造包含有大量硅材料的电子器件时，特别是在形成金属布线以前，频繁地进行600℃～1050℃高温的热处理。因此，高介电常数绝缘膜也需要是能抗高温热处理的膜。但是，如果对上述那样的多层氧化膜结构进行高温热处理，则其特性在处理期间发生变化。其结果，例如产生界面能级的恶化和介电常数下降等问题。
专利文献1    日本专利特开2002-324901号公报
专利文献2    日本专利特开2002-184773号公报
专利文献3    日本专利特开2002-329847号公报
发明内容
本发明的目的在于提供耐高温性和介电常数高的电介质膜、其形成方法、具备该电介质膜的半导体器件及半导体器件的制造方法。
在与本发明相关的半导体器件中，设有第1和第2导电层，含有Si、稀土类金属、Al及O的电介质膜被所述第1及第2导电层夹持。
在与本发明相关的半导体器件的制造方法中，在第1导电层上，形成含有Si的第1绝缘膜。接着，在所述第1绝缘膜上，形成含有稀土类金属、Al及O的第2绝缘膜。然后，通过热处理使所述第1绝缘膜和第2绝缘膜进行反应，从而形成含有Si、稀土类金属、Al及O的电介质膜。
与本发明相关的电介质膜的特征在于含有Si、稀土类金属、Al及O。
在与本发明相关的电介质膜的形成方法中，形成含有Si的第1绝缘膜。接着，在所述第1绝缘膜上，形成含有稀土类金属、Al及O的第2绝缘膜。然后，通过热处理使所述第1绝缘膜和所述第2绝缘膜进行反应而使所述第1绝缘膜和所述第2绝缘膜形成为单一的膜。
附图说明
图1是表示用红外吸收法来评价在Si衬底上通过自然氧化膜而形成的La2O3膜的热处理造成的变化的结果的曲线图。
图2是表示在图1所示的评价中使用的各膜的X线衍射频谱的曲线图。
图3是表示用红外吸收法来评价在Si衬底上通过自然氧化膜而形成的铝酸钇膜的热处理造成的变化的结果的曲线图。
图4是表示在图3所示的评价中使用的各膜的X线衍射频谱的曲线图。
图5是表示YxAlyOz的膜厚为6nm时获得的X线衍射频谱的曲线图。
图6是表示不含有Al的Y2O3膜(厚度：41nm)的X线衍射频谱的曲线图。
图7A和图7B是按工序顺序表示与本发明第1实施方式相关的半导体器件的制造方法的剖视图。
图8是表示根据第1实施方式实际制作的MOSFET的高频CV特性的曲线图。
图9A和图9B是按工序顺序表示与本发明第1实施方式相关的半导体器件的制造方法的剖视图。
图10是表示深度和SIMS强度的关系的曲线图。
图11A至图11D是按工序顺序表示采用本发明来制造MOSFET的方法的剖视图。
图12A至图12C是按工序顺序表示采用了本发明来制造电容器的方法的剖视图。
图13是表示分批式装置的模式图。
图14是表示片叶式装置的模式图。
具体实施方式
本发明人在对以往的多层氧化膜结构中特性因高温热处理而发生变化的原因进行调查时，发现硅氧化膜和稀土类金属氧化物膜发生反应的情况。
图1是表示用红外吸收法(FTIR)评价在Si衬底上通过自然氧化膜而形成的La2O3膜的热处理造成的变化的结果的曲线图。La2O3是代表性的稀土类氧化物。图1所示的结果是在500℃下形成La2O3膜时的结果。实线表示形成后未实施热处理的试料的结果，虚线表示形成后在800℃下实施10分钟的热处理的试料的结果，点划线表示在900℃下实施10分钟的热处理的试料的结果，双点划线表示在1000℃下实施10分钟的热处理的试料的结果。再有，自然氧化膜的厚度为1nm左右，La2O3膜的厚度为40nm。
如图1所示，在热处理前，表示自然氧化膜的存在的SiO2的峰值显著。但是，仅通过800℃的热处理该峰值就完全消失，La的硅酸盐(silicate)的峰值变得显著。该硅酸盐是二氧化硅(SiO2)和La2O3的复合氧化物。
图2是表示图1所示的评价中使用的各膜的X线衍射频谱的曲线图。如图2所示，在热处理前，表示La2O3的存在的峰值(2θ＝21.89、25.94)显著。但是，在800℃或其以上的热处理后，这些峰值消失，表示热力学上稳定的硅酸盐结晶(La2SiO5)的存在的峰值(2θ＝27.28、30.11等)变得显著。
从如图1和图2所示的结果可知，在采用了La2O3膜的多层氧化膜结构中，通过高温热处理，自然氧化膜和La2O3膜进行反应。此外，由于La2O3膜的厚度为40nm，所以只有自然氧化膜中的Si，Si不足。即，在La2SiO5中，需要1/2的La原子的数目的Si原子，但在自然氧化膜中不存在足够的Si原子。因此，从Si衬底中补充Si的不足部分。
另一方面，在一般的半导体器件的制造方法中，在MOS晶体管被层间绝缘膜等覆盖的状态下，进行各种高温的热处理。因此，不从外部补充氧，在生成的La2SiO5膜中，氧不足，从而导致膜的介电常数会大幅度地下降。
此外，随着自然氧化膜的消失，界面特性(界面能级)也会大幅度地劣化。
这样，为了稳定地制造包括MOSFET的半导体器件，该MOSFET具有SiO2膜和稀土类金属氧化物膜的多层氧化膜结构的栅绝缘膜，在形成栅绝缘膜后，只能够进行500℃～600℃或其以下的低温处理。与此相对，为了制造目前的包括具有由多晶硅构成的栅电极的MOSFET的半导体器件，需要频繁地进行800℃或其以上的热处理。即，以往的多层氧化膜结构的栅绝缘膜不能适用于具有由多晶硅构成的栅电极的MOSFET。
因此，本申请发明人考虑到这样的实验结果等后，在栅绝缘膜(电介质膜)中，为了获得高的介电常数，同时获得优良的耐高温性，而深入研究的结果，发现以下事实：作为栅绝缘膜，采用不仅含有稀土类金属，而且含有Al的硅氧化膜，由此可以获得非常高的介电常数，而且可以防止界面特性的劣化。而且，还发现含有这样的稀土类金属和Al的硅氧化膜还适合作为电容器的电容绝缘膜。
图3是表示用红外吸收法(FTIR)评价在Si衬底上通过自然氧化膜而形成的铝酸钇(YxAlyOz)膜(厚度：42nm)的热处理造成的变化的结果的曲线图。其中，Al原子数目是Y原子数目的1/2。图3所示的结果，是在500℃下形成YxAlyOz膜时的结果。与图1同样，实线表示形成后未实施热处理的试料的结果，虚线表示形成后在800℃下实施10分钟的热处理的试料的结果，点划线表示在900℃下实施10分钟的热处理的试料的结果，双点划线表示在1000℃下实施10分钟的热处理的试料的结果。
如图3所示，在热处理前，表示自然氧化膜的存在的SiO2的峰值显著。但是，仅仅通过800℃的热处理该峰值减小，通过900℃的热处理则完全消失，而硅酸盐的峰值变得显著。这种硅酸盐是二氧化硅(SiO2)和YxAlyOz的复合氧化物。此外，无论是哪个温度，都显现出表示稀土类金属的铝酸盐(Alminate)的YxAlyOz的存在的峰值。
图4是表示图3所示的评价中使用的各膜的X线衍射频谱的曲线图。此外，图5是表示YxAlyOz的膜厚为6nm时获得的X线衍射频谱的曲线图。
如图4和图5所示，与膜厚无关地，在热处理前，不存在显著的峰值，形成的铝酸钇膜为非晶质状态。这种状态在进行800℃的热处理后也被维持。然后，如果进行900℃或其以上的热处理，则含有百分之几的硅的YxAlyOz结晶化。
为了参考，图6中示出不含有Al的Y2O3膜(厚度：41nm)的X线衍射频谱。如图6所示，在Y2O3膜中，在500℃下成膜的状态中，已经被结晶化。因此，若对图4及图5和图6进行比较可知那样，通过含有Al，结晶化被抑制。这样的内部中不存在粒界的非晶质膜非常适合于电容器的电容绝缘膜。
以下，参照附图来具体地说明基于这些认识而成的本发明的实施方式。
(第1实施方式)
首先，说明本发明的第1实施方式。但是，在这里，为了方便起见，对于半导体器件的一部分结构，与其形成方法同时进行说明。图7A和图7B是按工序顺序表示与本发明第1实施方式相关的半导体器件的制造方法的剖视图。
在第1实施方式中，首先，如图7A所示，在Si衬底1上形成SiO2膜2。SiO2膜2的厚度例如为1nm左右。这里，作为SiO2膜2，也可以原封不动地使用自然氧化膜。接着，在SiO2膜2上作为含有稀土类金属和Al的氧化膜，形成绝缘膜3。绝缘膜3的厚度例如为3nm左右。然后，在绝缘膜3上形成多晶硅膜4。
接着，对于这些叠层体，例如在氧化气氛中实施700℃或其以上的热处理。其结果，如图7B所示，SiO2膜2和绝缘膜3进行反应，形成含有稀土类金属及Al的绝缘性的硅酸盐膜(电介质膜)6。该硅酸盐膜6不是以往所提出的多层结构的绝缘膜，而是四元类或其以上的多元类的单层膜。
然后，通过将多晶硅膜4构图为栅电极的平面形状，可以形成将硅酸盐膜6作为栅绝缘膜的MOSFET。
进而，形成杂质扩散层和层间绝缘膜，而完成半导体器件。
在这样的第1实施方式中，SiO2膜2和绝缘膜3进行反应而形成硅酸盐膜6，但由于在绝缘膜3中含有Al，所以从Si衬底1的Si的取入量非常低。即，在硅酸盐膜6中几乎没有Si进入的余地。因此，可以避免介电常数的下降。此外，还可防止界面能级的劣化。
再有，在第1实施方式中，通过SiO2膜2的厚度、绝缘膜3的厚度和绝缘膜3的组成，可以对硅酸盐膜6的组成和从Si衬底1的Si取入量进行控制。
图8是表示根据第1实施方式实际制作的MOSFET的高频CV特性的曲线图。图8所示的结果是使用表面的表面方位为(100)的Si衬底1，在其上形成自然氧化膜的状态下，形成厚度为6nm的绝缘膜3，作为栅电极形成了Pt电极时所获得的结果。再有，热处理温度是1000℃，在绝缘膜3中作为稀土类金属含有Y。
如图8所示，尽管进行了1000℃的高温热处理，但仍可获得高介电常数和良好的高频CV特性。即，几乎不发生滞后现象，漏电流的增加也小。因而，没有因热处理而造成介电常数下降，表示对从Si衬底被取入到硅酸盐膜的Si的量被限制得很适当。即，根据第1实施方式，可以根据SiO2膜2的厚度等来控制多元类的组成，同时形成具有良好的绝缘特性的高介电常数薄膜。
(第2实施方式)
下面，说明本发明的第2实施方式。但是，在这里，为了方便起见，对于半导体器件的一部分结构，与其形成方法同时进行说明。图9A和图9B是按工序顺序表示与本发明第1实施方式相关的半导体器件的制造方法的剖视图。
在第2实施方式中，首先，如图9A所示，在Si衬底1上形成绝缘膜2。绝缘膜2的厚度例如为1nm左右。这里，作为绝缘膜2，可以原封不动地使用自然氧化膜，也可以形成SiO2膜、SiN膜或SiON膜。接着，在绝缘膜2上作为含有稀土类金属和Al的氧化膜，形成绝缘膜3。绝缘膜3的厚度例如为6nm左右。然后在绝缘膜3上形成氮化硅膜(SiNx膜)5，在其上形成多晶硅膜4。
接着，对于这些叠层体，例如在氧化气氛中实施700℃或其以上的热处理。其结果，如图9B所示，绝缘膜2和绝缘膜3及氮化硅膜5进行反应，形成含有稀土类金属、Al和N的绝缘性的硅酸盐膜(电介质膜)7。该硅酸盐膜7不是以往所提出的多层结构的绝缘膜，而是五元类或其以上的多元类单层膜。
根据这样的第2实施方式，也可获得与第1实施方式同样的效果。此外，硅酸盐膜7的结晶化因N的存在而被抑制，硅酸盐膜7处于非晶质状态。因此，可以进一步抑制漏电流。
图10是表示深度和SIMS(二次离子质量分析)强度的关系的曲线图。图10所示的曲线是对于在Y2O3膜和Si衬底之间设置有氮化硅膜的试料，在1000℃下进行10分钟的热处理后得到的曲线。
如图10所示，在浅的部分，即Y2O3膜和氮化硅膜进行反应所生成的硅酸盐膜中，N以大致一定的浓度存在。在图10所示的实验中使用的试料中，形成有不含Al的稀土类金属氧化物膜，但被认为如第2实施方式那样，在形成有含有Al的稀土类金属氧化物膜的情况下，也可获得同样的结果。因而，该结果表示在Si衬底和稀土类金属氧化物膜之间，以合适的浓度含有N的膜，例如以合适的厚度形成SiN膜或SiON膜，并进行热处理，由此可以获得以要求的浓度大致均匀地含有N的硅酸盐膜。此外，这样的硅酸盐膜为非晶质，粒界不存在。即，不存在漏电流的路径，漏电流被抑制。
再有，在第2实施方式中，由于在绝缘膜3和多晶硅膜4之间形成有氮化硅膜5，所以氮化硅膜5还成为向硅酸盐膜7的N的供给源。因此，在第2实施方式中，通过绝缘膜2的厚度、绝缘膜3的厚度、绝缘膜3的组成及氮化硅膜5的厚度，可以对硅酸盐膜7的组成和从Si衬底1的Si取入量进行控制。
此外，在第1及第2实施方式中，在形成了多晶硅膜4后进行热处理，但也可以在形成多晶硅膜4前进行。
而且，在第1及第2实施方式中，将绝缘膜3和多晶硅膜4(氮化硅膜5)进行反应时的气氛作为氧化性气氛。这是因为从Si衬底1可能有若干Si的取入，所以为了此时硅酸盐膜6和7不能出现氧不足的情况。
下面，说明采用了第1实施方式的MOSFET的制造方法和电容器的制造方法。
在制造MOSFET时，首先，如图11A所示，在Si衬底11的表面上形成p阱12，且形成元件分离绝缘膜13。接着，在整个面上形成SiO2膜14a，并在其上作为绝缘膜14b形成含有稀土类金属(例如La、Y)和Al的氧化膜。进而，在绝缘膜14b上形成多晶硅膜15。再有，作为SiO2膜14a，也可以使用自然氧化膜。
然后，例如进行1000℃左右的热处理，从而使SiO2膜14a和绝缘膜14b进行反应，如图11B所示，形成含有稀土类金属和Al的硅酸盐膜14。即，将SiO2膜14a和绝缘膜14b作为单一的硅酸盐膜14。接着，将多晶硅膜15和硅酸盐膜14构图为栅电极的平面形状。接着，通过进行N型杂质、例如P的离子注入，形成低浓度扩散层16。
接着，如图11C所示，在栅电极(多晶硅膜15)的侧方形成侧壁绝缘膜7。然后，通过以比低浓度扩散层16形成时高的剂量来进行N型杂质的离子注入，形成源极扩散层18和漏极扩散层19。
接着，如图11D所示，在源极扩散层18、漏极扩散层19和栅电极(多晶硅膜15)的表面上，分别形成硅化钴层20、21、22。
然后，虽未图示，但进行层间绝缘膜的形成和布线的形成等。
此外，在制造电容器时，首先，如图12A所示，在Si衬底31的表面上形成N+层32，且在整个面上形成层间绝缘膜33。接着，在层间绝缘膜33上形成直至N+层32的接触孔。接着，在层间绝缘膜33上形成通过接触孔接合到N+层32的下部电极34。下部电极34例如由多晶硅膜形成。
然后，如图12B所示，在整个面上形成薄的SiO2膜35a，且在其上作为绝缘膜35b形成含有稀土类金属(例如La、Y)和Al的氧化膜。
然后，如图12C所示，在硅酸盐膜35上形成上部电极36。接着，例如通过进行800℃左右的热处理，使SiO2膜35a和绝缘膜35b进行反应，而形成含有稀土类金属和Al的硅酸盐膜35。即，SiO2膜35a和绝缘膜35b作为单一的硅酸盐膜35。
然后，虽未图示，但进行层间绝缘膜的形成和布线的形成等。
再有，在这些MOSFET的制造方法和电容器的制造方法中，也可以用第2实施方式取代第1实施方式。
下面，说明Al的含量。在以往的多层结构绝缘膜中，通过采用普通的Si的器件的制造中所需的高温热处理，有可能导致在稀土类金属氧化膜中取入稀土类金属原子的1/2左右数目的Si原子。与此相对，如上所述，使稀土类金属氧化膜中预先含有Al，进行铝酸盐氧化(Alminate)，从而可以控制在热处理中被取入到稀土类金属氧化膜中的Si的量。但是，在稀土类金属氧化膜中所含有的Al原子的数目比稀土类金属原子多的情况下，与自然氧化膜等的稀土类金属氧化膜和Si衬底之间存在的介电常数低的绝缘膜的反应不充分，残存介电常数低的绝缘膜，难以获得高的介电常数。因此，Al原子的数目最好比稀土类金属原子的数目少。相反地，如果Al原子的数目比稀土类金属原子的数目的1/2少，则从Si衬底取入的Si的量增多。因此，Al原子的数目最好大于等于稀土类金属原子的数目的1/2。因而，通过使用这样组成的稀土类金属氧化膜，可以抑制低介电常数层的生成，获得单层的多元类复合氧化膜。
再有，作为稀土类金属，也可以采用Y、La、Ce、Pr、Nd、Sm、Eu、Gd、Tb、Dy、Ho、Er、Tm、Yb、Lu的其中之一。
这里，说明适用于形成含有稀土类金属、例如Y和Al的硅氧化膜的装置。图13是表示分批式的装置的模式图，图14是表示片叶式的装置的模式图。
如图13所示，在分批式的装置中，设置有容纳多片Si晶片(Si衬底)51的成膜室52，在其周围配置有加热器53。在成膜室52中，连接有O2的供给配管、TMA(三甲基铝)用的供给配管和Y(DPM)3(三(二叔戊酰甲烷)钇)用的供给配管。作为Y(DPM)3的溶剂，例如使用THF(四氢呋喃)。在O2的供给配管中，设置有O2用的质量流控制器(MFC)54和N2用的MFC55。在TMA用的供给配管中，设置有气化器56、TMA用的液体MFC57和N2用的MFC58。在Y(DPM)3用的供给配管中，设置有气化器59、Y(DPM)3用的液体MFC60和N2用的MFC61。
如图14所示，在片叶式的装置中，设置有容纳一片Si晶片51的成膜室62，在成膜室62内设置有加热Si晶片51的加热器63、以及喷淋头64。而且，与分批式的装置同样的三根配管连接到喷淋头64。
这些装置中使用的Y(DPM)3的浓度例如为0.01～0.05mol/升左右，气化器59的温度例如为200～250℃，Y(DPM)3的流量例如为1mm3/分。此外，在TMA的供给时，例如不使用溶剂而以液体本身的状态进行供给，其流量为1mm3/分，气化器56的温度例如为80℃。而且，O2的流量例如为100～1000sccm。而且，例如，成膜室52或62的压力为66.7～667Pa(0.5～5.0Torr)，成膜温度为400～650℃，进行成膜。
作为含有稀土类金属和Al的硅氧化膜，在形成LaxAlyOx的情况下，也可以使用La(DPM)3(三(二叔戊酰甲烷)镧)来取代Y(DPM)3。
再有，含有Si、稀土类金属、Al及O的绝缘膜不仅可通过上述两个膜的反应来形成，例如也可以用化学气相生长法(CVD法)等来形成。
工业实用性
如上所述那样，根据本发明，在含有稀土类金属的硅酸盐膜中，还含有Al，所以能够比较容易地控制其组成，可以容易地形成耐高温性和介电常数高的电介质膜。因此，即使在采用了多晶硅的半导体器件的制造中，也可以如以往那样进行高温热处理，可以获得高性能的半导体器件。

Claims (23)

1.一种半导体器件，其特征在于包括：
第1和第2导电层；
由所述第1和第2导电层所夹持、且含有Si、稀土类金属、Al和O的电介质膜。
2.如权利要求1所述的半导体器件，其特征在于，所述电介质膜还含有N。
3.如权利要求1所述的半导体器件，其特征在于，
所述第1导电层是形成于半导体衬底的表面的沟道，
所述第2导电层是栅电极。
4.如权利要求1所述的半导体器件，其特征在于，
所述第1导电层是电容器的一个电极，
所述第2导电层是所述电容器的另一个电极。
5.如权利要求1所述的半导体器件，其特征在于，
所述电介质膜中的Al原子数目少于稀土类金属的原子数目。
6.如权利要求5所述的半导体器件，其特征在于，
所述电介质膜中的Al原子数目大于等于稀土类金属的原子数目的1/2。
7.如权利要求1所述的半导体器件，其特征在于，
所述电介质膜是非晶质。
8.一种半导体器件的制造方法，其特征在于包括：
在第1导电层上形成含有Si的第1绝缘膜的工序；
在所述第1绝缘膜上形成含有稀土类金属、Al和O的第2绝缘膜的工序；
通过热处理使所述第1绝缘膜和所述第2绝缘膜进行反应，从而形成含有Si、稀土类金属、Al和O的电介质膜的工序。
9.如权利要求8所述的半导体器件的制造方法，其特征在于，
具有在所述电介质膜上形成第2导电层的工序。
10.如权利要求8所述的半导体器件的制造方法，其特征在于，
在形成所述电介质膜的工序之前，具有在所述第2绝缘膜上形成第2导电层的工序。
11.如权利要求8所述的半导体器件的制造方法，其特征在于，
所述第1绝缘膜是从硅氧化膜、氮化硅膜和氮氧化硅膜构成的组中选择的一种。
12.如权利要求8所述的半导体器件的制造方法，其特征在于，
在形成所述电介质膜的工序之前，具有在所述第2绝缘膜上形成含有Si和N的第3绝缘膜的工序，
在形成所述电介质膜的工序中，使所述第1绝缘膜和所述第2绝缘膜及所述第3绝缘膜进行反应。
13.如权利要求8所述的半导体器件的制造方法，其特征在于，
使所述第2绝缘膜中的Al原子数目少于稀土类金属的原子数目。
14.如权利要求13所述的半导体器件的制造方法，其特征在于，
使所述第2绝缘膜中的Al原子数目大于等于稀土类金属的原子数目的1/2。
15.如权利要求8所述的半导体器件的制造方法，其特征在于，在形成所述电介质膜的工序中，形成非晶质的膜。
16.一种半导体器件的制造方法，其特征在于包括：
在第1导电层上，通过化学气相生长法而形成含有Si、稀土类金属、Al和O的电介质膜的工序；
在所述电介质膜上形成第2导电层的工序。
17.一种电介质膜，其特征在于，其含有Si、稀土类金属、Al和O。
18.如权利要求17所述的电介质膜，其特征在于，其还含有N。
19.一种电介质膜的形成方法，其特征在于包括：
形成含有Si的第1绝缘膜的工序；
在所述第1绝缘膜上，形成含有稀土类金属、Al和O的第2绝缘膜的工序；
通过热处理使所述第1绝缘膜和所述第2绝缘膜进行反应，并使所述第1绝缘膜和所述第2绝缘膜成为单一膜的工序。
20.如权利要求19所述的电介质膜的形成方法，其特征在于，所述第1绝缘膜是从硅氧化膜、氮化硅膜和氮氧化硅膜构成的组中选择的一种。
21.如权利要求19所述的电介质膜的形成方法，其特征在于，
在使所述第1绝缘膜和所述第2绝缘膜成为单一膜的工序之前，具有在所述第2绝缘膜上形成含有Si和N的第3绝缘膜的工序，
在所述成为单一膜的工序中，使所述第1绝缘膜和所述第2绝缘膜及所述第3绝缘膜进行反应。
22.如权利要求19所述的电介质膜的形成方法，其特征在于，
使所述第2绝缘膜中的Al原子数目少于稀土类金属的原子数目。
23.如权利要求22所述的电介质膜的形成方法，其特征在于，
使所述第2绝缘膜中的Al原子数目大于等于稀土类金属的原子数目的1/2。
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