CN1682432A - 压控lc谐振电路振荡器 - Google Patents
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Abstract
压控振荡器包含一个耦合到调制器装置(2)的LC振荡电路(L、C、R),并且其特征在于该调制器装置(2)经由加法器(3)被耦合到放大器装置(1),用于产生正交周期输出信号,该正交周期输出信号具有相对宽的范围内的频率,该频率通过被提供给调制器装置(2)的控制信号(VT)来控制。
Description
技术领域
本发明涉及一种压控振荡器,其包含一个耦合到调制器装置的LC谐振电路。本发明还涉及一种包含这种振荡器的锁相环。
背景技术
在大频率范围内产生无线和光学收发机的正交信号的需求来自无线接收机的低IF/零IF结构和光学接收机的低IF/零IF结构。为了利用相同的振荡器覆盖不同的标准,振荡器应能够在大频率范围上调谐。当可能进行倍频程(octave)调谐时,基于两个D触发器的简单的分频器可被使用并且任何低于VCO的振荡频率的频率可被合成。这大大简化划分器结构并降低了功率消耗。通常,支付价格是RC振荡器的需求,因为RC振荡器能够在宽范围中调谐。LC振荡器具有比RC振荡器更好的相位噪声,但是LC振荡器只能在更小的范围中调谐。现有技术的具有大调谐范围的LC振荡器基于两个LC谐振电路或者一个环形结构,所述两个LC谐振电路具有在二者之间的内插机制或一环形结构,该环形结构可被看作是RC和LC振荡器的组合。最新的结构提供振荡频率处的正交输出,但是该正交输出不能够在宽频率范围中、例如至少一个倍频程中调谐。
US-A-6,198,360公开了一种在LC或环形振荡器中使用的电路和方法。振荡器的振荡频率可通过检测正交信号以及控制正交信号的符号和幅度来被调制,该正交信号可被反馈到振荡器以引起该振荡器比未调制的振荡器更快地运行或者更慢地运行(取决于二次信号的符号)。该电路包含晶体管的交叉耦合对,用于实现产生频率所必需的负阻抗。LC电路确定振荡频率。两个电容C1、C2和两个电阻R1、R2被提供用于获得针对振荡的正交振荡。观察到,差分电压VCONN、VCONP控制振荡频率。进一步观察到,该振荡包括LC振荡器的组合,该LC振荡器具有包含RC组件的反馈控制环,该RC组件增加振荡器的相位噪声,并且因为RC组件对产生正交输出信号是必需的,因此相位噪声无法被减少。
发明内容
因此本发明的目的在于,提出一种具有相对宽的振荡范围和相对低的相位噪声的压控振荡器。
根据本发明,这在一种如介绍性段落中所描述的振荡器中实现,该振荡器的特征在于调制器装置经由加法器被耦合到放大器装置,用于产生具有相对宽范围频率的正交周期输出信号,该频率通过提供给该调制器装置的控制信号来控制。LC谐振电路具有确定振荡器振荡频率的谐振频率,该振荡器的振荡频率通过修改LC谐振电路中的电容和/或通过提供给调制器的控制信号来修改。LC谐振电路包含与电容器并联的电阻器和电感器。当相对高的振荡频率、例如GHz被产生时,电感器具有相对高的品质因数,而电阻器上的电压与LC谐振电路上的电压正交,因此振荡器产生正交信号。经由加法器获得的反馈信号被用于维持振荡器的振荡。
在本发明的实施例中,调制器装置包含缓冲器和调制器的串联耦合。缓冲器通常有相对高的输入阻抗并因此将LC谐振电路与调制器隔离。因此,混频器不影响LC谐振电路的品质因数,因此也不影响其谐振频率。
在本发明的另一个实施例中,放大器装置包含另一个缓冲器和放大器的串联耦合。只要可能,相对高输入阻抗的缓冲器被提供用于更好地将LC谐振电路与该电路的剩余部分隔离。因此,LC谐振电路和放大器装置在电压和电流方面均工作在更舒适的条件下。当相对高的频率被产生时,放大器可为跨导放大器。跨导放大器放大电压型输入信号并产生电流型输出信号。电流型信号非常适合被用在相对高的频率系统中,因此跨导放大器可被用于产生相对高频率的信号。
在本发明的一个实施例中,放大器装置是跨导放大器,调制器装置是吉尔伯特单元调制器(Gilbert cell modulator)而加法器是一个节点。在这个电流模式装置中,加法器具有最简单的结构、即节点,而振荡器可实现为最小数量的无源组件、即电阻器、电容器、电感器和有源组件、即晶体管、放大器。因此,当被集成在相同的芯片中时,电路占据相对减少的面积。
因为振荡器具有相对大的调谐范围,所以该振荡器可被用在许多应用中。在一个优选的实施例中,根据本发明的振荡器被用在具有大调谐范围的TV调谐器中。现代调谐器通常包含锁相环,该锁相环具有可被用于锁定在所调谐频率上的压控振荡器。为了覆盖宽频率范围输入信号,宽范围压控振荡器是必需的,因此根据本发明的振荡器可被使用。
附图说明
本发明的上述和其他特征和优点从下列参考附图的本发明的示例性实施例的描述中将是显而易见的,其中:
图1描绘根据本发明的LC电压振荡器的框图,
图2根据本发明描绘LC振荡器的更详细的框图,
图3根据本发明的实施例描绘LC谐振电路的电路,
图4描绘根据本发明的LC振荡器的等效开环电路,
图5描绘根据本发明的发明的晶体管级实现,以及
图6描绘根据本发明的TV调谐器的锁相环。
具体实施方式
图1描绘根据本发明的压控LC振荡器的框图。该压控振荡器包含耦合到调制器装置2的LC谐振电路L、C、R。调制器装置2经由加法器3被耦合到放大器装置1,用于产生具有相对宽范围频率的正交周期输出信号,该频率通过被提供给调制器装置2的控制信号VT来控制。LC谐振电路具有确定振荡器振荡频率的谐振频率,该振荡器的振荡频率通过修改LC振荡电路中的电容和/或通过被提供给调制器装置2的控制信号VT来被修改。LC谐振电路包含与电容器C并联耦合的电感器L和电阻器R的串联连接。当相对高的振荡频率、例如GHz被产生时,电感器L具有相对高的品质因数,而电阻器VR上的电压与LC谐振电路VO上的电压正交,因此振荡器产生正交信号。经由加法器获得的反馈信号被用于维持振荡器的振荡。
调制器装置2可包含缓冲器20和调制器21的串联耦合,如图2中所示。缓冲器20通常具有相对高的输入阻抗,并且因此将LC谐振电路与调制器21隔离。因此,调制器21不影响LC谐振电路的品质因数,因此也不影响其谐振频率。调制器是吉尔伯特型调制器。吉尔伯特型调制器被频繁用于频率调制系统中。基本上,吉尔伯特型调制器输出信号是电流,并且因此调制器适于用在电流型信号易于被使用的相对高频率的系统中。只要可能,相对高的输入阻抗缓冲器20被提供来更好地将LC谐振电路与电路的剩余部分隔离。因此,LC谐振电路和调制器2在电流和电压方面均工作在更舒适的条件下。当相对高的频率被产生时,放大器11可为跨导放大器。跨导放大器放大电压型输入信号并产生电流型输出信号。电流型信号非常适于被用在相对高频率的系统中,并且因此跨导放大器可被用于产生高频信号。在图2中,考虑放大器11是跨导放大器而调制器21是吉尔伯特调制器。因此,加法器3是节点,并且该振荡器具有相对简单的结构。
LC谐振电路可被模型化,如图3中所示。在图3中,反馈电流被标示为I。做出下列符号表示:
Z1=sL+R
其中s是复数频率。
假设表达式VR与VO:
下面给出两个支路电流I1和I2:
其遵循:
当电感器L的品质因数远远大于1时,Z1可近似为Z1=R+jωL≈jωL,意味着:
R<<ωL
以及因此,
其中QL是电感器L的品质因数。
在相对高频率系统、也就是GHz的实际情况中,电感器L的品质因数远远大于1,所以这种近似是有效的,导致电阻器R上的电压为:
总之,电压VR与VO正交。这可利用增益等于1/Q的级和相移等于
的移相器来模型化,如图4所示。使用该图,我们可计算开环增益、振荡频率和振荡器的振荡条件。
以及
振荡器的开环增益变为:
或者
振荡条件为Aβ=-1。这意味着|Aβ|=1和(Aβ)=π。现在可计算开环传递的相位(Aβ)和所维持的振荡的相位条件:
这产生下列条件:
该等式被降为二阶等式:
LCQGω2+kVTLGpω-GQ=0
当X远远小于1时,可近似
其中
而Q远远大于1。
在上述表达式中,VT对于振荡频率ω0具有比LC谐振电路的电容更大的影响。因此,VT可被用于粗调谐,而LC谐振电路上并联的变容二极管用于精调谐。这个电路可被用在大调谐范围的应用中。当调谐范围为一个倍频程、也就是从频率f0到频率2f0时,串联电阻器R可具有10欧姆的阻抗。正交输出VO和VR被缓冲和放大,以便产生足够的功率以驱动下一级。
图5描绘根据本发明的发明的晶体管级实现。图5中示出的电路的CMOS实现也是可能的,而且本领域的技术人员可容易实现该电路。参考图5,LC谐振电路被差分连接到该电路的有源部分。晶体管Q7、Q8为差分缓冲器20,而晶体管Q9、Q10为缓冲器10。它们被用来降低具有有源部分、调制器21和该电路的放大器11的LC谐振电路的负载效应。晶体管Q11、Q12和电流源IT表示跨导放大器11。其以对应于图1所示电路的正反馈方式来连接。调制器21利用晶体管Q1、Q2、Q3、Q4、Q5和Q6来实现。粗调谐端C利用VT+和VT-来表示。
图6描绘根据本发明的TV调谐器的锁相环。大调谐范围VCO也在PLL电路中使用,其中正交输出不总是被需要的。然而,在零IF和低IF应用中,正交输出是强制性的。在低IF结构中,针对有线TV和地面广播TV需要覆盖大量频带,并且也是需要大调谐范围振荡器或切换振荡器的原因。在最新的方法中,振荡器的数量被减少到约4至5。因为图6中的粗调谐是差分的,VCO的增益可被减半,而且因此VCO的差分调谐端对于共模噪声和衬底噪声更不敏感。VCO的增益相对高,而且因此环路应相应地被匹配。为了更多地降低VCO的灵敏度,数字调谐技术可被使用。它们基于A/D和D/A转换器,以便VCO在频率锁定中时减少增益的斜率。对于扰动具有更低灵敏度的PLL环路中的可能的实现在图6中示出。PLL由相位频率检测器PFD和两条路径组成:比例路径和积分路径。应用在VCO的差分粗调谐端C上的积分路径具有环路中的纯积分器LPF1,该积分器确保来自电荷泵和PLL环路的高频率噪声的过滤。比例路径具有用于驱动VCO的精调谐端的低通滤波器LPF2。VCO将在相位和频率中被锁定到晶体XTAL。窗检测块WD检测频率锁定条件,并且使用LOGIC块中的逻辑功能干扰来自积分部分上的PFD的信号。倍频程划分器OD只具有两个块的划分器并执行倍频程选择功能。分频器的正交输出可被用于低IF、零IF接收机的I/Q下变换。锁相环的其它块本身已知为分频器M、电荷泵CP1、CP2以及控制相位频率检测器PFD转换为电荷泵CP1、CP2的逻辑。
注意,本发明的保护范围不限于在此所描述的实施例。本发明的保护范围也不受权利要求中的参考标记的限制。词“包含”不排除那些在权利要求中提及的部件以外的其它部件。元件之前的词“一个”不排除多个那些元件。形成本发明的一部分的装置均能以专用硬件的形式或以编程目的的处理器的形式来实施。本发明归属于每个新特征或这些特征的组合。
Claims (6)
1.压控振荡器包含一个耦合到调制器装置的LC谐振电路(L、C、R),并且其特征在于该调制器装置经由加法器被耦合到放大器装置,用于产生具有相对宽范围内的频率的正交周期输出信号,该频率通过提供给该调制器装置的控制信号(VT)来控制。
2.如权利要求1所述的振荡器,其中所述调制器装置包含缓冲器和调制器的串联耦合。
3.如权利要求1所述的振荡器,其中所述放大器装置包含另一个缓冲器和放大器的串联耦合。
4.如权利要求3所述的振荡器,其中所述放大器是跨导放大器。
5.如权利要求1所述的振荡器,其中所述放大器装置是跨导放大器,所述调制器装置是吉尔伯特单元调制器而加法器是节点。
6.包含如上述权利要求中任何一个所述的振荡器的锁相环,用于大的调谐TV调谐器。
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EP (1) | EP1543609A1 (zh) |
JP (1) | JP2005539449A (zh) |
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JP4637020B2 (ja) * | 2006-01-05 | 2011-02-23 | 古野電気株式会社 | タンク回路付高周波回路モジュール |
KR100844457B1 (ko) | 2006-12-05 | 2008-07-08 | 한국전자통신연구원 | 직교신호 발생 콜피츠 전압 제어 발진기 |
US7902930B2 (en) * | 2006-12-05 | 2011-03-08 | Electronics And Telecommunications Research Institute | Colpitts quadrature voltage controlled oscillator |
US9257939B1 (en) * | 2014-08-29 | 2016-02-09 | The Board Of Regents, The University Of Texas System | Quadrature LC VCO with passive coupling and phase combining network |
EP3373449B1 (en) * | 2017-03-10 | 2020-10-07 | EM Microelectronic-Marin SA | An electronic oscillator |
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US4706045A (en) | 1986-12-10 | 1987-11-10 | Western Digital Corporation | Voltage controlled oscillator with dual loop resonant tank circuit |
US6198360B1 (en) | 1998-10-16 | 2001-03-06 | Cypress Semiconductor Corp. | Quadrature current frequency modulation oscillator |
AU2001249088A1 (en) * | 2000-03-17 | 2001-10-03 | Motorola, Inc. | Bias modulated oscillator and method |
GB2379104A (en) * | 2001-08-21 | 2003-02-26 | Zarlink Semiconductor Ltd | Voltage controlled oscillators |
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US20060006954A1 (en) | 2006-01-12 |
WO2004027977A1 (en) | 2004-04-01 |
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