CN1670911A - 半导体装置的制造方法及半导体元件的定位方法 - Google Patents

半导体装置的制造方法及半导体元件的定位方法 Download PDF

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CN1670911A
CN1670911A CNA2005100558038A CN200510055803A CN1670911A CN 1670911 A CN1670911 A CN 1670911A CN A2005100558038 A CNA2005100558038 A CN A2005100558038A CN 200510055803 A CN200510055803 A CN 200510055803A CN 1670911 A CN1670911 A CN 1670911A
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alignment mark
semiconductor element
semiconductor
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metal film
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臼井良辅
井上恭典
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Sanyo Electric Co Ltd
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Abstract

一种半导体装置的制造方法及半导体元件的定位方法，包括：在基体材料上设置设有对准标记的半导体元件的工序；形成表面上设置了金属膜的绝缘膜，使其覆盖该半导体元件表面的工序；除去该绝缘膜及该金属膜的一部分，使对准标记露出的工序。通过检测露出的对准标记，把握基体材料上的半导体元件的电极的位置。

Description

半导体装置的制造方法及半导体元件的定位方法
技术领域
本发明涉及使用对准标记把握半导体元件位置的半导体装置的制造。
背景技术
随着手机、PDA、DVC、DSC等便携电子设备的高功能化加速，为了使这样的制品被市场接受，而必须使其小型、轻量化。为实现该小型、轻量化，而要求高集成的系统LSI。
另一方面，对这些电子设备更要求使用容易且便利性好，对用于设备的LSI要求高功能化、高性能化。因此，在随着LSI芯片的高集成化，其I/O数增大，更要求封装本身的小型化，为使它们同时成立，而强烈要求开发适用于半导体部件的高密度衬底安装的半导体封装。
对应这样的要求，开发了各种称为CSP(芯片尺寸封装Chip SizePackage)的封装技术。
在活用晶片工序及上述的CSP技术及装置实现多系统封装时，利用真空粘贴法等在多个LSI上一并形成绝缘膜或铜配线。因此，构成无补片的结构，可进行高速信号传输，并可将封装薄型化。
但是，包括在特开2002-94247号公报中记载的技术，在现有的多系统封装制造技术中，由于使用芯片安装等要对准多个芯片，故难于提高芯片的对准精度。因此，依存于芯片对准精度的配线精度也难于提高，而需要大的配线边界。因此，存在如下技术课题，即如何提高在使用了LSI等半导体集成电路的多系统封装等的半导体装置中的高集成化时的配线等的正确性。
发明内容
本发明是鉴于所述问题而开发的，其目的在于，提供一种技术，在高集成化的半导体装置中正确把握半导体元件的位置。
本发明的半导体装置的制造方法包括：在基体材料上设置设有对准标记的半导体元件的工序；在形成表面设置了金属膜的绝缘膜，使其覆盖半导体元件表面的工序；除去绝缘膜及金属膜的一部分，使对准标记露出的工序。
决定本发明的基体材料上的半导体元件位置的定位方法通过检测设于半导体元件上且露出的对准标记进行，对准标记形成在使表面上设置了金属膜的绝缘膜覆盖半导体元件的表面而形成后，除去绝缘膜及金属膜的一部分而露出。
对准标记可以设置在半导体元件的上面，也可以是多个对准标记。另外，可以通过检测露出的对准标记把握基体材料上的半导体元件的电极。
根据这些方法，可以以露出的半导体元件上的对准标记为基准正确测定芯片的位置。因此，可降低边界，形成微细的配线。其结果可提供一种半导体装置，在高集成化的多系统封装中可通过正确地把握半导体元件的位置提高配线等的正确性。
附图说明
图1A和图1B、及图2A和图2B是本发明实施例的半导体装置的图示；
图3A～图3C、图4A和图4B、及图5A～图5C是说明本发明实施例的半导体装置的制造工序的剖面图；
图6A和图6B是说明本发明实施例的半导体装置的图。
具体实施方式
图1A～图5C是说明本发明实施例的半导体装置制造工序的图。如图1A所示，在晶片102上形成有LSI142。在此，如图1B所示，在LSI142的未设置电极的区域(未图示)的两个位置设置对准标记150。在未设置电极的区域设置对准标记150是由于，当在设置电极的区域设置对准标记150时，通过使对准标记150露出后实施的使用导电性材料的镀敷，电极会被电连接的缘故。
另外，对准标记150通过组合以下材料进行层积而形成，其材料例如可组合使用硅和氧化硅膜、多晶硅和氧化硅膜、氧化钨膜和TEOS、铜和SOG膜、铝和SOG膜等的组合。
设置对准标记150的位置只要是从LSI142的表面侧可确认对准标记的形状的位置即可，最好设置在LSI142的最上层。在此，通过在LSI142的最上层设置对准标记150，系统封装制造装置容易把握利用后述的激光开孔露出的对准标记150的位置。
在设置该两个位置的对准标记150时，使用以LSI142的任意某一点为原点的x轴、y轴确定各对准标记150的中心位置，和例如以50μm间隔设置在LSI142上的、例如焊盘152等LSI142的电极中心的位置位于LSI142上的什么位置。另外，使用角度θ确定图2A所示的对准标记150间的倾度。并将这些对准标记150及焊盘152的位置信息存储在后述的系统封装制造装置中。然后，通过进行切割，将晶片102分割为LSI142(未图示)。
如图3A所示，在被拉伸的基体材料140上设置多个LSI142及无源元件144等电路元件。在此，基体材料140具有粘接性，可采用可在表面固定LSI142及无源元件144的可伸缩的带状基体材料。另外，无源元件144例如是片状电容器、片状电阻等。在将电路元件设置在基体材料140上后，使设置了多个LSI142或无源元件144等电路元件的基体材料140返回未拉伸时的原来状态。
其次，如图3B所示，在这样固定多个LSI142及无源元件144的状态下，将利用金属膜120及绝缘树脂膜122构成的带金属膜的绝缘树脂膜124配置在基体材料140上，使带金属膜的绝缘树脂膜124与基体材料140接触，使LSI142及无源元件144嵌入绝缘树脂膜122内。
然后，对应构成绝缘树脂膜122的树脂的种类，加热绝缘树脂膜122，在真空或减压下将带金属膜的绝缘树脂膜124压装在基体材料140上。由此，如图3C所示，LSI142及无源元件144埋入绝缘树脂膜122内，且LSI142及无源元件144被压装在绝缘树脂膜122内。
由此，利用带金属膜的绝缘树脂膜124覆盖LSI142，且设于LSI142上的对准标记150也被覆盖，从而不能从带金属膜的绝缘树脂膜124的表面看到。
在此，金属膜120例如是轧制铜箔等轧制金属。绝缘树脂膜122只要是可通过加热软化的材料，则可以使用任一种材料，例如可使用环氧树脂、BT树脂等密胺电介质、液晶聚合物、PPE树脂、聚酰亚胺树脂、氟树脂、苯酚树脂、聚酰胺双马来酰亚胺等，构成绝缘树脂膜122的材料中填充材料的含量可根据材料适当地设定。
带金属膜的绝缘树脂膜124可使用在薄膜状绝缘树脂膜122上附着了金属膜120的材料。另外，带金属膜的绝缘树脂膜124也可以通过在金属膜120上涂敷构成绝缘树脂膜122的树脂组成物并使其干燥形成。在本实施例中，树脂组成物在不与本发明的目的相背离的范围内可含有硬化剂、硬化促进剂、及其它成分。
另外，在使薄膜状的绝缘树脂膜122以B级化后的状态配置在基体材料140上，并在其上配置金属膜120，将绝缘树脂膜122与LSI142及无源元件144热压装时，通过将金属膜120热压装在绝缘树脂膜122上，也可以形成带金属膜的绝缘树脂膜124。
其次，如图4A所示，通过使用二氧化碳激光进行的激光开孔法在带金属膜的绝缘树脂膜124的局部设置开孔154，使LSI142表面的两个部位的对准标记150露出。
另外，二氧化碳激光以第一条件及改变了脉冲宽度的第二条件这两个阶段照射，其照射条件例如如下。
脉冲周期：0.25ms
输出1.0W
第一条件
脉冲宽度：8～10μs
发射数：1
第二条件
脉冲宽度：3～5μs
发射数：3
由此，形成具有从金属膜120向绝缘膜122方向直径逐渐缩小的锥形侧壁的开孔154。
在此，对准标记150例如形成图2B所示的形状。即，以对准标记150的中心为原点，设置x轴和y轴，例如各自按每10μm设置刻度。因此，可在激光开孔时，通过在对准标记150的附近开孔，使对准标记150的刻度露出，通过由系统封装制造装置中具有的光学显微镜读取该刻度，把握对准标记150的中心位置。
在此，在带金属膜的绝缘树脂膜124的局部利用激光开孔形成的孔的大小过小时，难于使对准标记150露出，在过大时，LSI142容易受热的影响，因此，优选使用直径30μm～50μm的孔，特别优选直径40μm的孔。
如上所述，设于LSI142上的两个部位的对准标记150的中心位置及焊盘152的中心位置的位置关系在压装带金属膜的绝缘树脂膜124之前已经存储在系统封装制造装置中。
因此，通过利用系统封装制造装置中具有的光学显微镜读取对准标记150的刻度，把握对准标记150的中心位置，由此，可把握LSI142上的焊盘152的位置。因此，可减小在后述的LSI142和其它电路元件间配线时所需要配线位置余量，可实现使用基于配线微细化的LSI142的多系统封装的高集成化。
根据所述的位置信息，如图4B所示，使用采用二氧化碳激光的开孔法形成通孔156，以使焊盘152露出。在此，通孔的直径优选使用30μm～50μm。另外，通孔的直径最好比焊盘电极的一边长度小。
另外，二氧化碳激光在第一条件及改变了脉冲宽度的第二条件这两个阶段照射，其照射条件例如如下。
脉冲周期：0.25ms
输出1.0W
第一条件
脉冲宽度：8～10μs
发射数：1
第二条件
脉冲宽度：3～5μs
发射数：3
由此，形成具有从金属膜120向绝缘膜122直径缩小的锥形侧壁的通孔156。
其次，如图5A所示，通过在带金属膜的绝缘树脂膜124表面使用与构成金属膜120的金属相同的金属进行镀敷，利用导电性物质158埋入通孔150。在此，镀敷的厚度例如为15μm左右。然后，如图5B所示，利用激光刻蚀直描金属膜120中用于电路元件间配线的部分，将多个LSI142及无源元件144等电路元件之间电连接。然后，如图5C所示，在配线部分上形成带金属膜的绝缘树脂膜124。
这样形成的半导体模块可在带金属膜的绝缘树脂膜124的金属膜120上重叠其它带金属膜的绝缘树脂膜124，形成配线层，将多个LSI142及无源元件144之间电连接，或与其它装置电连接。
以上说明了发明的最优实施例。但是，本发明不限于此，本领域人员当然可以在本发明的范围内对所述实施例进行变形。
例如，在所述实施例中说明了使用LSI142作为半导体元件的情况，但也可以使用IC等其它半导体元件。另外，在所述实施例中，说明了使用铜作为构成金属膜120的材料，但也可以是除铜以外的金属例如铝、金等导电率高的金属。
在所述实施例中，说明了将带金属膜的绝缘树脂膜124压装在基体材料140上的情况，但也可以在基体材料140上形成绝缘树脂膜122后，在绝缘树脂膜1 22的表面形成金属膜120。另外，所述实施例中说明了使用图2B所示的形状作为对准标记150的形状的情况，但也可以是例如同心圆状等，只要露出时可从对准标记150的位置把握焊盘152的位置的形状即可。
所述实施例中说明了使用10μm作为对准标记150的刻度单位的情况，但也可以是5μm等，只要通过把握对准标记的位置可把握焊盘152的位置的刻度单位即可。
所述实施例中说明了在形成LSI142后设置对准标记150的情况，但只要在形成的LSI142上呈现对准标记150即可，例如也可以从LSI142的形成初期在每个层上设置对准标记150。另外，所述实施例中使用了和构成金属膜120的金属相同的金属作为镀敷材料，但只要是导电性优良的金属即可。
所述实施例中说明了在LSI142上设置两个对准标记150的情况，但也可以设置三个或三个以上的对准标记150。由此，可更准确地测定焊盘的位置，使配线更微细化。因此，可将多系统封装高集成化，其结果可提供高集成化的多系统封装。
只要可测定LSI142及焊盘152的位置，则如图6A所示，通过在增大焊盘160的尺寸的同时，在表面设置刻度，使其具有和对准标记相同的作用，也可以仅设置一个设于LSI142上的对准标记150，如图6B所示，通过使多个焊盘160具有和对准标记相同的左右，也可以不在LSI142上另外设置对准标记150。由此，可省略设置对准标记150的工序及在对准标记150附近激光开孔的工序，同时，可通过使配线微细化，提供高集成化的多系统封装。
另外，所述实施例中说明了将LSI142的电极即焊盘152的位置信息预先存储在系统封装制造装置中，通过把握激光开孔露出的对准标记150的位置，把握焊盘152的位置信息的情况，但也可以将除焊盘152以外的LSI142的电极的位置信息预先存储在系统封装制造装置中，通过把握露出的对准标记105的位置，把握除焊盘152以外的LSI142的电极的位置信息。另外，所述实施例中说明了使用具有伸缩性的材料作为基体材料140的情况，但也可以使用没有伸缩性的材料。

Claims (16)

1、一种半导体装置的制造方法，其包括：在基体材料上设置设有对准标记的半导体元件的工序；形成表面上设置了金属膜的绝缘膜，使其覆盖所述半导体元件表面的工序；除去所述绝缘膜及所述金属膜的一部分，使所述对准标记露出的工序。
2、如权利要求1所述的半导体装置的制造方法，其中，所述半导体元件的上面具有所述对准标记。
3、如权利要求1所述的半导体装置的制造方法，其中，所述半导体元件具有多个所述对准标记。
4、如权利要求2所述的半导体装置的制造方法，其中，所述半导体元件具有多个所述对准标记。
5、如权利要求1所述的半导体装置的制造方法，其中，还具有通过检测所述露出的对准标记，把握所述基体材料上半导体元件的电极的位置的工序。
6、如权利要求2所述的半导体装置的制造方法，其中，还具有通过检测所述露出的对准标记，把握所述基体材料上半导体元件的电极的位置的工序。
7、如权利要求3所述的半导体装置的制造方法，其中，还具有通过检测所述露出的对准标记，把握所述基体材料上半导体元件的电极的位置的工序。
8、如权利要求4所述的半导体装置的制造方法，其中，还具有通过检测所述露出的对准标记，把握所述基体材料上半导体元件的电极的位置的工序。
9、一种决定基体材料上的半导体元件的位置的定位方法，其通过检测设于所述半导体元件上且露出的对准标记进行，在表面上设置了金属膜的绝缘膜覆盖所述半导体元件的表面而形成后，除去所述绝缘膜及所述金属膜的一部分，使所述对准标记露出。
10、如权利要求9所述的定位方法，其中，所述半导体元件的上面具有所述对准标记。
11、如权利要求9所述的定位方法，其中，所述半导体元件具有多个所述对准标记。
12、如权利要求10所述的定位方法，其中，所述半导体元件具有多个所述对准标记。
13、如权利要求9所述的定位方法，其中，检测所述露出的对准标记，决定所述基体材料上的半导体元件的电极的位置。
14、如权利要求10所述的定位方法，其中，检测所述露出的对准标记，决定所述基体材料上的半导体元件的电极的位置。
15、如权利要求11所述的定位方法，其中，检测所述露出的所述多个对准标记，决定所述基体材料上的半导体元件的电极的位置。
16、如权利要求12所述的定位方法，其中，检测所述露出的所述多个对准标记，决定所述基体材料上的半导体元件的电极的位置。
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