CN1661786A - 用于半导体封装的引线框和制造该半导体封装的方法 - Google Patents

用于半导体封装的引线框和制造该半导体封装的方法 Download PDF

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CN1661786A
CN1661786A CN2004100978805A CN200410097880A CN1661786A CN 1661786 A CN1661786 A CN 1661786A CN 2004100978805 A CN2004100978805 A CN 2004100978805A CN 200410097880 A CN200410097880 A CN 200410097880A CN 1661786 A CN1661786 A CN 1661786A
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lead frame
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semiconductor packages
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CN100444339C (zh
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金正日
赵世勋
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Marine origin Supreme Being Ace Co., Ltd.
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Abstract

本发明提供了一种用引线框制造半导体封装的方法和由它提供的半导体封装。该方法包括提供引线框,其具有多个用于模制多个半导体封装的模制区域,和将条带附着在引线框的至少一个表面从而防止熔化的模制材料与引线框的表面接触。该条带包括多个相应于每个模制区域边界的空白区。当在引线框上层压条带时,该方法分散由于热轧辊导致的条带张力和膨胀应力,借此防止板条弯曲。

Description

用于半导体封装的引线框和 制造该半导体封装的方法
本专利申请要求获得韩国专利申请No.2004-11816的优先权,该专利申请于2004年2月23日在韩国知识产权局提出申请,本文引用其内容作为参考。
技术领域
本发明涉及用引线框制造半导体封装的方法,更特别地,涉及一种引线框和用引线框和条带制造的半导体封装,该引线框具有附着在上面的有孔或分开的条带(tape)段,从而在制造半导体封装例如芯片级封装时防止模制材料附着在引线框的至少一个表面上。
背景技术
使用引线框的传统芯片级封装(CSP)包括微引线框(MLF)、底部引线塑料封装(BLP)和凸起芯片载体(BCC)。这些产品通过接线端向外部电路衬底发送电信号。
如图1所示,在传统的引线框中,有多个区域11-14,其每一个都相对于板条(strip)10上多个芯片级封装中的相应一个。在每个区域上设置一个半导体芯片,并且每个半导体芯片都丝线键合于引线部分。
在对半导体芯片进行保护性模制之前,将背侧带15附着在板条10的一个表面上,以防止模制材料接触和附着在引线框的底表面。如图所示,背侧带15用热压缩装置,例如热轧辊,附着在板条10的整个表面上。
在将背侧带15附着在板条10的表面上之后,在半导体芯片上沉积模制材料。该封装处理通过用切割设备,例如锯,切单各个芯片级封装而完成。
然而,制造芯片级封装的传统方法具有如下问题。
首先,如图2所示,在制造芯片级封装期间,板条会由于板条10与条带15之间不同的材料特性,例如不同的热膨胀系数(CTE),弯曲或扭转。因此,在将芯片附着于引线框或者丝线键合期间,可能由于在不同处理之间使板条10发生弯曲而破坏板条10。这种现象是由于在层压期间作用在板条10长度方向上的张力和条带15的膨胀应力引起的。
其次,一段时间之后,板条10可能会由于条带15的收缩而弯曲。
再次,如图3所示,板条10在半导体封装处理期间会由于模制材料19、板条10和条带15之间收缩和膨胀速率的不同而被进一步弯曲或卷曲。
发明内容
本发明提供了一种制造半导体封装的方法和用引线框和条带制造的半导体封装,该半导体封装具有引线框和附着在其上面的条带以防止熔融的模制材料接触引线框的一个表面。
根据本发明的一个方案,提供了一种用引线框制造半导体封装的方法,包括:提供引线框,其上面具有多个用于安装多个半导体封装的区域;和将条带附着在引线框的表面上,使之基本上覆盖引线框的整个表面,但不包括半导体封装安装区的边界区,从而在随后的半导体封装模制处理期间防止模制材料附着在引线框被覆盖的表面。
根据本发明的一个优选实施例,能够用热轧辊通过热压缩将多个分离的条带附着在引线框的多个半导体安装区上。
根据另一个优选实施例,将单一条带附着在引线框的表面,其中单一条带包括多个用于覆盖引线框半导体封装安装区的主区和至少一个连接条带相邻主区的桥区。在形成单一条带时,多段条带在相邻半导体安装区之间的边界上用桥条带部分连接在一起。条带的空白区域可以通过沿着半导体安装区之间的边界打孔或割槽而产生。
根据本发明的另一个方案,提提供了一种附着了条带的引线框,包括半导体引线框和附着在引线框表面的条带,该半导体引线框包括多个用于安装多个半导体封装的区域,该条带基本上覆盖引线框的整个表面,但不包括引线框半导体封装区域的边界区。
附图说明
本发明的上述和其他特征和优点通过参考附图的例证性实施例详细说明将变得显而易见,其中:
图1是上面附着有条带的传统引线框的示意性平面图;
图2是图解被弯曲的图1中传统引线框的剖面图;
图3是图解被弯曲的图1中传统引线框的剖面图;
图4是根据本发明一个实施例的芯片级封装的剖面图;
图5根据本发明一个实施例的引线框的示意性平面图;
图6A-6E是图解根据本发明一个实施例将条带附着于图5中引线框的方法的示意性平面图;
图7A-7F是图解根据本发明一个实施例将条带附着于图5中引线框的方法的示意性剖面图;
图8是根据本发明另一个实施例的引线框的示意性平面图;
图9A-9C是图解将条带附着于图8引线框的处理的示意性平面图;
图10是可用于图8中引线框的一个条带实例的平面图;和
图11是可用于图8中引线框的另一个条带实例的平面图。
具体实施方式
下文中,将参考显示本发明实施例的附图更加全面地说明本发明。
图4是根据本发明一个实施例的芯片级封装40的剖面图。
参考图4,芯片级封装40包括引线框41、通过粘合剂42附着于引线框41的半导体芯片43以及模制引线框41和半导体芯片43的模制材料44。
在形成图形的半导体引线框41的上表面上形成由金或银构成的镀层45,并且半导体引线框41的每个引线部分都通过丝线46丝线键合于半导体芯片43。此外,在半导体引线框41的下表面上形成焊料镀层47。
引线框41的下表面形成具有外部电路衬底接线端的电连接。
半导体芯片43的用丝线46丝线键合于引线框41的部分被模制材料44保护。
根据本发明一个实施例的芯片级封装具有一种结构,其能够防止由于半导体引线框41与背侧带之间收缩速率和膨胀速率的不同导致的变形。在制造半导体封装的处理期间,背侧带防止熔化的模制材料44接触引线框41暴露的下表面。
图5是用于根据本发明第一实施例的引线框的板条50的平面图。
参考图5,板条50包括多个相应于各个芯片级封装的区域51-54。在安装了半导体芯片的每个区域中,引线框的构图的引线部分被丝线键合于半导体芯片,并通过模制该丝线键合部分制造多个芯片级封装。所制造的芯片级封装通过切割装置,例如锯,切单成多个单个的芯片级封装。
板条50通过在区域51-54之间形成的桥55加以互连,并且在每一个桥55中形成了多个通孔56以简化切割。在板条50中,区域51-54形成一个行,但是,该多个芯片级封装能够形成多个行。
背侧带510附着于板条50的区域51-54,并位于引线框的与即将被模制的表面相对的表面上以防止与熔化的模制材料接触。
条带从卷盘中以卷曲的状态提供,用热轧辊通过热压缩附着在板条50的表面,并在模制处理之后分离。条带510分别地附着于板条50的每个区域51-54。
也就是说,板条50的第一区域51、第二区域52、第三区域53和第四区域54分别具有第一条带51、第二条带52、第三条带53和第四条带54。
图6A-6E是图解将背侧带511-514附着于板条50的区域51-54的方法的平面图。
参考图6A-6E,提供板条50(图6A),并将第一条带511附着于第一区域51(图6B)。同样地,第二条带512附着于第二区域52(图6C),第三条带513附着于第三区域53(图6D),以及第四条带514附着于第四区域54(图6E)。
图7A-7是图解包括粘条带处理的半导体封装过程的剖面图。
引线框的板条50由具有高热传导率的金属例如铜构成。根据本发明的优选实施例,连续提供多个引线框板条从而将粘条带处理应用于大规模的引线框。每个板条50都包括多个封装区域,例如第一区域51、第二区域52、第三区域53和第四区域54,它们每一个都相应于其对应的芯片级封装。第一到第四区域51-54沿着板条50的长度方向布置。第一到第四区域的相邻区域通过桥55加以连接,并且在每个桥55内形成通孔56。
背侧带附着于板条50的第一到第四区域51-54,从而防止熔化的模制材料接触区域51-54内引线框的一个表面。
条带510被布置在第一区域51的左侧并用刀71加以切割(图7B)。
然后,条带510用热轧辊72热压缩在第一区域51的表面上。热轧辊72的温度大约为200±10℃,该压缩保持大约10秒到50分钟。通过沿着一个方向移动轧辊72将条带510附着于第一区域51,或者通过沿两个相反的方向移动轧辊72将条带52附着于第一区域51(图7C)。
然后,用刀71以等于每个区域节距的距离切割条带510(图7D)。该过程能够通过机械以预定的节距尺寸实现自动化。
通过重复上述处理,第二条带512、第三条带513和第四条带514分别附着于第二区域52、第三区域53和第四区域54。
之后,将半导体芯片安装在板条50的每个区域51-54上,且每个引线框被丝线键合于每个半导体芯片。如图7F所示,板条50用熔化的模制材料44加以模制,该模制材料施加到除被条带511-514覆盖的区域之外的半导体封装上。
因为条带511-514保护了区域51-54,所以在模制期间,熔化的模制材料不会附着于板条50的底部。模制之后,用条带去除装置从板条50的表面除去条带。
图8是用于根据本发明第二实施例的引线框的板条的平面图。
参考图8,在板条80上形成第一到第四区域81-84。第一到第四区域81-84通过桥85加以连接,在桥85中形成了多个通孔86。
在粘条带处理期间,条带810附着于板条80,从而第一到第四条带811-814分别附着在第一到第四区域81-84。
这里,第一到第四条带811-814单独地附着于第一到第四区域81-84,并具有连接条带810相邻段的桥条带815。桥条带815能够使条带810的各个段同时被除去。
图9A-9C是图解根据本发明第二实施例的粘条带处理的附加平面图。
提供用于引线框的板条80(图9A)。通过热轧辊将呈片层状的条带810热压缩在板条80的表面上(图9B)。然后,通过在条带810上打孔或刻槽在第一到第四区域81-84的边界处形成桥条带815(图9C)。
桥条带815可以间隔预定的距离,如图9C所示。选择地,桥条带1015可以连接相邻条带的上角和下角,如图10所示。进一步,桥条带1115可以连接条带的相邻侧面的中间部分,如图11所示。此外,桥条带可以通过在相应于板条80的通孔的区域内对条带进行打孔而形成。
本用引线框制造半导体封装的方法具有多种优点,因为它将条带的各个段热压缩在引线框将要形成半导体封装的区域上。
首先,在将条带层压在板条上时,由于热轧辊导致的条带的张力和膨胀应力能够适当地沿着板条的长度方向分布。因此,能够防止板条弯曲。
其次,能够防止长时间后由于条带的回复力导致的板条弯曲。
再次,能够防止由于模制材料、条带和引线框之间物理性质的差异导致的在模制之前和之后它们的收缩速率和膨胀速率不同所引起的板条弯曲。
尽管本发明通过参考其例证性实施例进行了特殊的显示和说明,但是本领域的普通技术人员能够理解,在其中能够进行各种形式和细节的改变而不背离由下面的权利要求所限定的本发明的精神和范围。

Claims (15)

1.一种用引线框制造半导体封装的方法,包括:
提供引线框,其具有多个用于在上面安装多个半导体封装的区域;和
将条带附着在引线框的表面,使其基本上覆盖引线框的整个表面,但不包括半导体封装安装区的边界区,从而防止模制材料在随后半导体封装模制处理期间附着于引线框的被覆盖表面。
2.根据权利要求1的方法,其中条带附着步骤通过将多个分开的条带附着在引线框的多个半导体封装安装区上加以执行。
3.根据权利要求1的方法,进一步包括在附着条带之前将条带切割成分开的条带的步骤。
4.根据权利要求2的方法,其中条带附着步骤用热轧辊通过热压缩加以执行。
5.根据权利要求1的方法,其中条带附着步骤通过将单一的条带附着在引线框的表面上加以执行,该单一条带包括多个用于覆盖引线框半导体封装安装区的主区和至少一个连接条带相邻主区的桥区。
6.根据权利要求1的方法,进一步包括从引线框的边界区除去条带的一些部分的步骤。
7.根据权利要求6的方法,其中条带去除步骤通过在将条带附着到引线框之后在边界区中打孔或切槽加以执行。
8.根据权利要求6的方法,其中从与在引线框中形成的通孔相邻的区域除去条带的一些部分。
9.根据权利要求6的方法,其中从边界区的中心区域除去条带的一些部分。
10.根据权利要求6的方法,其中从边界区的侧面部分除去条带的一些部分。
11.根据权利要求1的方法,其中连续提供多个引线框,用于条带与引线框的粘着。
12.一种附着有条带的引线框,包括:
半导体引线框,其包括多个用于安装多个半导体封装的区域;和
附着于引线框表面的条带,该条带基本上覆盖引线框的整个表面,但不包括引线框的半导体封装安装区的边界区。
13.根据权利要求12的引线框,其中多个分开的条带覆盖在引线框半导体封装安装区上。
14.根据权利要求12的引线框,其中单一的条带覆盖在引线框上。
15.根据权利要求14的引线框,其中单一的条带包括多个用于覆盖引线框半导体封装安装区的主区,和至少一个连接条带相邻主区的桥区。
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