CN1604340A - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

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CN1604340A
CN1604340A CN200410079728.4A CN200410079728A CN1604340A CN 1604340 A CN1604340 A CN 1604340A CN 200410079728 A CN200410079728 A CN 200410079728A CN 1604340 A CN1604340 A CN 1604340A
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杉原茂行
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Sanyo Electric Co Ltd
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Abstract

本发明提供一种防止具有硅化物结构的中耐压晶体管的结漏的半导体装置及其制造方法。通过全面地溅射钛(Ti)而形成钛层(8)。由此，栅电极(3)通过开口部(7a)接触钛层(8)，P+型扩散层(6a、6b)分别通过开口部(7b、7c)接触钛层(8)。其后，通过进行热处理，而使接触栅电极(3)及P+型扩散层(6a、6b)的钛层(8)局部地硅化物化，以在栅电极(3)上的表面上形成硅化钛层(9a)，在P+型扩散层(6a、6b)的表面上分别形成硅化钛层(9b、9c)。而且，利用湿式蚀刻除去没有硅化物化的硅化物阻挡层(7)上的钛层(8)。

Description

半导体装置及其制造方法
技术领域
本发明涉及半导体装置及其制造方法，特别涉及具有自动调整硅化物(self-align silicide)结构的MOS晶体管结构及其制造方法。
背景技术
以往，为了降低MOS晶体管的栅极电阻及源极·漏极电阻，以使其高速化，采用硅化物(silicide)结构或自动调整硅化物(salicide)结构。
图6是表示该种MOS晶体管的剖面结构的图。
在N型硅基板50上通过栅极绝缘膜51形成有栅电极52。在栅电极52的侧壁上形成有井壁衬垫绝缘膜53。而且，形成有由P-型扩散层54a及P+型扩散层54b构成的源极层54和由P-型扩散层55a及P+型扩散层55b构成的漏极层55。
而且，在栅电极52上、P+型扩散层54b、55b上，分别形成有硅化钛层(TiSix层)56a、56b、56c。
图7是表示具有硅化物结构的其它MOS晶体管的剖面结构的图。该MOS晶体管被称为中耐压MOS晶体管、具有10V左右高源极耐压·漏极耐压的MOS晶体管。该中耐压MOS晶体管和图6的MOS晶体管被集成在同一硅基板上。
如图7所示，在N型硅基板50上通过栅极绝缘膜61形成有栅电极62。在栅电极62的侧壁上形成井壁衬垫绝缘膜63。而且，形成有由P-型扩散层64a及P+型扩散层64b构成的源极层64、由P-型扩散层65a及P+型扩散层65b构成的漏极层65。
在这里，P-型扩散层64a、65a邻接栅电极62而形成，而P+型扩散层64b、65b形成于离开栅电极62及井壁衬垫绝缘膜63的位置上。按照该结构，源极层或漏极层中的电场集中被缓和，与图6的晶体管结构相比，可实现高耐压。而且，在栅电极62上形成硅化钛层66a，在P-型扩散层64a及P+型扩散层64b上形成硅化钛层66b，在P-型扩散层65a及P+型扩散层65b上形成有硅化钛层66c。
再者，对于具有硅化物结构的MOS晶体管，例如在以下专利文献1中有记载。
【专利文献1】
特开2002-353330号公报
在图7的MOS晶体管的结构中，为了使栅电极62从P+型扩散层64b、65b偏移，而使P-型扩散层64a、65a露出在N型硅基板50上。在该状态下，一旦形成硅化钛，则在P-型扩散层64a、65a上也分别形成硅化钛层66b、66c。这样，因为在硅化物反应时钛吸收P-型扩散层64a、65a的P型杂质(例如：硼)，故扩散层的接合浅，会出现“结漏”问题。
发明内容
因此，本发明的目的在于，防止具有硅化物结构的中耐压MOS晶体管的“结漏”。
本发明只在MOS晶体管的栅电极及高浓度扩散层上形成金属硅化物层，在低浓扩散层上不形成金属硅化物层。
根据本发明，可以防止具有硅化物结构的中耐压MOS晶体管的“结漏”。由此，能将中耐压MOS晶体管和具有硅化物结构的微细MOS晶体管集成在同一芯片上。
附图说明
图1是说明本发明的第1实施例的半导体装置的制造方法的剖面图。
图2是说明本发明的第1实施例的半导体装置的制造方法的剖面图。
图3是说明本发明的第1实施例的半导体装置的制造方法的剖面图。
图4是本发明的第1实施例的半导体装置的平面图。
图5是说明本发明的第2实施例的半导体装置的制造方法的剖面图。
图6是现有例的半导体装置的剖面图。
图7是显示例的其它半导体装置的剖面图。
具体实施方式
下面参照附图，说明本发明的实施例的半导体装置及其制造方法。
参照图1至图4，对第1实施例进行说明。图1至图3是表示该半导体装置的制造方法的剖面图，图4是该半导体装置的平面图。如图1(a)所示，在N型硅基板上形成例如由氧化硅膜构成的栅极绝缘膜2，在该栅极绝缘膜2上形成例如由多晶硅构成的栅电极3。
接着，如图1(b)所示，在邻接于栅电极3的N型硅基板1的表面上形成P-型扩散层4a、4b。具体是，以栅电极3为掩模，将硼等P型杂质以低浓度离子注入到N型硅基板1的表面，然后进行热扩散。P-型扩散层4a、4b的杂质浓度例如为1×1017/cm3左右，对此并未限定。
接下来，如图1(c)所示，在栅电极3的侧面上形成井壁衬垫绝缘膜5。该工序是通过首先利用CVD法在整个面上堆积氧化硅膜，然后各向异性蚀刻加工该氧化硅膜来进行的。在该蚀刻工序中，除去P-型扩散层4a、4b的表面的栅极绝缘膜2。
接着，如图2(a)所示，将硼等P型杂质以高浓度离子注入到N型硅基板1的表面，形成P+型扩散层6a、6b。只离开栅电极3所定的距离地形成P+型扩散层6a、6b。由此，在井壁衬垫绝缘膜5和P+型扩散层6a、6b之间，P-型扩散层4a、4b露出到N型硅基板1的表面。而且，由P-型扩散层4a和P+型扩散层6a构成源极层，由P-型扩散层4b和P-型扩散层6b构成漏极层。
接下来，如图2(b)所示，在整个面上堆积例如由氧化硅膜构成的硅化物阻挡层7，如图2(c)所示，通过有选择地对硅化物阻挡层7进行蚀刻，而在栅电极3上的硅化物阻挡层7上开设开口部7a，在P+型扩散层6a、6b上的硅化物阻挡层7上分别开设开口部7b、7c。
然后，如图3(a)所示，通过在整个面上溅射钛(Ti)而形成钛层8。由此，栅电极3通过开口部7a而与钛层8接触，P+型扩散层6a、6b分别通过开口部7b、7c而与钛层8接触。
其后，如图3(b)所示，通过进行热处理，从而接触栅电极3及P+型扩散层6a、6b的钛层8局部地硅化物化，分别在栅电极3上的表面形成硅化钛层9a，在P+型扩散层6a、6b的表面上形成硅化钛层9b、9c。
而且，如图3(c)所示，湿式蚀刻除去没有硅化物化的硅化物阻挡层7上的钛层8。再者，图3(c)对应于沿图4的平面图X-X线的剖面。
接着，参照图5说明本发明的第2实施例。对与图1至图4相同的构成部分赋予相同的符号，并省略说明。经过图1(a)、(b)、(c)、图2(a)的工序，在形成了P+型扩散层6a、6b的N型硅基板1的整个面上通过溅射钛而形成钛层10。
然后，如图5(b)所示，通过选择性地蚀刻钛层10，而在栅电极3的表面上残留钛层10a，分别在P+型扩散层6a、6b的表面上残留钛层10a、10b，除去除此之外的区域上的钛层10。此后，如图5(c)所示，通过进行热处理，而将钛层10a、10b、10c硅化物化，以形成硅化钛层11a、11b、11c。
而且，在第1实施例中，作为硅化物阻挡层7，也可以使用氧化硅膜以外的材料，例如氮化硅膜。另外，在第1及第2实施例中，也可以用其它高融点金属代替钛。此外，在第1及第2实施例中，以P沟道型MOS晶体管为例进行说明，但本发明对N沟道型MOS晶体管也同样适用。再者，在第1及第2实施例中，源极层及漏极层均有P-型扩散层4a、4b，但也可以是只源极层和漏极层的任一方具有P-型扩散层的结构。

Claims (8)

1、一种半导体装置，其特征在于，具有：
半导体基板；
在上述半导体基板上通过栅极绝缘膜而形成的栅电极；
邻接于上述栅电极，并形成在上述半导体基板的表面上的低浓度扩散层；
离开上述栅电极，并形成在上述半导体基板的表面上的高浓度扩散层；
形成于在上述低浓度扩散层上，阻止金属硅化物形成的金属硅化物阻挡层；和
除了上述低浓度扩散层上以外，在上述栅电极上及上述高浓度扩散层上形成的金属硅化物层。
2、一种半导体装置，其特征在于，具有：
半导体基板；
在上述半导体基板上通过栅极绝缘膜而形成的栅电极；
形成于上述栅电极的侧壁上的井壁衬垫绝缘膜；
邻接于上述栅电极，并形成于上述半导体基板的表面的低浓度扩散层；
离开上述井壁衬垫绝缘膜，并形成于上述半导体基板的表面的高浓度扩散层；和
除了上述低浓度扩散层上以外，形成在上述栅极电极上及上述高浓度扩散层上的金属硅化物层。
3、根据权利要求1所述的半导体装置，其特征在于，
在上述低浓度扩散层设置阻止金属硅化物形成的金属硅化物阻挡层。
4、根据权利要求2或3所述的半导体装置，其特征在于，
上述金属硅化物层是硅化钛层。
5、一种半导体装置的制造方法，其特征在于，具有：
在半导体基板上通过栅极绝缘膜形成栅电极的工序；
邻接于上述栅电极，在上述半导体基板的表面上形成低浓度扩散层的工序；
比上述低浓度扩散层远离上述栅电极，并在上述半导体基板的表面上形成高浓度扩散层的工序；
全面地形成硅化物阻挡层的工序；
有选择地除去上述栅电极及上述高浓度扩散层上的上述硅化物阻挡层，使上述栅电极及上述高浓度扩散层的至少一部分露出的工序；
全面地覆盖金属层的工序；
通过热处理，而使与上述栅电极及上述高浓度扩散层相接触的上述金属层发生反应，硅化物化，以在上述栅电极及上述高浓度扩散层上形成金属硅化物层的工序；和
有选择地除去上述硅化物阻挡层上的没有硅化物化的上述金属层工序。
6、根据权利要求5所述的半导体装置的制造方法，其特征在于，
上述硅化物阻挡层由氧化硅膜构成。
7、一种半导体装置的制造方法，其特征在于，具有：
在半导体基板上通过栅极绝缘膜形成栅电极的工序；
邻接于上述栅极电极，在上述半导体基板的表面上形成低浓度扩散层的工序；
比上述低浓度扩散层远离上述栅极电极，在上述半导体基板的表面上形成高浓度扩散层的工序；
在上述栅电极及上述高浓度扩散层上有选择地形成金属层的工序；和
通过热处理，而使与上述栅电极及上述高浓度扩散层相接触的上述金属层发生反应，硅化物化，以在上述栅电极及上述高浓度扩散层上形成金属硅化物层的工序。
8、根据权利要求5、6、7中任一项所述的半导体装置的制造方法，其特征在于，上述金属硅化物层是硅化钛层。
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