CN1595651A - 可用微弱电流检测断路的半导体装置以及电子装置 - Google Patents

可用微弱电流检测断路的半导体装置以及电子装置 Download PDF

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CN1595651A
CN1595651A CNA200410068702XA CN200410068702A CN1595651A CN 1595651 A CN1595651 A CN 1595651A CN A200410068702X A CNA200410068702X A CN A200410068702XA CN 200410068702 A CN200410068702 A CN 200410068702A CN 1595651 A CN1595651 A CN 1595651A
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semiconductor device
pad
voltage
terminal
input terminal
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CN100356568C (zh
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山本勋
宫长晃一
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Rohm Co Ltd
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Abstract

本发明提供一种可用微弱电流检测断路的半导体装置以及电子装置。IC芯片中内置串联稳压器。输入管脚上被施加电池电压。构成稳压器的晶体管的输出经由输出用焊盘出现在管脚中。输出电压的反馈信号经由反馈用焊盘出现在分压电阻的一端。用二极管连接输出焊盘和反馈焊盘。

Description

可用微弱电流检测断路的半导体装置以及电子装置
技术领域
本发明涉及半导体电子装置，特别涉及内置IC芯片，以接合电线(以下简称“电线”)连接IC芯片侧的焊盘和IC的外部端子(以下简称“端子”)的半导体装置以及装载它的电子装置。
背景技术
根据半导体的规格，有要求流过比较大的电流的信号。该情况下，已知一种结构如下：在IC芯片的多个焊盘(pad)上连接该信号，由多个焊盘分担电流。从这些多个焊盘分别经由电线连接到外部端子，所以视作外观上呈现为一个端子的一根信号线。但是，在内部两根电线从两个焊盘连接到一个端子。
在这样的结构中，如果两根电线中的一根引起断路故障，则产生达不到要求的电流值，或在另一根电线上流过过电流，其长期可靠性也下降的不便。但是，即使在只有一根断开的状态下，其信号自身也在端子内出现，所以在通常的试验中难以作故障判定。为了解决该问题，已知一种技术：通过电阻连接基板间，检测断路故障引起的电阻值的变化(专利文献1)。
【专利文献1】
特开平11-111785号公报
但是，在专利文献1的技术的情况下，如果流过某一程度大的测试电流，而不产生电压下降，则不能判定故障。但是，对测试者来说，除了不能流过大电流的情况外，为了不因测试电流对电线施加负载，希望可以用微弱的电流检测故障。
发明内容
本发明是鉴于这样的课题而完成的，其目的在于提供一种即使用微弱的测试电流也可以作出故障判定的半导体装置以及装载它的电子装置。
本发明的半导体装置，具有包括第一焊盘以及第二焊盘的IC芯片，和在第一焊盘以及第二焊盘的两者上连接了的端子，第一焊盘上连接的第一信号和第二焊盘上连接的第二信号由二极管耦合。在从第一信号向第二信号流过电流的方向上只加入一个二极管也可以，在其反方向上只加入一个也可以，在其两方向上加入也可以。
任何一种情况下，产生断路时，在IC芯片内部第一信号或第二信号上连接的电路不动作，根据二极管的正向压降，在减电测试，即降低电压的测试中，错误比通常早出现，所以可进行故障的检测。通过使用二极管，该测试用微弱电流也可进行。
在该半导体装置中，所述的端子为输入端子时，该半导体装置进而具有：在对输入端子施加了电压时从其电源电压生成目标电压的控制电路，和输出生成了的目标电压的输出端子，控制电路也可以为以下的结构：在第一信号以及第二信号的双系统中接受电源电压，并生成所述的目标电压。
作为其它的方式，在该半导体装置中，所述的端子为输出端子时，该半导体装置进而具有：施加规定的电源电压的输入端子，和根据该电源电压生成目标电压的控制电路，将目标电压传送到第一信号或者第二信号的任何一个都可以。
作为本发明的其它的方式，半导体装置包含：施加电源电压的输入端子、从电源电压生成目标电压的控制电路、将生成了的目标电压输出的输出端子，对输入端子或输出端子的至少一方，设置多个IC芯片侧的焊盘，将信号传送路径多路化，同时多路化的信号传送路径之间用二极管耦合。
本发明的其它方式涉及电子装置。该电子装置装载半导体装置和负载装置。半导体装置包含：施加电源电压的输入端子、从所述电源电压生成目标电压的控制电路、将生成了的目标电压输出的输出端子，对输入端子或输出端子的至少一方，设置多个IC芯片侧的焊盘，将信号传送路径多路化，同时多路化的信号传送路径之间，在所述半导体装置内部或半导体装置于所述符合装置之间的地方，用二极管耦合。
附图说明
图1是表示实施方式1的半导体装置的结构的图。
图2是表示检测实施方式1的半导体装置的断路故障的原理的图。
图3是表示实施方式2的半导体装置的结构的图。
图4是表示实施方式3的半导体装置的结构的图。
图5是表示实施方式4的半导体装置的结构的图。
图6是表示实施方式5的电子装置的结构的图。
具体实施方式
(实施方式1)
图1表示实施方式1的半导体装置的电路。IC芯片11构成串联稳压器。IC芯片11具有：从电源将输入电压Vi输入的输入用焊盘Pi1、将作为控制目标电压Vo输出的输出用焊盘Po1、将输出到外部的输出电压Vo作为反馈电压Vfb来反馈的反馈用焊盘Pf1。
输入用焊盘Pi1和输出用焊盘Po1之间连接有PMOS型的晶体管Q1。而且，输出用焊盘Po1和反馈用焊盘Pf1之间，连接有以从前者向后者为正向的第一二极管D1和其反方向的第二二极管D2。另外，由于在后述的断路故障的检测中不需要第二二极管D2，所以也可以省略。以下，第一、第二二极管D1、D2作为总称也简称为“二极管”。
在运算放大器OP1的反向输入端子(-)输入基准电压Vref，在非反向端子(+)输入由第一、第二分压电阻R1、R2将反馈电压Vfb分压的比较对象电压Vfb’。从运算放大器OP1输出基准电压Vref和比较对象电压Vfb’的差分，并提供给晶体管Q1的栅极。
半导体装置21具有作为导线端子的输入端子Pi2和输出端子Po2。输入端子Pi2经由输入电线Wi1连接到输入用焊盘Pi1，输出端子Po2经由输出电线Wo1连接到输出用焊盘Po1。而且输出端子Po2经由反馈电线Wf1连接到反馈用焊盘Pf1。
如图中虚线所示，输入端子Pi2上连接作为电源的电池BAT，例如提供4.5V的输入电压Vi。从输出端子Po2向负载装置31提供例如3.0V的输出电压Vo。在半导体装置21中，控制使基准电压Vref和比较对象电压Vfb’相等。
在本实施方式中，在IC芯片11的内部输出用焊盘Po1和反馈用焊盘Pf1之间连接有二极管。没有连接该二极管的情况下，反馈电线Wf1断开时，不反馈，输出电压Vo上升到大致输入电压Vi，根据情况，对负载装置31构成损伤。通过设置二极管，可以避免这样的情况。
图2表示断路故障的检测原理。在测试中，在输入端子Pi2施加从零开始慢慢上升的电压(以下称作“检测输入电压”，标记为Vti)，观察此时输出端子Po2中呈现的电压(以下称作“测试输出电压”，标记为Vto)来进行。该图中粗实线(a)为正常时，虚线(b)在输出电线Wo1断开时表示与Vti相对的Vto的动作，点划线(c)在反馈电线Wf1断开时表示与Vti相对的Vto的动作。但是，为便于观看，两条以上的线重合部分错开线表示。
(1)正常时
直到Vti＝V0，Vto都不表现为有效。V0相当于晶体管Q1开始动作时的源极/漏极电压。接着，直到Vto＝Vfb，Vto线性增加。以后，维持Vto＝Vfb。
(2)输出电线Wo1断开时
直到Vti＝V0+Vf，Vto都不表现为有效。Vf是晶体管Q1的正向压降。这是因为，Vto从晶体管Q1的漏极经由二极管D1、反馈电线Wf1出现在输出端子Po2。由此，可以通过减电测试发现故障。
(3)反馈电线Wf1断开时
Vti＝V0时，Vto表现为有效，以后，Vto线性增加点与(1)相同。但是，Vto＝Vfb时不停止，一直增加到Vto＝Vfb+Vf。以后，维持该值。这是因为，Vfb’作为输出电压通过第一二极管D1后的电压出现。由此，还是可以通过减电测试发现故障。
另外，除此以外，考虑输入电线Wi1的断路故障。此时，即使Vti变化Vto也不出现，所以容易检测。
以上，按照本实施方式，通过利用二极管，通过微弱的电流的测试可以进行断路的检测。而且，即使电线断开一根，通过二极管将输出电压和反馈电压维持在比较接近的值，可以减小输出电压过大对负载装置31构成损伤的可能性。
(实施方式2)
图3表示本实施方式的半导体装置的电路。以下，对与实施方式1相同的结构赋予相同的符号并适当省略说明。本实施方式于实施方式1不同之处在于稳压器中利用的晶体管有两个。第一晶体管Q1的配置和实施方式1相同。追加的第二晶体管Q2中，栅极、源极、漏极都与第一晶体管Q1共用。从而，第二晶体管Q2与第一晶体管Q1进行相同的动作。在本实施方式中，通过设置两个晶体管，即使各晶体管的型号比较小，也可以确保必要的驱动能力。以上的结构中的断路的检测与实施方式1相同。
(实施方式3)
图4表示本实施方式的半导体装置的电路。以下，对与实施方式2相同的结构赋予相同的符号并适当省略说明。本实施方式于实施方式2不同之处在于不是在输出侧，而是在输入侧设置两个焊盘，在其上面设置二极管。从而，在本实施方式中，适宜称作控制电路由两个焊盘的双系统接受电池电压并生成目标电压的结构。如图4所示，新设置第二输入用焊盘Pila，将其用电线连接到输入端子Pi2。另一方面，废止反馈用焊盘Pf1，也废止第一、第二二极管D1、D2，第一、第二晶体管Q1、Q2的漏极直接连接到输出用焊盘Po1。第一晶体管Q1的源极与实施方式2相同，第二晶体管Q2的源极连接到新设置的输入用焊盘Pila，第二晶体管Q2和第一晶体管Q1的漏极之间连接以从前者向后者为正向的第三二极管D3和其反方向的第四二极管D4。以上的结构中的断路的检测通过以下的方法进行。
(1)新设置的输入电线Wila断开时
第二晶体管Q2的源极电位下降从Vti向第四晶体管D4的正向压降Vf，所以第二晶体管Q2的导通的程度减弱。其结果，作为IC芯片11整体的驱动能力下降，所以通过在输出端子Po2监视驱动电流，可以检测电线断路。另外，即使电线断开，通过使第二晶体管Q2进行某种程度的动作，可以防止对第一晶体管Q1施加过度的负载。
(2)从最初开始存在的输入电线Wi1断开时
可以用和(1)同样的方法检测。
(3)原电线Wo1断开时
当然，由于即使Vti变化Vto也不出现，所以容易检测。
(实施方式4)
图5表示本实施方式的半导体装置的电路。本实施方式组合了实施方式2和3。在输入侧和输出侧都设置两个焊盘。即，输入侧与实施方式3结构相同，输出侧与实施方式2结构相同。从而，输入侧的断路的检测与实施方式3可以利用相同方法，输出侧的电线断路与实施方式2可以利用相同方法。
本实施方式兼具实施方式2和3的效果。首先，可以用微弱电流检测电线断路故障。而且，即使输出侧的电线断开，也难以对负载装置31构成损害。进而，即使输入侧的电线断开，也难以向任何一个晶体管施加过电荷。输入、输出路径都被多路化，所以本实施方式适合大电流的驱动。
(实施方式5)
图6是装载了实施方式1的半导体装置的电子装置的概念结构图。但是，在实施方式1中，在半导体装置的内部设置了二极管，但这里设置在外部。而且，在实施方式1中输出用管脚Po2兼作反馈用管脚，但该实施方式中新设置反馈专用管脚Pf2。
电子装置40的印刷基板41上装载半导体装置21和负载装置31。半导体装置21的输出端子Po2和负载装置31的输入端子通过印刷基板41上形成的输出用配线Lo被连接。半导体装置21的反馈专用管脚Pf2和输出用配线Lo上的点N通过反馈用配线Lf被连接。输入端子Pi2上通过结构配线被施加输入电压Vi。第一二极管D1在从输出用配线Lo向反馈用配线Lf的方向上连接到印刷基板，第二二极管D2在其反方向上连接到基板。
根据以上的结构，在半导体装置21内部没有二极管的情况下，实施方式1同样的效果，即负载装置31的保护和断路的检测变得容易。另外，按照本实施方式，在印刷基板安装测试步骤中，不仅半导体装置21内部的断路，也可以检测在印刷基板41上安装了半导体装置21时的输出用管脚Po2、反馈用管脚Pf2的虚焊造成的断路故障。
以上，基于实施方式说明了本发明。该实施方式为例示，可以有各种变形例，而且本领域计数人员可以理解这些变形例也属于本发明的范围。
例如，实施方式中使用了MOS晶体管。但是，当然晶体管也可以是双极型的。
在实施方式中，作为控制电路说明了串联稳压器。但是控制电路也可以具备开关稳压器、电荷泵型稳压器等其它的稳压器。

Claims (5)

1.一种半导体装置，具有：
具有第一焊盘和第二焊盘的IC芯片；以及连接到所述第一焊盘和第二焊盘两方的端子，
其特征在于：
由二极管来耦合所述第一焊盘中连接的第一信号和所述第二焊盘中连接的所述第二信号。
2.如权利要求1所述的半导体装置，其特征在于：
所述端子是输入端子，
该半导体装置还具有：控制电路，对所述输入端子施加电源电压时，由该电源电压生成目标电压；以及输出端子，输出生成了目标电压，
所述控制电路为如下结构：用第一以及第二信号的双系统接受所述电源电压，生成所述目标电压。
3.如权利要求1所述的半导体装置，其特征在于：
所述端子是输入端子，
该半导体装置进而具有：被施加规定的电源电压的输入端子；以及由该电源电压生成目标电压控制电路，
将所述目标电压传送到所述第一信号或所述第二信号的任何一个上。
4.一种半导体装置，包含：
被施加电源电压的输入端子；由述电源电压生成目标电压的控制电路以及输出生成了的目标电压的输出端子，
其特征在于：
对所述输入端子或输出端子的至少一方，设置多个IC芯片侧的焊盘并将信号传送路径多路化，同时对多路化的信号传送路径之间用二极管进行耦合。
5.一种电子装置，装载半导体装置和负载装置，其特征在于：
所述半导体装置包含：被施加电源电压的输入端子；由所述电源电压生成目标电压的控制电路以及输出生成了的目标电压的输出端子，
对所述输入端子或输出端子的至少一方，设置多个IC芯片侧的焊盘并将信号传送路径多路化，对多路化的信号传送路径之间，在所述半导体装置内部或半导体装置和所述负载装置之间的部位，用二极管进行耦合。
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