CN1491436A - 芯片转移方法及装置 - Google Patents
芯片转移方法及装置 Download PDFInfo
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- CN1491436A CN1491436A CNA028046951A CN02804695A CN1491436A CN 1491436 A CN1491436 A CN 1491436A CN A028046951 A CNA028046951 A CN A028046951A CN 02804695 A CN02804695 A CN 02804695A CN 1491436 A CN1491436 A CN 1491436A
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Abstract
本发明针对一种用于把集成电路元件(3)从源衬底(1)转移到目标衬底(2)上的预定位置(12)的方法。提供其上具有集成电路元件(3)的源衬底(1)和具有可控制粘附性的粘附性材料的层(8)的元件转移夹具(4)。元件转移夹具(4)降低到集成电路元件(3)上,从而使粘附性具有宜于把集成电路元件(3)固定到元件转移夹具(4)上的第一值。然后,集成电路元件(3)从源衬底(1)释放并且具有粘附到其上的集成电路元件(3)的元件转移夹具(4)从源衬底(1)移开。目标衬底(2)设置有排列在预定位置(12)处的微滴(9),并且具有粘附到其上的集成电路元件(3)的元件转移夹具(4)降低到目标衬底(2)上,使得集成电路元件(3)与微滴(9)接触。然后,将粘附性材料的粘附性设定为宜于将集成电路元件(3)从元件转移夹具(4)释放的第二值,因此微滴(9)使集成电路元件(3)对准到预定位置(12)。最后,从集成电路元件(3)移开元件转移夹具(4)。
Description
技术领域
本发明涉及一种把集成电路元件从源衬底转移到目标衬底上的预定位置的方法及其装置。更具体地说,本发明涉及一种把VCSEL芯片或其它光学或非光学元件转移到硅衬底基芯片的落点区域上的方法。
背景技术
目前,芯片至芯片传输正经历重要发展阶段。TTL-级(TTL-level)传输不再能处理需要在芯片之间传输的巨大数据量。正在发展平行高速连接的几种方法。利用这样的技术,用有限数量的IC管脚能处理显著更高的数据速率,这是机械可行的。然而,可以预见由于超过1500管脚的封装的成本问题,存在大约1TB/s的硬件限制。此外,信号丢失、离散和可容许的芯片功率将互连的位速率限制在大约每管脚每秒10GB。解决方法是使用光学通道,不仅用于长距离的传输而且用于短距离芯片至芯片的传输。然而光学互连需要光源。这些运用具体可取的是垂直谐振腔表面发射激光器(VCSEL)。目的是用光学互连代替大的硅CMOS芯片的电气IOs。可惜地是,由于硅的间接能带隙,对于激光器或LEDs,硅是不可用的材料。结果,不得不使用脱离芯片(off-chip)激光器,这引起严重装配问题。用于连接CMOS芯片与外部激光器芯片的短电气互连还是必要的。这种互连可以是短的,但是由于寄生电容还是存在问题。此外,成百个激光器的安装是非常昂贵的。由于CMOS芯片的每个管脚需要极接近的激光器,因此大的单芯片激光器阵列是不可行的。
几个研究组试图通过在Si上生长例如GaAs的薄层来解决问题。这样能够实现在硅芯片上的激光器的单片集成。可惜地是,由于晶格常数的很大差异,Si上生长GaAs是非常困难的。
其它研究组开发了转移薄GaAs层到硅上的技术。这个想法是转移含有激光器或其它光学元件的III/V半导体材料的薄(小于一个微米至几微米)层。激光器的特性将不会因转移而改变。因为层很薄,用标准金属化技术例如CMOS芯片的最终金属化水平就能完成CMOS电路和激光器之间的互连。结果产生CMOS电路和例如激光器的单片集成。该技术目前的局限性在于其是相当地手工工艺。目前每次手工地转移一个激光器,使其在任何商业效率的制造工艺中是不可用的。
在Nr.11800,1996年的由T.E.Morf、Diss.ETH发表的“Epitaxial Lift-offApplications in Microwave Circuits and Optoelectronics”中,给出了外延剥离(epitaxial lift-off)工艺的观点,该工艺能用于使器件同它们的衬底分离并且使这些器件能够转移到目标衬底上。可使用真空夹子来拾取器件。
在由I.Pollentier、P.Demeester、P.Van Daele、D.Rondi、G.Glastre、A.Enard和R.Blondeau等人发表的“Fabrication of long wavelength OEICs using GaAson InP epitaxial lift-off technology”(关于InP和相关材料的第三次国际会议学报,美国纽约,1991年,第268-71页)中,描述了在使用水滴的情况下转移器件的对准原理。
发明内容
这里描述的本发明是一种装配工艺,能用来晶片级地转移垂直谐振腔表面发射激光器(VCSEL)和光二极管。成百或甚至上千的激光器和光二极管能同时地转移到CMOS晶片上。
根据本发明的第一方面,提供一种用于把集成电路元件从源衬底转移到目标衬底上的预定位置的方法。
根据本发明的第二方面,提供一种用于把集成电路元件从源衬底转移到目标衬底上的预定位置的装置。
根据本发明的第三方面,该方法和装置允许同时地转移大量的集成电路元件。
根据本发明的第四方面,该方法和装置允许集成电路元件可选择地转移到一个或更多目标衬底上。
根据本发明的第五方面,集成电路元件在目标衬底上经历自动对准。
本发明针对一种把集成电路元件从源衬底上转移到目标衬底上的预定位置的方法。在第一步骤中,把具有由可控制粘附性的粘附性材料构成的粘附层的元件转移夹具降低到位于源衬底上的集成电路元件上。该粘附性具有宜于把集成电路元件固定到元件转移夹具上的第一值。在第二步骤中,将具有粘附到其上的集成电路元件的元件转移夹具移向具有排列在预定位置处的微滴(droplet)的目标衬底。在第三步骤中,把具有粘附到其上的集成电路元件的元件转移夹具降低到目标衬底上,以便使集成电路元件与微滴接触。在第四步骤中,设定粘附层的粘附性为宜于将集成电路元件从元件转移夹具释放的第二值,从而微滴使集成电路元件对准到预定位置。最后,移开元件转移夹具。
这里描述的技术可以看作外延剥离(ELO)技术的进一步发展。ELO的基本思想是释放III/V材料的薄膜片并且转移该薄膜片到新的宿主材料上。通过范德华力使薄膜附着到新的宿主材料上。关键的步骤是将薄膜从它的生长衬底上脱离以及转移和对准它。根据现有技术的状态用手工的拾取和放置工艺完成后者,在单一薄膜片上的操作使其在任何商业制造工艺中是不可用的。本发明提出用自动晶片-级工艺使得消除这种手工工艺。
当通过对准元件使元件转移夹具与源衬底对准时是有利的,因为因此集成电路元件相对于元件转移夹具的对准是可实现的,使得接下来在集成电路元件区域中的粘附性得以精确控制。
在第二步骤之前,通过除去源衬底或集成电路元件下方的牺牲层,可使集成电路元件脱离源衬底。这样的优点是,于是集成电路元件被隔离并能作为单个元件转移到目标衬底。因此几个集成电路元件能制作在同一衬底上并且彼此之间隔离地将被选择性地转移。为了彼此之间隔开几个这样的集成电路元件,可例如用蚀刻法在集成电路元件之间形成沟槽。
一种简单、便宜并快速的提供粘附层的方法是使元件转移夹具与装有粘附性材料的容器表面接触以及从容器移开元件转移夹具。粘附层也能是压印、喷涂或通过滚轴、刮片或刷子施加到元件转移夹具上。压印或使其与容器接触具有使粘附层的厚度非常均匀的优势,这样有利于更精确地控制粘附性。
如果元件转移夹具提供用于集成电路元件并具有集成电路元件的大致横向尺寸的固定区域的构造,那么存在用于集成电路元件的预定区域。这样使集成电路元件更好地对准到元件转移夹具上,例如,通过使用固定区域的结构边缘。同样地,大致仅在集成电路元件的固定区域,用于集成电路元件的粘附层的粘附性可被控制。这样使得选择性地粘附和/或释放元件转移夹具上的集成电路元件。甚至不同的集成电路元件可以粘附到同一个元件转移夹具上。
通过使用液滴可提供一种简单并仍然是选择性对准。这里的微滴可以理解为有限数量的液体。因此该微滴也能是薄的液态膜。通过施加液体到包括处于预定位置处的亲水性的可湿性-结构层的目标衬底上,液滴能有利地排列在预定位置。从而简单地施加液体到整个目标衬底将当然仅在由可湿性-结构预定的那些位置处留下液滴。可用光刻工艺或压印步骤施加可湿性-结构。不需要实行液滴的主动对准,并降低微滴例如由于像重力或气流的外界环境影响而离开其位置的风险。可湿性-结构也影响含在微滴中的液体数量的自动限制。那么液滴的表面张力适于影响集成电路元件的对准。
用热可控的粘附层使得能够利用加热器来控制粘附性。这样提供了一种便宜和容易可行的控制方法。通过电流感应加热,例如,通过提供设定在电流下被加热的线圈或弯曲金属丝结构,把加热器结合到元件转移夹具中是可行的。即使局部加热也是可很好控制的,从而用于元件转移夹具的材料的优点是,其提供一种热导性,基本不会使存在于一个集成电路元件位置处的热来控制在另一集成电路元件位置处的粘附性。从而可实现选择性粘附性控制。
附图说明
本发明的例子描绘在附图中并且下面通过例子详细地描述。在附图中:
图1示出了在源衬底上的集成电路元件上方的元件转移夹具;
图2示出了具有浸湿的落点区域的目标衬底上方的粘附有集成电路元件的元件转移夹具;
图3示出了元件转移夹具已经移去后的具有放置的两个集成电路元件的目标衬底。
所有的附图为了清楚而不显示其真实的尺寸,也不显示现实比例的尺寸之间的关系。
具体实施方式
接下来,描述本发明的各种示范性的实施例。
如图2所示,用任何现有的CMOS工艺加工含有数个芯片的CMOS晶片2。其中,在最后的金属化步骤之后停止该工艺。芯片具有用于集成电路元件3(这里是VCSELs3)的落点区域12。此时落点区域12是所需的光学输入的信号衬垫。然后,除落点区域1 2以外,整个CMOS晶片2被制成憎水性的。因此,它覆盖有可湿性-结构层15,其被构造成使落点区域12是亲水性的而可湿性-结构层15的其余部分是憎水性的。该CMOS晶片2也称作代表集成电路元件3的VCSELs3的目标衬底2。落点区域12是用于这些集成电路元件3的预定位置12。CMOS晶片2固定在目标衬底底座5上。
如图1中所描绘的,VCSELs3制造在具有VCSELs3下方的蚀刻终止层10的VCSEL晶片1上。可以使用任何标准VCSEL工艺来制造VCSELs3。尺寸例如为50μm×50μm的数百万VCSELs3可以加工在标准4英寸GaAs晶片上,结果产生低成本的器件。下文中VCSEL晶片1也称作源衬底1,其被固定在源衬底底座6上。
接着,从VCSEL晶片1的顶部表面上,在所有的VCSELs3之间蚀刻沟槽。沟槽达到蚀刻终止层10,从而VCSELs3彼此之间被分隔开。这可以用常规的干蚀刻技术完成。同时可将对准元件13制作在VCSEL晶片1上。在图1的下半部分描绘了所产生的结构。
图1中还示出了元件转移夹具4。硅晶片形式的元件转移夹具4用于接下来的转移工艺中,即,把集成电路元件3从源衬底1转移到目标衬底2。该元件转移夹具4可以具有与VCSEL晶片1一样的尺寸。在该元件转移夹具4中产生沟槽以在下表面上形成栅格图案,从而栅格可以比VCSELs3稍大,例如,70μm×70μm。用电流可单独地加热这些栅格。因此,加热器7的阵列设置在元件转移夹具4上。元件转移夹具4还包括与对准元件13相对应的对向对准元件14。通过夹具移动器16,元件转移夹具4的位置是可控制的,该夹具移动器16提供3维可移动性。如图1所示,元件转移夹具4设置为栅格-结构表面朝下。
为了能用元件转移夹具4把VCSELs3从VCSEL晶片1(源衬底1)转移到目标衬底2上,元件转移夹具4提供有粘附层8,该粘附层8是包括粘附性材料的层。该粘附层8具有可随外部影响而变化的可控制的粘附性的特性。此时通过热影响粘附性是可控制的,加热器7作为粘附性控制器7。
作为粘附性材料,少量的腊用压印方法施加到栅格上,也就是,使VCSEL晶片1与蜡供给器接触,从而腊附着到突出的栅格区域,简称作栅格,用来作为VCSELs3的固定区域11。因此,元件转移夹具4包括作为粘附层8的图案化腊层8,从而每一栅格的腊层8的粘附性是独立可控的。
这些加热器7可埋入元件转移夹具4中并因此位置靠近栅格图案化表面,但也可实现为元件转移夹具4的上表面上的结构的形式。同样,加热器7被设置在元件转移夹具4的下表面上,直接地位于元件转移夹具4和粘附层8之间是可行的,以提供粘附性的最佳可控性。
接着,元件转移夹具4放置到VCSEL晶片1上。从而使腊接触VCSELs3。通过对准结构13,10μm内的对准是可行的。在下面的蚀刻步骤中,元件转移夹具4将密封住VCSELs3的顶部部分。然后从背面蚀刻VCSEL晶片1,直到达到蚀刻终止层10。为了加速该工艺,VCSEL晶片1可例如通过研磨被机械化减薄到第一厚度,从而可得到25μm的厚度,并且此后被蚀刻掉。由于蚀刻是较慢的工艺,因此机械化减薄较快速地去除衬底。接着,在也可与第一蚀刻步骤合并的第二蚀刻步骤中蚀刻掉蚀刻终止层10。在该步骤之后,所有的VCSELs3均仅仅通过腊层8与元件转移夹具4连接。图2中描绘了具有粘附在腊覆盖栅格11的单个VCSELs3的元件转移夹具4。衬底去除的一种选择方法可以是剥离(lift-off)工艺,其中除去蚀刻终止层10而不是VCSEL晶片1的整个衬底。蚀刻剂可从侧面到达蚀刻终止层10。为了加速该工艺,使该蚀刻剂也在其它位置到达蚀刻终止层10是有利的。在VCSELs3之间存在空间,此处该蚀刻剂可以流过,但也可以在元件转移夹具4或VCSEL晶片1中提供通道,使蚀刻剂流向蚀刻终止层10。一旦除去蚀刻终止层10,从VCSEL晶片1分离VCSELs3是可能的。
CMOS晶片2,即目标衬底2,浸蘸在去离子水中。由于除了用于VCSELs3的落点区域12以外的目标衬底2的任何地方都是憎水性的,从而仅在落点区域12形成水滴9。CMOS晶片2的其余部分保持干燥。然后,在目标衬底2上的水滴9被用于目标衬底2的落点区域12上的VCSELs3的自动对准。
如图2中所描绘的,然后使挂在元件转移夹具4上的VCSELs3接触CMOS晶片2上的水滴9。通过选择性加热并从而熔化腊层8,将被选择的VCSELs3释放。固定这些VCSELs3的腊变成液态并且腊层8的粘附力下降,使得VCSELs3将不再附着在元件转移夹具4上并且进入水滴9的作用范围内。VCSELs3将在几微米的范围内自对准到CMOS晶片2上的预定落点区域12上。如果VCSELs3在它们的上侧面具有尖锐的边缘,那么对能基本防止腊滴落并负面影响转移工艺的可靠性并得到最终排列的后功能是有利的。由于VCSELs3仍然具有典型地7μm的厚度,该尺寸提供可能腊流动的安全性裕度。然后可移开元件转移夹具4,留下前述步骤中释放的那些VCSELs3。产生的结果如图3所示。
因此,腊基本保留在元件转移夹具4以及还没有脱离的那些VCSELs3也保留在元件转移夹具4上。目标衬底2上的水将通过加热加速蒸发。一旦水消失后,VCSELs3压在落点区域12上。清洗步骤中使用溶剂等可除去留在VCSELs3上的可能存在的腊。然后典型地范德华力使VCSELs3保持在位置处,特别是,当VCSEL另外很快重新压在落点区域12上时。同样,也可以使用胶或者用金属把VCSELs3焊接到落点区域12上。这在使用包括将要压在目标衬底2上的位于其底面的接触衬垫的VCSELs3的情况下是有利的。然后,用于VCEL接触的布线可以预先制作在目标衬底2上并且在其落点区域12上放置VCSELs3后,通过加热接触区域可将VCEL触点连接到布线上。
用这种方法可以同时转移成百到上千的VCSELs3。VCSEL晶片1和元件转移夹具4最大可能性是小于CMOS晶片2。为了放置VCSELs3在CMOS晶片2上的任意位置处,元件转移夹具4可以在CMOS晶片2的上方移动并且VCSELs3将在预期的位置处被释放。
如果VCSELs3在它们的上侧具有一个或更多的电触点,那么至该侧面的布线是必要的。在VCSELs3放置在目标衬底2上之后可以进行构图金属化步骤,但如果VCSELs3的垂直尺寸太高,那么金属化可能失败。因此可在VCSELs3处设置支持材料,使从目标衬底2到VCSELs3的上侧的过渡平坦。因此可以用图案化聚酰亚胺层。
作为粘附层8,粘附性为热可控性或其它可控性的其它材料也是适合的。静电场也可以用作粘附力。其它液体也能替代水用于对准。
元件转移夹具4设计成能重复使用的。
任何公开的实施例可以部分地也可以全部地结合所示的和/或所描述的其它实施例中的一个或几个。这也可能是对实施例的一个或多个特征。显然在不脱离由权利要求包含的本发明的构思下,本领域的技术人员可使用多种方法修改所示的配置。
Claims (13)
1、一种用于把集成电路元件(3)从源衬底(1)转移到目标衬底(2)的预定位置(12)的方法,包括:
a)在第一步骤中,把具有由可控制粘附性的粘附性材料构成的粘附层(8)的元件转移夹具(4)降低到位于源衬底(1)上的集成电路元件(3)上,从而该粘附性具有宜于把集成电路元件(3)固定到元件转移夹具(4)上的第一值,
b)在第二步骤中,将具有粘附到其上的集成电路元件(3)的元件转移夹具(4)移向具有排列在预定位置(12)处的微滴(9)的目标衬底(2),
c)在第三步骤中,把具有粘附到其上的集成电路元件(3)的元件转移夹具(4)降低到目标衬底(2)上,使得集成电路元件(3)与微滴(9)接触,
d)在第四步骤中,设定粘附层(8)的粘附性为宜于将集成电路元件(3)从元件转移夹具(4)释放的第二值,从而微滴(9)使集成电路元件(3)对准到预定位置(12),
e)在第五步骤中,移开元件转移夹具(4)。
2、根据权利要求1的方法,其中在第一步骤中,通过对准元件(13)使元件转移夹具(4)与源衬底(1)对准。
3、根据权利要求1或2的方法,其中在第二步骤前,通过除去源衬底(1)或集成电路元件(3)下方的牺牲层,将集成电路元件(3)从源衬底(1)释放。
4、根据权利要求1至3之一的方法,其中通过使元件转移夹具(4)接触装有粘附性材料的容器的表面以及从容器移开元件转移夹具(4),在元件转移夹具(4)上形成粘附层(8)。
5、根据权利要求1至4之一的方法,其中元件转移夹具(4)提供用于集成电路元件(3)并具有集成电路元件(3)的大致横向尺寸的固定区域(11)的结构。
6、根据权利要求5的方法,其中用于集成电路元件(3)的粘附层(8)的粘附性大致仅在它的固定区域(11)中被控制。
7、根据权利要求1至6之一的方法,其中通过施加液体到包括位于预定位置(12)的亲水性的可湿性-结构层(15)的目标衬底(2),使该液体的微滴(9)排列在预定位置(12)处。
8、根据权利要求1至7之一的方法,其中该粘附性材料包括诸如腊的热可控性材料。
9、一种用于把集成电路元件(3)转移到目标衬底(2)上的预定位置(12)的装置,该装置包括:
a)具有由可控制粘附性的粘附性材料构成的粘附层(8)的元件转移夹具(4),用于把集成电路元件(3)固定到其上,
b)用于控制粘附层(8)的粘附性的粘附性控制器(7)。
10、根据权利要求9的装置,还包括夹具移动器(16),用于把元件转移夹具(4)降低到源衬底(1)上的集成电路元件(3)上,而且用于将具有粘附到其粘附层(8)上的集成电路元件(3)的元件转移夹具(4)移向目标衬底(2),以及用于从集成电路元件(3)移开元件转移夹具(4)。
11、根据权利要求9或10的装置,还包括目标衬底底座(5)和/或源衬底底座(6)。
12、根据权利要求9至11之一的装置,还包括与源衬底(1)上的对准元件(13)相对应的对向对准元件(14)。
13、根据权利要求9至12之一的装置,其中粘附性控制器(7)设计成控制基本仅在具有集成电路元件(3)的大致横向尺寸的固定区域(11)中的粘附层(8)的粘附性。
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WO2002063678A1 (en) | 2002-08-15 |
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US20040154733A1 (en) | 2004-08-12 |
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