CN1439170A - 非晶金属氧化物栅介质结构及其方法 - Google Patents

非晶金属氧化物栅介质结构及其方法 Download PDF

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CN1439170A
CN1439170A CN01809184A CN01809184A CN1439170A CN 1439170 A CN1439170 A CN 1439170A CN 01809184 A CN01809184 A CN 01809184A CN 01809184 A CN01809184 A CN 01809184A CN 1439170 A CN1439170 A CN 1439170A
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silicon
flow
metal
semiconductor wafer
gas
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P·V·阿卢里
R·L·汉斯
B-Y·尼古因
C·C·霍伯斯
P·J·托宾
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NXP USA Inc
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Abstract

根据本发明的具体实施方式,公开了一种形成栅介质层的方法。在淀积室中方式半导体晶片(34)。加热半导体晶片(34),前体气体流入淀积室中。在一个实施例中,前体包括硅、氧和过渡金属的成分。在另一个实施例中,成分包括2族金属。

Description

非晶金属氧化物栅介质结构及其方法
发明领域
本发明一般涉及采用金属氧化物形成的栅介质,尤其涉及形成非晶金属氧化物栅介质的方法。
发明背景
在集成电路中采用栅介质层作为栅结构的组成,栅结构控制电流从晶体管的源到漏的流动。通过减少栅介质层的厚度,由于提高了晶体管的打开性能,从而增加了晶体管的整体性能。
为了减少晶体管的尺寸,就需要相当地减少相当的栅介质层厚度,此处,相当的栅介质层厚度是指相当的二氧化硅栅介质层的厚度。一种在半导体器件中有效减少相当的氧化物厚度的方法已经采用了高K介质材料来代替二氧化硅。人们知道,在保持相同的电特性时,采用高K介质材料制成的介质层的物理厚度大于相当的二氧化硅介质层。例如,如果二氧化硅介质层具有为4的介质常数并且生长到30埃厚,那么具有介质常数为8的高K介质材料就淀积或生长到60埃的厚度并且还具有与更薄的二氧化硅介质层同样相当的氧化物厚度。因此,采用高K介质体优于二氧化硅的原因在于,它允许生成更厚的介质层,并仍可获得薄于相当的氧化物厚度的所希望的范围。
现有的高K介质材料包括金属氧化物和金属硅酸盐。在工业中,已知过渡金属氧化物,例如五氧化钽、二氧化钛、二氧化锆以及二氧化铪,和锆和铪的硅酸盐是介质常数高于二氧化硅的高K介质材料。
在工业中,有人已经提出直接在硅衬底上淀积金属氧化物以形成多晶结构。通常,利用PVD(物理气相淀积)或CVD(化学气相淀积)方法进行这种淀积,以由金属氧化物形成均匀厚度的介质层,同时将在硅衬底和淀积的金属氧化物之间的任何界面材料减少至最小。但是,此类型的这种淀积金属氧化层的形成会引起二氧化硅薄层形成在硅衬底和电极金属氧化物栅介质层之间。
由于硅衬底与在周围环境中存在的任何氧的反应性,因此发生了在硅衬底和淀积的金属氧化物栅介质层之间二氧化硅层的形成。结果,在硅衬底的顶部形成了二氧化硅的薄过渡层。此二氧化硅层的厚度一般约为一纳米厚。此薄介质层的存在形成了可获得的相当(equivalent)氧化物厚度的下界。换句话说,不管金属氧化物层的高K介质值或其厚度,可获得的相当氧化物的厚度不能低于下层二氧化硅界面层的厚度。
除了二氧化硅界面层—此界面层限制了可获得的相当氧化物的厚度-之外,淀积金属氧化物以形成高K多晶结构所具有的另一个缺点是,在介质自身中引入了俘获位。这些俘获位或阱位会影响晶体管的电性能。例如,俘获位会影响半导体器件的阈值电压和长期的可靠性。通常,这些俘获位出现在金属氧化物多晶结构的颗粒边界之间。
为了减少界面的二氧化硅层的影响,在现有技术中的一种方法在金属氧化物栅介质层形成的开始引入了氮气氛。通过引入氮气氛,二氧化硅层将掺杂有氮,由此提高了介质常数。但是,这种引入氮的方案导致了额外的处理步骤并且仍引起了限制的氧化物界面层。另外,在Si/介质层界面上存在氮会提高界态密度,引起器件性能变差。
在现有技术中,用于形成高K栅介质层的另一种方法是用高K过渡金属氧化物形成并掺杂二氧化硅层。所得到的介质层少量地掺杂有金属氧化物,使得金属氧化物与氧化硅的掺杂比约为10%。但是,此解决方案仍会导致硅介质层的形成,通过少量掺杂金属氧化物此方案仅少许地得以提高。为了提高整个的介质常数值,希望以非晶形式掺杂更多的金属氧化物。在本领域中所知的淀积非晶金属氧化物以形成金属氧化物介质的方法会导致对阱形成不敏感的介质层。
因此,能够获得相对于氧化硅具有可变的金属氧化物组成的非晶膜的方法和结构是有利的。
附图的简要说明
图1和6表示在硅结构的横截面图上用于形成高K介质层的一种或多种前体。
图2-5和8-9以化学式的形式表示根据本发明的前体。
图7表示根据本发明的处理室的横截面图。
图10表示结合了图6的介质层的晶体管叠层的横截面图。
附图的详细描述
根据本发明的具体实施方式,公开了形成栅介质的方法。在淀积室中放置半导体晶片。加热半导体晶片,化合物例如前体气体流入到腔室中。在一个实施例中,前体包括硅、氧及过渡金属的组成成分。在另一个实施方式中,组成成分包括2族金属。实现了具有易控制的金属与硅的比例的非晶栅介质的形成。
参考图1-10最好地理解本发明。具体而言,图1表示半导体衬底10,在衬底10的上面形成有高K介质层12。根据本发明的具体实施方式,高K介质层12是非晶金属氧化物层。具体而言,层12可以是一种或多种金属氧化物的混合物。
图1表示非晶金属氧化物介质层12,此层12已经通过采用多种前体14和16形成。具体而言,图1表示金属氧化物前体14与氧化硅前体16同时引入。通过相对于前体16变化前体14的浓度,可以控制在介质层12中金属氧化物与氧化硅的比例。因此,在形成非晶层的同时,高K介质12的介质值(dielectric value)可以从二氧化硅的介质值约为4向所采用的金属氧化物的介质值变化。
在具体实施方式中,形成18∶7的金属与硅的比例,在此采用的比例表示过渡金属原子与硅原子的原子比。在另一个实施方式中,可使用从约9∶1至1∶9的比例,但优选大于1∶1。可以采用CVD方法,通过在300℃至800℃的温度下进行淀积而获得所希望的比例。淀积气氛是惰性气体,例如氩、氮或含有例如O2、N2O或O3的氧。在CVD处理过程中(间接(remote)或直接)形成的等离子保持在大约0-2瓦特/平方厘米之间。用于形成介质层的压力保持在大约0.1-100乇之间。
根据本发明采用前体的例子包括金属氧化物前体,在此,金属包括四族过渡金属。这种前体四族金属的例子包括钛、钽、铪以及锆,这些金属以醇盐、β-二酮化物(diketonate)以及硝酸基(nitrato)的方式提供。具体例子包括锆-t-丁氧化物(butoxide)、Zr(THD)4、Zr(NO3)4以及乙氧基钽。另外,可以采用形成了硅酸盐的2族和3族金属,例如分别是SrSiO3和La2SiO5
根据本发明采用的硅前体的例子包括TEOS、硅烷、二氯硅烷、二硅烷以及四氯化硅。
图2和3表示前体的类别,这些前体可以用作图1的金属氧化物前体14。在图2-7中,字母R表示与前体相连的离去基团,通常是烷基。前体的离去基团通常用于方便前体成分的传输。图2和3的前体的成分包括前体的氧-过渡金属-氧-硅部分,此处连字号“-”表示连接键。
实际应用中,图2或图3的前体可以用作图1的前体14。此前体14与前体16一起使得在衬底10和介质层12之间形成硅-氧键。作为硅衬底与氧键合的结果,获得了与衬底界面的良好介质。另外,由于硅表面直接键合到该组成成分,因此减少或消除了所不希望的原有技术二氧化硅界面层的影响。因此,该前体成分与图1的氧化硅前体16结合,可以控制介质层12的介质常数,而不受所不希望的原有技术二氧化硅界面层的限制。
这优于其中二氧化硅过渡层具有约1纳米厚的原有技术,在此,纯金属氧化物介质层以多晶的形式淀积。另外,可以形成非晶介质层,它由氧化硅构成、以金属氧化物作为掺杂剂。通过选择合适的工艺条件例如总压、温度、气体的分压,可以控制金属氧化物本身的量。
图4-5表示可以用作图1的前体14的另一类型的前体。具体而言,图4和5的前体包括与图2和3相似的成分:氧-过渡金属-氧-硅,但是图4和5的前体的硅键不直接键合到氧原子,而是键合到单独的离去基团。例如,图4的离去基团(R)可以包括任何烷基。应注意,在相同的前体分子中,前体的各离去基团可以不同。例如,图2的分子可以具有六个不同的离去基团。
采用所示类型的前体形成介质层12,作为提取反应的一部分。通过提取反应,前体气体分离成自由元素,这些元素然后再结合以形成衬底12。
通过控制相对于前体16的前体14的浓度,可以从约为4的二氧化硅的介质常数到所选的金属氧化物的介质常数的的整个范围内对介质常数进行选择。
图6表示本发明的另一个实施例,由此提供了单来源的金属氧化物前体,以形成介质层22。具体而言,图2-5的前体可以用作单来源前体以形成非晶介质层。这种非晶介质层可以依据所选成分具有固定的金属-对-硅比例,或者可以通过调节工艺条件而具有不同的金属-对-硅比例。由于单独的前体来源,在此方法中利用前体的优点包括简化工艺。
图7表示用于制造本发明的介质层的处理室。具体而言,在该室中,晶片放置在半导体衬底支架36之上。接着,从第一来源32提供金属氧化物前体,同时从第二源30提供硅前体。具体而言,硅前体还可以包括过渡金属元素,正如参考图2-5的前体讨论的那样,而过渡金属源32在不存在硅前体的条件下提供过渡金属。通过半导体衬底支架36控制半导体衬底34的温度。可以采用半导体衬底支架36来加热或冷却半导体衬底34,以控制其温度。
在另一实施例中,可以将氧化铝(Al2O3)掺杂到金属氧化物例如ZrO2、HfO2、Ta2O5以及La2O3中,以形成非晶栅介质。应注意,上述的全部方案均可应用到Al2O3掺杂金属氧化物,在铝和氧之间有一个连接键,在氧和这些过渡金属之间有另一个键。图8和9描述了包括铝、氧和过渡金属成分的前体的例子。
图10描述了具有在此描述的类型的栅介质62的半导体器件。具体而言,图10表示由隔离区102围绕的晶体管。晶体管包括一部分半导体衬底10、掺杂区105、栅介质62、侧壁间隔件101以及导电栅108。除了晶体管之外,图10描述了其它层和互连结构,包括介质层107、导电层109、介质层103、导电双嵌入(dual-inlaid)结构122和112,和介质或钝化层142。可以利用在此描述的栅介质层形成技术、并结合其它在半导体领域所知的其它技术,形成图10所示的半导体器件,以得到改进的半导体器件。
现在可以认识到,在此描述的器件和方法优于原有器件和方法。通过利用所描述类型的前体形成栅介质层,减少、甚至消除了与原有技术相关的氧化硅过渡层。此外,本方法具有简单的工艺流程,有利于方便地选择金属-对-硅的浓度。应进一步认识到,本发明已经公开了其具体实施方式,在没有脱离如下述权利要求中所列出的本发明的范围的情况下,可以进行各种变化和修改。因此,应认为说明书和附图是示意性的,而并非限制性的,所有这些修改包括在本发明的范围之内。

Claims (26)

1.一种淀积介质的方法,包括步骤:
在淀积室中放置半导体晶片;以及
使第一化合物流入此淀积室中并流到半导体晶片之上,其中该化合物包括硅、氧,来自包括锆、铪及钛的金属。
2.根据权利要求1的方法,进一步包括使包括该金属和氧的第二化合物流动。
3.根据权利要求2的方法,进一步包括加热半导体晶片,以使所述介质淀积在半导体晶片上并且介质的金属与硅的比例大于一比一。
4.根据权利要求3的方法,其中金属是锆。
5.根据权利要求4的方法,其中锆与硅的比例大于二比一。
6.根据权利要求5的方法,其中锆与硅的比例至少是十八比七。
7.根据权利要求3的方法,其中金属是铪。
8.根据权利要求4的方法,其中铪与硅的比例大于二比一。
9.根据权利要求5的方法,其中铪与硅的比例至少是十八比七。
10.根据权利要求1的方法,其中金属是锆或铪。
11.根据权利要求10的方法,其中第一化合物进一步包括一种或多种烷氧基,以及一种β-二酮基。
12.根据权利要求11的方法,其中由第一化合物以化学气相淀积形成介质层。
13.根据权利要求11的方法,还包括在第一化合物流动过程中加热半导体衬底。
14.一种淀积栅介质的方法,包括步骤:
在淀积室中放置半导体晶片;
加热半导体晶片;以及
使前体气体流入此淀积室中并流到半导体晶片之上,其中前体包括硅、氧及过渡金属的组成成分。
15.根据权利要求14的方法,其中此组成成分特征在于,具有在硅和氧之间的第一键和在氧和所述过渡金属之间的第二键。
16.根据权利要求14的方法,其中栅介质由此组成成分形成。
17.根据权利要求14的方法,其中所述四族过渡金属是铪或锆。
18.一种形成介质的方法,包括:
在淀积室中放置半导体晶片;
加热半导体晶片;
使TEOS流入淀积室;以及
使四族过渡金属的叔丁氧基化物流入此淀积室中。
19.一种形成介质的方法,包括:
在淀积室中放置半导体晶片;
加热半导体晶片;
使含有硅的第一气体流入此淀积室;以及
在第一气体流动的同时,使第二气体流入淀积室,第二气体包含氧和过渡金属。
20.根据权利要求19的方法,其中第一气体是第一前体,第二气体是第二前体。
21.根据权利要求20的方法,其中第一气体以硅流动的流量流动,第二气体以金属流动的流量流动,其中金属流动的流量超过了硅流动的流量。
22.根据权利要求21的方法,其中金属流动流量超过硅流动流量的比例至少为二比一。
23.根据权利要求22的方法,其中过渡金属是包括锆和铪之一的四族金属。
24.根据权利要求23的方法,其中第一气体包括硅、氧以及锆和铪之一的化合物。
25.根据权利要求23的方法,其中发生第一气体的提取反应和第二气体的提取反应,形成锆或铪的浓度大于硅的介质。
26.一种具有介质层的半导体器件,介质层包括硅、氧和过渡金属,过渡金属在介质层中具有第一浓度,硅在介质层中具有第二浓度,第一浓度超过第二浓度。
CN01809184A 2000-05-09 2001-03-28 非晶金属氧化物栅介质结构及其方法 Pending CN1439170A (zh)

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