CN1426584A - 强电介质存储装置及对由强电介质电容器构成的存储单元的操作方法 - Google Patents
强电介质存储装置及对由强电介质电容器构成的存储单元的操作方法 Download PDFInfo
- Publication number
- CN1426584A CN1426584A CN01808429.XA CN01808429A CN1426584A CN 1426584 A CN1426584 A CN 1426584A CN 01808429 A CN01808429 A CN 01808429A CN 1426584 A CN1426584 A CN 1426584A
- Authority
- CN
- China
- Prior art keywords
- storage unit
- signal electrode
- voltage
- absolute value
- secondary signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
- H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/60—Capacitors
- H10D1/68—Capacitors having no potential barriers
- H10D1/682—Capacitors having no potential barriers having dielectrics comprising perovskite structures
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000397122 | 2000-12-27 | ||
| JP397122/2000 | 2000-12-27 | ||
| JP2001393649A JP2002269972A (ja) | 2000-12-27 | 2001-12-26 | 強誘電体メモリ装置および強誘電体キャパシタからなるメモリセルに対する動作方法 |
| JP393649/2001 | 2001-12-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1426584A true CN1426584A (zh) | 2003-06-25 |
Family
ID=26606797
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN01808429.XA Pending CN1426584A (zh) | 2000-12-27 | 2001-12-27 | 强电介质存储装置及对由强电介质电容器构成的存储单元的操作方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6717837B2 (enExample) |
| JP (1) | JP2002269972A (enExample) |
| CN (1) | CN1426584A (enExample) |
| WO (1) | WO2002052571A1 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR3109243A1 (fr) | 2020-04-10 | 2021-10-15 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procédé de caractérisation de transistors pour l’atténuation d’effets d’irradiations sur un circuit intégré fabriqué en technologie SOI. |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2004017410A1 (ja) * | 2002-08-19 | 2004-02-26 | Seiko Epson Corporation | 強誘電体メモリおよびその製造方法 |
| JP4024196B2 (ja) * | 2003-09-30 | 2007-12-19 | 三洋電機株式会社 | 強誘電体メモリ |
| US7133304B2 (en) * | 2004-03-22 | 2006-11-07 | Texas Instruments Incorporated | Method and apparatus to reduce storage node disturbance in ferroelectric memory |
| KR100535047B1 (ko) * | 2004-04-20 | 2005-12-07 | 주식회사 하이닉스반도체 | 불휘발성 강유전체 메모리 장치 |
| JP2007149295A (ja) * | 2005-11-30 | 2007-06-14 | Seiko Epson Corp | 半導体記憶装置 |
| JP2010079941A (ja) * | 2008-09-24 | 2010-04-08 | National Institute Of Advanced Industrial Science & Technology | 半導体不揮発記憶装置 |
| US8987787B2 (en) * | 2012-04-10 | 2015-03-24 | Macronix International Co., Ltd. | Semiconductor structure and method for manufacturing the same |
| US9799388B1 (en) | 2016-04-28 | 2017-10-24 | Micron Technology, Inc. | Charge sharing between memory cell plates using a conductive path |
| US9697913B1 (en) | 2016-06-10 | 2017-07-04 | Micron Technology, Inc. | Ferroelectric memory cell recovery |
| US9941021B2 (en) * | 2016-06-16 | 2018-04-10 | Micron Technology, Inc. | Plate defect mitigation techniques |
| US10403389B2 (en) | 2016-06-16 | 2019-09-03 | Micron Technology, Inc. | Array plate short repair |
| US10163480B1 (en) * | 2017-07-27 | 2018-12-25 | Micron Technology, Inc. | Periphery fill and localized capacitance |
| US10032496B1 (en) | 2017-07-27 | 2018-07-24 | Micron Technology, Inc. | Variable filter capacitance |
| US11158358B2 (en) | 2019-07-22 | 2021-10-26 | Micron Technology, Inc. | Adaptive write operations for a memory device |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0677434A (ja) | 1992-08-27 | 1994-03-18 | Hitachi Ltd | 半導体記憶装置 |
| JPH08147982A (ja) | 1994-09-20 | 1996-06-07 | Olympus Optical Co Ltd | 強誘電体メモリ装置 |
| US5666305A (en) | 1993-03-29 | 1997-09-09 | Olympus Optical Co., Ltd. | Method of driving ferroelectric gate transistor memory cell |
| US5572459A (en) * | 1994-09-16 | 1996-11-05 | Ramtron International Corporation | Voltage reference for a ferroelectric 1T/1C based memory |
| US5532953A (en) * | 1995-03-29 | 1996-07-02 | Ramtron International Corporation | Ferroelectric memory sensing method using distinct read and write voltages |
| JP3327071B2 (ja) | 1995-10-16 | 2002-09-24 | ソニー株式会社 | 強誘電体記憶装置 |
| JP3629099B2 (ja) * | 1996-06-28 | 2005-03-16 | 株式会社東芝 | 半導体記憶装置 |
| JP2002353419A (ja) | 2000-12-27 | 2002-12-06 | Seiko Epson Corp | 強誘電体メモリ装置 |
-
2001
- 2001-12-26 JP JP2001393649A patent/JP2002269972A/ja not_active Withdrawn
- 2001-12-27 CN CN01808429.XA patent/CN1426584A/zh active Pending
- 2001-12-27 WO PCT/JP2001/011547 patent/WO2002052571A1/ja not_active Ceased
- 2001-12-27 US US10/026,903 patent/US6717837B2/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR3109243A1 (fr) | 2020-04-10 | 2021-10-15 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procédé de caractérisation de transistors pour l’atténuation d’effets d’irradiations sur un circuit intégré fabriqué en technologie SOI. |
Also Published As
| Publication number | Publication date |
|---|---|
| US20020159307A1 (en) | 2002-10-31 |
| US6717837B2 (en) | 2004-04-06 |
| JP2002269972A (ja) | 2002-09-20 |
| WO2002052571A1 (fr) | 2002-07-04 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |