CN1371122A - IC conveying program and unit of IC testing processor - Google Patents
IC conveying program and unit of IC testing processor Download PDFInfo
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- CN1371122A CN1371122A CN 01104314 CN01104314A CN1371122A CN 1371122 A CN1371122 A CN 1371122A CN 01104314 CN01104314 CN 01104314 CN 01104314 A CN01104314 A CN 01104314A CN 1371122 A CN1371122 A CN 1371122A
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Abstract
The present invention is IC conveying program and unit of IC testing processor. The conveying unit for IC chip test area with several front and back buffering regions consists of empty disc dispatching region, material feeding region, main buffering region, test region, and post-test distribution region. By means of the main buffering region and several buffering region in the post-test distribution region, the chip test may be finished in the time interval of conveying IC chip bearing disc from the main buffering region to the post-test distribution region and this result in high production efficiency.
Description
The present invention is a kind of IC conveying program and device thereof of IC test handler, especially refer to a kind of at the forward and backward IC conveying program that possesses several buffering areas in integrated circuit (to call IC in the following text) wafer sort district, mainly formed by empty disc dispatching region, material feeding region, main buffering region, test section, post-test distribution region, utilize main buffering region and several to be arranged on test section and the interior inferior buffering area of post-test distribution region, the time difference perseveration of sending the IC wafer between each district of utilization effectively can be done the production efficiency utilization of peak efficiency.
All automated machines are there's no one who doesn't or isn't pursued its prouctiveness, especially IC wafer tester, because of belonging to the final test stage of production line, often absorbed the time that whole production line is incured loss through delay, caused on the time-histories and seriously compressed, so the raising of the production efficiency of IC test handler becomes the most important problem of each development company.
General IC test handler is not paid attention to the flow process of its IC wafer on board, often only draws IC wafer to test cartridge by a conveying hand stern of inhaling vacuum from pan feeding and tests, and has been delivered to the survey district by another conveyer arm again after intact the survey and has concentrated.Though so simple, direct IC wafer transport flow process is very not noticeable on whole board work flow, but the big key of whole machinery production usefulness, because on the board pipeline of this test handler, often exist work to change IC wafer bearing dish and the situation of the feed interruption of test section is produced, or during the bearing dish that after the wafer bearing dish of the wafer post-test distribution region that tests the wafer back segment uses up, more renews, be directed at and make the operation of whole test section be forced to interrupt, have a strong impact on this test handler production efficiency.
So, the inventor is cut apart the entire job program dexterously as appropriateness, and several buffering areas are set in addition absorb the IC wafer, feasible certain program of front and rear sections when the test section, when doing counterclockwise to rotate or change the action of wafer bearing dish as the wafer bearing dish in the main buffering region, can utilize the pooling feature of buffering area, intermittently do the IC test, and needn't stop, wait for that the wafer bearing dish work that the bearing dish is changed in action or the main buffering region counterclockwise rotates finishing of program by complete machine.
For reaching aforesaid all purposes, the invention provides a kind of IC conveying program and device thereof of IC test handler, this conveying program and structure thereof possess several buffering areas in IC wafer transport flow process.
Purpose of the present invention can reach by following measure:
A kind of IC conveying device of IC test handler is mainly put by empty disc dispatching region, material feeding region, main buffering region, test section, post-test distribution region and ring and is sent arm at the peripheral IC wafer in each district and formed, wherein:
Empty disc dispatching region: the IC wafer bearing dish by sky is laminated;
Material feeding region: IC wafer to be measured is placed in the IC wafer bearing dish, and it is stacked to concentrate on local area;
Main buffering region: the IC wafer bearing dish of five identical sizes is set in a big square plate, make the space that stays a dish size, and these five IC wafer bearing dishes can be done counterclockwise to rotate, and can do suitable heating, make the IC wafer heating of bearing;
The test section: be provided with a test bench on a testboard, this test bench is provided with two rows' (totally four) test cartridge, and its width just is two to fly shuttle width half, and flies shuttle and second by first and fly shuttle one left side, a right side also parallel forward and backward side of testboard of passing that staggers; This test bench can forward and backwardly be displaced into first and fly shuttle and second and fly between shuttle; In addition fly the second slow Heng Qu that left side between shuttle is provided with bearable several pieces of IC wafers two;
Post-test distribution region: by one the 3rd buffering area and two groups carry dish, three laminar stackable intact survey IC wafer bearing dishes of fixing configuration dish and three districts are formed;
The IC wafer is sent arm: first group of IC wafer sent arm, mainly is the inlet region of being responsible for IC wafer to be measured is moved to by material feeding region 1 main buffering region; Second group of IC wafer sent arm, mainly is to be responsible for IC wafer a to be measured moved by the taking-up district of main buffering region flying shuttle and second to second buffering area or first and flying in the wafer holder on the left load plate of shuttle; The 3rd group of IC wafer sent arm, mainly is responsible for finishing first of survey and flies shuttle, and the second IC wafer that flies on the right load plate of shuttle is taken out to the 3rd buffering area or carries dish; The 4th group of IC wafer sent arm, and the intact survey IC wafer of being responsible for will carrying in the dish moves to fixed configurations dish or stacked intact survey IC wafer bearing dish.
A kind of conveying program of IC conveying device of IC test handler, as follows according to the IC wafer transport program of its structure:
1) with on the stacked IC wafer bearing dish that places material feeding region of IC wafer a to be measured;
2) send the hand stern by first group of IC wafer IC wafer to be measured is moved in the IC wafer bearing dish of the inlet region in the main buffering region that can suitably heat, and carry full back according to counterclockwise rotating lattice in this IC wafer bearing dish, the rest may be inferred;
3) when the device in the main buffering region has the IC wafer bearing dish of IC wafer to go to the position of taking out the district, promptly send arm its IC wafer is taken in second buffering area, and in regular turn it is filled up with second group of IC wafer;
4) treat that second buffering area fills up the IC wafer after, the continuous IC wafer that will next take out places first to fly in the load plate of a shuttle left side;
5) second group of IC wafer sent arm and is back to and takes out the district and take out two IC wafers again, and flies shuttle with first and send, second fly shuttle and send back to;
6) second group of IC wafer sent arm and put into the IC wafer and fly shuttle left side load plate in second, simultaneously the test cartridge of test bench test toward being displaced downwardly to the center preparation after taking out the first two IC wafers that fly on the load plate of a shuttle left side, and another test cartridge then is positioned at second and flies above the right load plate of shuttle at this moment;
7) second group of IC wafer sent arm and is back to main buffering region and takes out the district and take out two IC wafers, test cartridge again and do the IC test, flies shuttle with first simultaneously and sends back to, and second flies shuttle sends;
8) test cartridge to the second flies to take out on the load plate of a shuttle left side IC wafer preparation and does test, test bench is up moved, and the IC wafer that makes test cartridge will finish survey is inserted first and flown in the right load plate of shuttle and second group of IC wafer sent arm and put into the IC wafer and fly shuttle left side load plate in first;
9) second group of IC wafer sent arm and is back to host buffer and takes out the district and take out two IC wafers, test cartridge again and do the IC test, flies shuttle with first simultaneously and sends, second flies shuttle and send back to;
10) test cartridge to the first flies to get the IC wafer preparation on the load plate of a shuttle left side and tests, with test bench toward moving down, the IC wafer that makes test cartridge will finish survey is inserted second and is flown in the right load plate of shuttle, and simultaneously second group of wafer sent arm and put into the IC wafer and fly shuttle left side load plate in second, and the 3rd group of IC wafer sent arm and flown IC chip sucking on the right load plate of shuttle with first and be taken to the movable load plate that carries dish 42 and carry in the starting point;
11) second group of IC wafer sent arm and is back to main buffering region and takes out the district and take out two IC wafers, test cartridge again and do the IC test, flies shuttle with first simultaneously and sends back to, second flies shuttle and send, carry dish and carry starting point by movable load plate and be loaded onto movable load plate and carry terminal point;
12) test cartridge to the second flies to take out on the load plate of a shuttle left side IC wafer preparation and tests, test bench up moves, the IC wafer that makes test cartridge will finish survey is inserted first and is flown in the right load plate of shuttle, and simultaneously second group of IC wafer sent arm and put into the IC wafer and fly shuttle left side load plate in first, and send arm by the 3rd group of IC wafer and fly IC chip sucking on the right load plate of shuttle with second and be taken to the movable load plate that carries dish and carry in the starting point, simultaneously, the 4th group of IC wafer sent arm and carried terminal point 43a by movable load plate and taken out and survey the IC wafer, and sorted out to three fixing configuration dishes or be laminated in the survey IC wafer bearing dish according to this IC wafer sort result;
13) second group of IC wafer sent arm and is back to main buffering region and takes out the district and take out two IC wafers again, test cartridge is done the IC test, fly shuttle with first simultaneously and send, second fly shuttle and send, carry dish back to and carry starting point by movable load plate and be loaded onto movable load plate and carry terminal point, another carries dish and carries the terminal point activity of sending back to by movable load plate and carry and fold a little;
14) the 4th group of IC wafer sent arm and carried terminal point by movable load plate and taken out and survey the IC wafer, and sorted out to three fixing configuration dishes or be laminated to according to this IC wafer sort result and survey in the IC wafer bearing dish, and jumping is intermittently carried out by the 10th step;
According to above-mentioned steps, first flying shuttle and second and fly shuttle left side load plate in the test section, under normal program, be directly to ask for to such an extent that survey the IC wafer by main buffering region, but when main buffering region can't take out the IC wafer by main buffering region because of rotation IC bearing dish makes second group of IC wafer send arm, program can be specified at once and be changed by the IC wafer to be measured of taking in second buffering area, continue to carry out the action of test I C wafer, and needn't shut down wait, by the time the previous factor of suspending stops to recover normal procedure again after (being that IC bearing dish rotate in place), and because the conveyance speed that the IC wafer is sent arm is fast than IC test speed, can in time dead after a while, intermittently the IC wafer to be measured in second buffering area be filled up; Similarly, when post-test distribution region temporarily can't supply to survey IC wafer output placement because of changing IC wafer bearing dish, program also can temporarily be specified the 3rd group of IC wafer to send arm and taken out and survey the position of placing behind the IC wafer and be changed to and be positioned in the 3rd buffering area, send arm R3 in order to the 3rd group of IC wafer and continue action, when treating before to suspend the reason elimination, reply original IC again and transport flow process, and it is very fast that this IC wafer is sent the IC speed of transporting of arm, enable when neutral gear, intermittently survey the IC wafer to carrying dish, so that the IC wafer in the 3rd buffering area is emptied by having taken out in the 3rd buffering area; So, keep second buffering area to be filled IC wafer to be measured, the 3rd buffering area and emptied the state of surveying the IC wafer, operation that can open test district test I C wafer.
The present invention has following advantage compared to existing technology: this conveying program and structure thereof can be limited the independent running in ground, and needn't carry in the flow process certain part short interruption because of IC the time, essential complete machine stops and could work after waiting for the interruption source end.
For illustrating technology contents of the present invention, characteristics and function, cooperate simple description of drawings now as back:
Fig. 1 is an IC wafer transport allocation plan of the present invention.
Fig. 2 is that test section of the present invention IC wafer places the second buffering area schematic diagram.
Fig. 2 A is that test section of the present invention IC wafer places first to fly shuttle left side load plate wafer holder schematic diagram.
Fig. 2 B is in the test section of the present invention:
A) first fly shuttle and send;
B) second fly the schematic diagram that shuttle is sent back to.
Fig. 2 C is in the test section of the present invention:
A) measuring head takes out first and flies shuttle left side load plate IC wafer and test;
B) the IC wafer is inserted second schematic diagram that flies the wafer holder of shuttle left side load plate.
Fig. 2 D is in the test section of the present invention:
A) first fly shuttle and send back to;
B) second fly the schematic diagram that shuttle is sent.
Fig. 2 E is in the test section of the present invention:
A) measuring head has been put back to and has been surveyed the IC wafer in first wafer holder that flies the right load plate of shuttle;
B) taking out second flies shuttle left side load plate IC wafer and tests;
C) again IC wafer to be measured is put into the schematic diagram of first flying shuttle left side load plate.
Fig. 2 F is in the test section of the present invention:
A) first fly shuttle and send;
B) second fly the schematic diagram that shuttle is sent back to.
Fig. 2 G is in the test section of the present invention:
A) measuring head has been put back to and has been surveyed the IC wafer in second wafer holder that flies the right load plate of shuttle.
B) taking out first flies shuttle left side load plate IC wafer and tests;
C) the first intact survey IC wafer that flies on the right load plate of shuttle is taken out in the bearing dish of the 3rd buffering area;
D) again IC wafer to be measured is put into second schematic diagram that flies shuttle left side load plate.
Fig. 2 H is in the test section of the present invention:
A) first fly shuttle and send back to;
B) second fly the schematic diagram that shuttle is sent.
Fig. 2 I is in the test section of the present invention:
A) measuring head has been put back to and has been surveyed the IC wafer in first wafer holder that flies the right load plate of shuttle;
B) taking out second flies shuttle left side load plate IC wafer and tests;
C) the second intact survey IC wafer that flies on the right load plate of shuttle is taken out in the bearing dish of the 3rd buffering area;
D) again IC wafer to be measured is put into first schematic diagram that flies shuttle left side load plate.
Fig. 2 J is in the test section of the present invention:
A) first fly shuttle and send;
B) second fly the schematic diagram that shuttle is sent back to.
The used symbol simple declaration of each accompanying drawing
R1, R2, R3, R4.IC wafer are sent arm
A. IC wafer to be measured
B. the intact IC wafer of surveying
1. material feeding region
11.IC wafer bearing dish
12. empty IC wafer bearing dish 13. empty disc dispatching regions 2. main buffering regions 21. big square plate 22.IC wafer bearing dishes 23. inlet regions 24. take out district 25. and counterclockwise rotate 3. test sections, 30. testboards
301. test bench
302,303. test cartridge, 31. second buffering areas 32. first fly shuttle
321. left load plate
3211,3212. wafer holder
322. right load plate
3221,3222. wafer holder 33. second fly shuttle
331. left load plate
3311,3312. wafer holder
332. right load plate
3321,3322. wafer holder, 34, the three buffering areas, 4. post-test distribution regions 42. carry dish 43,44. movable load plates and carry starting point 43a, 44a, and movable load plate carries terminal point 46,47, the 48. configuration dishes 49. intact IC of survey wafer bearing dishes
Specific embodiment: the present invention is IC conveying program and the structure thereof that machine is buried in a kind of IC test place, (please refer to shown in Figure 1) mainly put by empty disc dispatching region 13, material feeding region 1, main buffering region 2, test section 3, post-test distribution region 4 and ring and sent arm R1, R2, R3 and R4 at the peripheral IC wafer in each district and formed, wherein:
Dish scheduling district, chamber 13: the IC wafer bearing dish 12 by sky is laminated;
Material feeding region 1: IC wafer a to be measured is placed in the IC wafer bearing dish 11, and it is stacked to concentrate on local area;
Main buffering region 2: the IC wafer bearing dish 22 of five identical sizes is set in a big square plate 21, make the space that stays a dish size, and these five IC wafer bearing dishes 22 can be done counterclockwise to rotate 25, and can do suitable heating, make the IC wafer heating of bearing;
Test section 3: on a testboard 30, be provided with a test bench 301, this test bench 301 is provided with two rows' (totally four) test cartridge 302,303, its width just is two to fly shuttle width half, and flies shuttle 32 and second by first and fly shuttle 33 1 left sides, a right side also parallel testboard 30 forward and backward sides of passing that stagger; This test bench 301 can forward and backwardly be displaced into first and fly shuttle 32 and second and fly 33 on shuttle; In addition fly second buffering area 31 that left side between shuttle is provided with bearable several pieces of IC wafers two.
Post-test distribution region 4: carry the laminar stackable intact survey IC wafer bearing dish 49 in dish (43,44), three fixing configuration dishes (46,47.48) and three districts by one the 3rd buffering area 34 and two groups and formed;
The IC wafer is sent arm (R1, R2, R3, R4): first group of IC wafer sent arm R1, mainly is the inlet region 23 of being responsible for IC wafer a to be measured is moved to by material feeding region 1 main buffering region 2; Second group of IC wafer sent arm R2, mainly be to be responsible for IC wafer a to be measured moved by the taking-up district 24 of main buffering region 2 flying shuttle 32 and second to second buffering area 31 or first and flying in the wafer holder (3211,3212,3311,3312) on the left load plate (321,331) of shuttle 33; The 3rd group of IC wafer sent arm R3, main be responsible for finishing first of survey and fly the IC wafer that shuttle 32, second flies on the shuttle 33 right load plates (322,332) and be taken out to the 3rd buffering area 34 or carry dish 42; The 4th group of IC wafer sent arm R4, and the intact survey IC wafer b that is responsible for will carrying in the dish 42 moves to fixed configurations dish (46,47,48) or stacked intact survey IC wafer bearing dish 49.
According to above-mentioned each structure, its main IC wafer transport program is as follows:
1) with on the stacked IC wafer bearing dish 11 that places material feeding region 1 of IC wafer a to be measured.
2) send hand stern R1 by first group of IC wafer IC wafer a to be measured is moved in the IC wafer bearing dish 22 of the inlet region 23 in the main buffering region 2 that can suitably heat, and rotate lattice in 22 years full backs of this IC wafer bearing dish according to counter clockwise direction 25, the rest may be inferred.
3) when the device in the main buffering region 2 has the IC wafer bearing dish 22 of IC wafer to go to the position of taking out district 24, promptly send hand stern R2 its IC wafer is taken in second buffering area 31, and in regular turn it is filled up with the 2nd IC wafer.
4) treat that second buffering area 31 fills up the IC wafer after, the continuous IC wafer that will next take out places first to fly in the shuttle 32 left load plates 321 (Fig. 2 A illustrates).
5) second group of IC wafer sent arm R2 and is back to and takes out district 24 and take out two IC wafers again, and flies shuttle with first and send, second fly shuttle and send (Fig. 2 B illustrates) back to.
6) second group of IC wafer sent arm R2 and put into the IC wafer and fly shuttle 33 left load plates 331 in second, simultaneously the test cartridge 302 of test bench 301 is tested toward being displaced downwardly to the center preparation after taking out the first two IC wafers that fly on the shuttle 32 left load plates 321, and 303 of another test cartridge are positioned at second right load plate 332 tops (Fig. 2 C illustrates) that fly shuttle 33 at this moment.
7) second group of IC wafer sent arm R2 and is back to main buffering region 2 and takes out that district 24 takes out two IC wafers again, test cartridge 302 is done the IC test, flies shuttle 32 with first simultaneously and sends back to, second flies shuttle 33 and send (Fig. 2 D illustrates).
8) test cartridge 303 flies on the shuttle 33 left load plates 331 to take out the IC wafer preparation to second and does test, test bench 301 is up moved, and the IC wafer that makes test cartridge 302 will finish survey is inserted first and flown in the shuttle 32 right load plates 322 and second group of IC wafer sent arm R2 and put into the IC wafer and fly shuttle 32 left load plates 321 (Fig. 2 E illustrates) in first.
9) second group of IC wafer sent arm R2 and is back to host buffer 2 and takes out that district 24 takes out two IC wafers again, test cartridge 303 is done the IC test, flies shuttle 32 with first simultaneously and sends.Second flies shuttle 33 sends (Fig. 2 F illustrates) back to.
10) test cartridge 302 flies on the shuttle 32 left load plates 321 to take out the IC wafer preparation to first and tests, with test bench 301 past moving down, the IC wafer that makes test cartridge 303 will finish survey inserts and second flies in the right load plates 332 of shuttle 33, and simultaneously second group of IC wafer send arm R2 and put into the IC wafer and fly shuttle 33 left load plates 331 in second, and the 3rd group of IC wafer sent arm R3 and flown IC chip sucking on the shuttle 32 right load plates 322 with first and be taken to the movable load plate that carries dish 42 and carry in the starting point 43 (Fig. 2 G illustrates).
11) second group of IC wafer sent arm R2 and is back to main buffering region 2 and takes out district 24 and take out two IC wafers, test cartridge 302 again and do the IC test, fly shuttle 32 with first simultaneously and send back to, second fly shuttle 33 and send, carry dish 42 and carry starting point 43 by movable load plate and be loaded onto movable load plate and carry terminal point 43a (Fig. 2 H illustrates).
12) test cartridge 303 flies on the shuttle 33 left load plates 331 to take out the IC wafer preparation to second and tests, test bench 301 up moves, the IC wafer that makes test cartridge 302 will finish survey is inserted first and is flown in the shuttle 32 right load plates 322, and simultaneously second group of IC wafer sent arm R2 and put into the IC wafer and fly shuttle 32 left load plates 321 in first, and send arm R3 by the 3rd group of IC wafer and fly IC chip sucking on the shuttle 33 right load plates 332 with second and be taken to the movable load plate that carries dish 42 and carry in the starting point 44, simultaneously, the 4th group of IC wafer sent arm R4 and carried terminal point 43a by movable load plate and taken out and survey IC wafer b, and sorted out to three fixing configuration dishes (46 according to this IC wafer sort result, 47,48) in or be laminated to and survey IC wafer bearing dish 49 interior (Fig. 2 I illustrates).
13) second group of IC wafer sent arm R2 and is back to main slow district 2 and takes out that district 24 takes out two IC wafers again, test cartridge 303 is done the IC test, fly shuttle 32 with first simultaneously and send, second fly shuttle 33 and send back to, carry dish 42 and carry starting point 44 by movable load plate and be loaded onto that movable load plate carries terminal point 44a, another carries dish 42 and carries the terminal point 43a activity of sending back to by movable load plate and carry and fold a little 43 (Fig. 2 J illustrates).
14) the 4th group of IC wafer sent arm R4 and carried terminal point 44a by movable load plate and taken out and survey IC wafer b, and sorted out to three fixing configuration dishes (46 according to this IC wafer sort result, 47,48) or be laminated to and survey in the IC wafer bearing dish 49, and jumping is intermittently carried out by the 10th step.
By above-mentioned steps as can be known, first flying shuttle 32 and second and fly shuttle 33 left load plates (321 in test section 3,331) under normal program, be directly to ask for IC wafer a to be measured by main buffering region 2, but when main buffering region 2 can't take out the IC wafer by main buffering region because of rotation IC bearing dish 22 makes second group of IC wafer send arm R2, program can be specified at once and be changed by the IC wafer a to be measured that takes in second buffering area 31, continue to carry out the action of test I C wafer, and needn't shut down wait, by the time the previous factor of suspending stops to recover normal procedure again after (being that IC bearing dish 22 rotations one lattice put in place), and because the conveyance speed that the IC wafer is sent arm R2 is fast than IC test speed, can in time dead after a while, intermittently the IC wafers to be measured in second buffering area 2 be filled up; Similarly, when post-test distribution region 4 temporarily can't supply to survey IC wafer output placement because of changing IC wafer bearing dish, program also can temporarily be specified the 3rd group of IC wafer to send arm R3 and taken out survey IC wafer (promptly by first, second flies to take out in the right load plate of shuttle) position of placing, back (promptly carries dish 42 or configuration dish 46,47,48) be changed to and be positioned in the 3rd buffering area 34, send arm in order to the 3rd group of IC wafer and continue action, when treating before to suspend the reason elimination, reply original IC again and transport flow process, and it is very fast that this IC wafer is sent the IC speed of transporting of arm R3, enable when neutral, intermittently survey IC wafer b to carrying dish 42, so that the IC wafer in the 3rd buffering area 34 is emptied by having taken out in the 3rd buffering area 34; So, keep second buffering area 31 to be filled IC wafer a to be measured, the 3rd buffering area 34 and emptied the state of surveying IC wafer b, can not interrupt the operation of most important test section 3 test I C wafers in entire I C test handler, to increase overall efficiency.
Though the present invention discloses as above with a preferred embodiment; right its is not in order to limit the present invention; anyly have the knack of this skill person; without departing from the spirit and scope of the present invention; when the change that can do various equivalences and retouching, so protection scope of the present invention should be as the criterion with the accompanying Claim protection range.
Claims (2)
1. the IC conveying device of an IC test handler is characterized in that: mainly puts and sends arm at the peripheral IC wafer in each district and formed by empty disc dispatching region, material feeding region, main buffering region, test section, post-test distribution region and ring, wherein:
Empty disc dispatching region: the IC wafer bearing dish by sky is laminated;
Material feeding region: IC wafer to be measured is placed in the IC wafer bearing dish, and it is stacked to concentrate on local area;
Main buffering region: the IC wafer bearing dish of five identical sizes is set in a big square plate, make the space that stays a dish size, and these five IC wafer bearing dishes can be done counterclockwise to rotate, and the IC wafer of heating bearing;
The test section: be provided with a test bench on a testboard, this test bench is provided with two rows' (totally four) test cartridge, and its width just is two to fly shuttle width half, and flies shuttle and second by first and fly shuttle one left side, a right side also parallel forward and backward side of testboard of passing that staggers; This test bench can forward and backwardly be displaced into first and fly shuttle and second and fly between shuttle; In addition fly the second slow Heng Qu that left side between shuttle is provided with bearable several pieces of IC wafers two;
Post-test distribution region: by one the 3rd buffering area and two groups carry dish, three laminar stackable intact survey IC wafer bearing dishes of fixing configuration dish and three districts are formed;
The IC wafer is sent arm: first group of IC wafer sent arm, IC wafer to be measured moved to the inlet region of main buffering region by material feeding region 1; Second group of IC wafer sent arm, IC wafer a to be measured moved by the taking-up district of main buffering region fly shuttle and second to second buffering area or first and fly in the wafer holder on the left load plate of shuttle; The 3rd group of IC wafer sent arm, and first of intact survey is flown shuttle, and the second IC wafer that flies on the right load plate of shuttle is taken out to the 3rd buffering area or carries dish; The 4th group of IC wafer sent arm, and the intact survey IC wafer that carries in the dish is moved to fixed configurations dish or stacked intact survey IC wafer bearing dish.
2. the conveying program of the IC conveying device of an IC test handler, it is characterized in that: the IC wafer transport program according to its structure is as follows:
1) with on the stacked IC wafer bearing dish that places material feeding region of IC wafer a to be measured;
2) send the hand stern by first group of IC wafer IC wafer to be measured is moved in the IC wafer bearing dish of the inlet region in the main buffering region that can suitably heat, and carry full back according to counterclockwise rotating lattice in this IC wafer bearing dish, the rest may be inferred;
3) when the device in the main buffering region has the IC wafer bearing dish of IC wafer to go to the position of taking out the district, promptly send arm its IC wafer is taken in second buffering area, and in regular turn it is filled up with second group of IC wafer;
4) treat that second buffering area fills up the IC wafer after, the continuous IC wafer that will next take out places first to fly in the load plate of a shuttle left side;
5) second group of IC wafer sent arm and is back to and takes out the district and take out two IC wafers again, and flies shuttle with first and send, second fly shuttle and send back to;
6) second group of IC wafer sent arm and put into the IC wafer and fly shuttle left side load plate in second, simultaneously the test cartridge of test bench test toward being displaced downwardly to the center preparation after taking out the first two IC wafers that fly on the load plate of a shuttle left side, and another test cartridge then is positioned at second and flies above the right load plate of shuttle at this moment;
7) second group of IC wafer sent arm and is back to main buffering region and takes out the district and take out two IC wafers, test cartridge again and do the IC test, flies shuttle with first simultaneously and sends back to, and second flies shuttle sends;
8) test cartridge to the second flies to take out on the load plate of a shuttle left side IC wafer preparation and does test, test bench is up moved, and the IC wafer that makes test cartridge will finish survey is inserted first and flown in the right load plate of shuttle and second group of IC wafer sent arm and put into the IC wafer and fly shuttle left side load plate in first;
9) second group of IC wafer sent arm and is back to host buffer and takes out the district and take out two IC wafers, test cartridge again and do the IC test, flies shuttle with first simultaneously and sends, second flies shuttle and send back to;
10) test cartridge to the first flies to get the IC wafer preparation on the load plate of a shuttle left side and tests, with test bench toward moving down, the IC wafer that makes test cartridge will finish survey is inserted second and is flown in the right load plate of shuttle, and simultaneously second group of wafer sent arm and put into the IC wafer and fly shuttle left side load plate in second, and the 3rd group of IC wafer sent arm and flown IC chip sucking on the right load plate of shuttle with first and be taken to the movable load plate that carries dish 42 and carry in the starting point;
11) second group of IC wafer sent arm and is back to main buffering region and takes out the district and take out two IC wafers, test cartridge again and do the IC test, flies shuttle with first simultaneously and sends back to, second flies shuttle and send, carry dish and carry starting point by movable load plate and be loaded onto movable load plate and carry terminal point;
12) test cartridge to the second flies to take out on the load plate of a shuttle left side IC wafer preparation and tests, test bench up moves, the IC wafer that makes test cartridge will finish survey is inserted first and is flown in the right load plate of shuttle, and simultaneously second group of IC wafer sent arm and put into the IC wafer and fly shuttle left side load plate in first, and send arm by the 3rd group of IC wafer and fly IC chip sucking on the right load plate of shuttle with second and be taken to the movable load plate that carries dish and carry in the starting point, simultaneously, the 4th group of IC wafer sent arm and carried terminal point 43a by movable load plate and taken out and survey the IC wafer, and sorted out to three fixing configuration dishes or be laminated in the survey IC wafer bearing dish according to this IC wafer sort result;
13) second group of IC wafer sent arm and is back to main buffering region and takes out the district and take out two IC wafers again, test cartridge is done the IC test, fly shuttle with first simultaneously and send, second fly shuttle and send, carry dish back to and carry starting point by movable load plate and be loaded onto movable load plate and carry terminal point, another carries dish and carries the terminal point activity of sending back to by movable load plate and carry and fold a little;
14) the 4th group of IC wafer sent arm and carried terminal point by movable load plate and taken out and survey the IC wafer, and sorted out to three fixing configuration dishes or be laminated to according to this IC wafer sort result and survey in the IC wafer bearing dish, and jumping is intermittently carried out by the 10th step;
According to above-mentioned steps, first flying shuttle and second and fly shuttle left side load plate in the test section, under normal program, be directly to ask for to such an extent that survey the IC wafer by main buffering region, but when main buffering region can't take out the IC wafer by main buffering region because of rotation IC bearing dish makes second group of IC wafer send arm, program can be specified at once and be changed by the IC wafer to be measured of taking in second buffering area, continue to carry out the action of test I C wafer, and needn't shut down wait, by the time the previous factor of suspending stops to recover normal procedure again after (being that IC bearing dish rotate in place), and because the conveyance speed that the IC wafer is sent arm is fast than IC test speed, can in time dead after a while, intermittently the IC wafer to be measured in second buffering area be filled up; Similarly, when post-test distribution region temporarily can't supply to survey IC wafer output placement because of changing IC wafer bearing dish, program also can temporarily be specified the 3rd group of IC wafer to send arm and taken out and survey the position of placing behind the IC wafer and be changed to and be positioned in the 3rd buffering area, send arm R3 in order to the 3rd group of IC wafer and continue action, when treating before to suspend the reason elimination, reply original IC again and transport flow process, and it is very fast that this IC wafer is sent the IC speed of transporting of arm, enable when neutral gear, intermittently survey the IC wafer to carrying dish, so that the IC wafer in the 3rd buffering area is emptied by having taken out in the 3rd buffering area; So, keep second buffering area to be filled IC wafer to be measured, the 3rd buffering area and emptied the state of surveying the IC wafer, operation that can open test district test I C wafer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 01104314 CN1371122A (en) | 2001-02-23 | 2001-02-23 | IC conveying program and unit of IC testing processor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 01104314 CN1371122A (en) | 2001-02-23 | 2001-02-23 | IC conveying program and unit of IC testing processor |
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| Publication Number | Publication Date |
|---|---|
| CN1371122A true CN1371122A (en) | 2002-09-25 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 01104314 Pending CN1371122A (en) | 2001-02-23 | 2001-02-23 | IC conveying program and unit of IC testing processor |
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| Country | Link |
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| CN (1) | CN1371122A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101567327B (en) * | 2008-04-23 | 2010-09-08 | 中茂电子(深圳)有限公司 | Buffer sorting device for bare wafer testing machine platform and machine platform |
| CN104515915A (en) * | 2013-10-08 | 2015-04-15 | 致茂电子股份有限公司 | Electronic component detection equipment integrating high-temperature and low-temperature tests and detection method thereof |
-
2001
- 2001-02-23 CN CN 01104314 patent/CN1371122A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101567327B (en) * | 2008-04-23 | 2010-09-08 | 中茂电子(深圳)有限公司 | Buffer sorting device for bare wafer testing machine platform and machine platform |
| CN104515915A (en) * | 2013-10-08 | 2015-04-15 | 致茂电子股份有限公司 | Electronic component detection equipment integrating high-temperature and low-temperature tests and detection method thereof |
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