CN1311357C - 通用资源访问控制器 - Google Patents

通用资源访问控制器 Download PDF

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Publication number
CN1311357C
CN1311357C CNB998156523A CN99815652A CN1311357C CN 1311357 C CN1311357 C CN 1311357C CN B998156523 A CNB998156523 A CN B998156523A CN 99815652 A CN99815652 A CN 99815652A CN 1311357 C CN1311357 C CN 1311357C
Authority
CN
China
Prior art keywords
instruction
memory
address
request
page
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CNB998156523A
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English (en)
Chinese (zh)
Other versions
CN1354854A (zh
Inventor
H·斯特拉科夫斯基
P·斯扎贝尔斯基
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/439,544 external-priority patent/US6532505B1/en
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of CN1354854A publication Critical patent/CN1354854A/zh
Application granted granted Critical
Publication of CN1311357C publication Critical patent/CN1311357C/zh
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/161—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement
    • G06F13/1621—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement by maintaining request order
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0215—Addressing or allocation; Relocation with look ahead addressing means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/161—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement
    • G06F13/1626—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement by reordering requests
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1652—Handling requests for interconnection or transfer for access to memory bus based on arbitration in a multiprocessor architecture

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Multi Processors (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
CNB998156523A 1998-11-16 1999-11-15 通用资源访问控制器 Expired - Lifetime CN1311357C (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US10893098P 1998-11-16 1998-11-16
US60/108,930 1998-11-16
US09/439,544 US6532505B1 (en) 1999-11-12 1999-11-12 Universal resource access controller
US09/439,544 1999-11-12
PCT/US1999/026994 WO2000029955A1 (en) 1998-11-16 1999-11-15 Universal resource access controller

Publications (2)

Publication Number Publication Date
CN1354854A CN1354854A (zh) 2002-06-19
CN1311357C true CN1311357C (zh) 2007-04-18

Family

ID=26806431

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB998156523A Expired - Lifetime CN1311357C (zh) 1998-11-16 1999-11-15 通用资源访问控制器

Country Status (6)

Country Link
JP (1) JP2004500608A (de)
KR (1) KR100710531B1 (de)
CN (1) CN1311357C (de)
DE (1) DE19983738T1 (de)
GB (1) GB2361561B (de)
WO (1) WO2000029955A1 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IL137085A (en) 2000-06-29 2004-08-31 Eci Telecom Ltd Method for effective utilizing of shared resources in computerized systems
EP1639479B1 (de) * 2003-06-30 2008-09-03 Raytheon Company Effiziente speichersteuerung
US8856401B2 (en) * 2003-11-25 2014-10-07 Lsi Corporation Universal controller for peripheral devices in a computing system
CN100445954C (zh) * 2004-12-25 2008-12-24 鸿富锦精密工业（深圳）有限公司 控管服务使用资源的系统及方法
JP5414350B2 (ja) * 2009-05-08 2014-02-12 キヤノン株式会社 メモリ制御回路、及び、その制御方法
DE102010047718A1 (de) * 2010-10-07 2012-04-12 Infineon Technologies Ag Vorrichtung und Verfahren zum Formatieren und Vorauswählen von Trace Daten
CN113360428B (zh) * 2013-05-16 2024-09-13 超威半导体公司 具有指定区域存储器访问调度的存储器系统
US10394711B2 (en) * 2016-11-30 2019-08-27 International Business Machines Corporation Managing lowest point of coherency (LPC) memory using a service layer adapter
KR102540964B1 (ko) * 2018-02-12 2023-06-07 삼성전자주식회사 입출력 장치의 활용도 및 성능을 조절하는 메모리 컨트롤러, 애플리케이션 프로세서 및 메모리 컨트롤러의 동작
CN112699067B (zh) * 2021-01-04 2024-05-14 瑞芯微电子股份有限公司 一种指令寻址方法及装置
CN114896059A (zh) * 2022-04-26 2022-08-12 Oppo广东移动通信有限公司 资源访问方法、芯片及设备

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4354225A (en) * 1979-10-11 1982-10-12 Nanodata Computer Corporation Intelligent main store for data processing systems

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4803623A (en) * 1986-10-31 1989-02-07 Honeywell Bull Inc. Universal peripheral controller self-configuring bootloadable ramware
JPH04354225A (ja) * 1991-05-31 1992-12-08 Nec Corp 交換システムの装置間通信制御方式
US5878240A (en) * 1995-05-11 1999-03-02 Lucent Technologies, Inc. System and method for providing high speed memory access in a multiprocessor, multimemory environment
JP4803623B2 (ja) * 2001-07-04 2011-10-26 旭サナック株式会社 エアースプレイハンドガン

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4354225A (en) * 1979-10-11 1982-10-12 Nanodata Computer Corporation Intelligent main store for data processing systems

Also Published As

Publication number Publication date
WO2000029955A1 (en) 2000-05-25
KR20010086034A (ko) 2001-09-07
DE19983738T1 (de) 2002-03-14
GB2361561A (en) 2001-10-24
WO2000029955A9 (en) 2000-10-26
JP2004500608A (ja) 2004-01-08
KR100710531B1 (ko) 2007-04-23
CN1354854A (zh) 2002-06-19
GB2361561B (en) 2003-10-29
WO2000029955A8 (en) 2000-09-14
GB0111925D0 (en) 2001-07-04

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Address after: Munich, Germany

Patentee after: Infineon Technologies AG

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Patentee before: Infineon Technologies AG

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Address after: German Berg, Laura Ibiza

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Granted publication date: 20070418

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