DE19983738T1 - Universalressourcenzugriffssteuerung - Google Patents

Universalressourcenzugriffssteuerung

Info

Publication number
DE19983738T1
DE19983738T1 DE19983738T DE19983738T DE19983738T1 DE 19983738 T1 DE19983738 T1 DE 19983738T1 DE 19983738 T DE19983738 T DE 19983738T DE 19983738 T DE19983738 T DE 19983738T DE 19983738 T1 DE19983738 T1 DE 19983738T1
Authority
DE
Germany
Prior art keywords
access control
resource access
universal resource
universal
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE19983738T
Other languages
English (en)
Inventor
Henry Stracovsky
Piotr Szabelski
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Polaris Innovations Ltd
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/439,544 external-priority patent/US6532505B1/en
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of DE19983738T1 publication Critical patent/DE19983738T1/de
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/161—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement
    • G06F13/1621—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement by maintaining request order
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0215—Addressing or allocation; Relocation with look ahead addressing means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/161—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement
    • G06F13/1626—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement by reordering requests
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1652—Handling requests for interconnection or transfer for access to memory bus based on arbitration in a multiprocessor architecture

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
DE19983738T 1998-11-16 1999-11-15 Universalressourcenzugriffssteuerung Ceased DE19983738T1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10893098P 1998-11-16 1998-11-16
US09/439,544 US6532505B1 (en) 1999-11-12 1999-11-12 Universal resource access controller
PCT/US1999/026994 WO2000029955A1 (en) 1998-11-16 1999-11-15 Universal resource access controller

Publications (1)

Publication Number Publication Date
DE19983738T1 true DE19983738T1 (de) 2002-03-14

Family

ID=26806431

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19983738T Ceased DE19983738T1 (de) 1998-11-16 1999-11-15 Universalressourcenzugriffssteuerung

Country Status (6)

Country Link
JP (1) JP2004500608A (de)
KR (1) KR100710531B1 (de)
CN (1) CN1311357C (de)
DE (1) DE19983738T1 (de)
GB (1) GB2361561B (de)
WO (1) WO2000029955A1 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IL137085A (en) 2000-06-29 2004-08-31 Eci Telecom Ltd Method for effective utilizing of shared resources in computerized systems
DE602004016329D1 (de) * 2003-06-30 2008-10-16 Raytheon Co Effiziente speichersteuerung
US8856401B2 (en) * 2003-11-25 2014-10-07 Lsi Corporation Universal controller for peripheral devices in a computing system
CN100445954C (zh) * 2004-12-25 2008-12-24 鸿富锦精密工业（深圳）有限公司 控管服务使用资源的系统及方法
JP5414350B2 (ja) * 2009-05-08 2014-02-12 キヤノン株式会社 メモリ制御回路、及び、その制御方法
DE102010047718A1 (de) * 2010-10-07 2012-04-12 Infineon Technologies Ag Vorrichtung und Verfahren zum Formatieren und Vorauswählen von Trace Daten
KR102273094B1 (ko) * 2013-05-16 2021-07-05 어드밴스드 마이크로 디바이시즈, 인코포레이티드 영역-특정 메모리 액세스 스케줄링을 가진 메모리 시스템
US10394711B2 (en) * 2016-11-30 2019-08-27 International Business Machines Corporation Managing lowest point of coherency (LPC) memory using a service layer adapter
KR102540964B1 (ko) * 2018-02-12 2023-06-07 삼성전자주식회사 입출력 장치의 활용도 및 성능을 조절하는 메모리 컨트롤러, 애플리케이션 프로세서 및 메모리 컨트롤러의 동작
CN112699067B (zh) * 2021-01-04 2024-05-14 瑞芯微电子股份有限公司 一种指令寻址方法及装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4354225A (en) * 1979-10-11 1982-10-12 Nanodata Computer Corporation Intelligent main store for data processing systems
US4803623A (en) * 1986-10-31 1989-02-07 Honeywell Bull Inc. Universal peripheral controller self-configuring bootloadable ramware
JPH04354225A (ja) * 1991-05-31 1992-12-08 Nec Corp 交換システムの装置間通信制御方式
US5878240A (en) * 1995-05-11 1999-03-02 Lucent Technologies, Inc. System and method for providing high speed memory access in a multiprocessor, multimemory environment
JP4803623B2 (ja) * 2001-07-04 2011-10-26 旭サナック株式会社 エアースプレイハンドガン

Also Published As

Publication number Publication date
KR20010086034A (ko) 2001-09-07
KR100710531B1 (ko) 2007-04-23
WO2000029955A1 (en) 2000-05-25
WO2000029955A9 (en) 2000-10-26
GB2361561B (en) 2003-10-29
CN1354854A (zh) 2002-06-19
GB2361561A (en) 2001-10-24
WO2000029955A8 (en) 2000-09-14
JP2004500608A (ja) 2004-01-08
CN1311357C (zh) 2007-04-18
GB0111925D0 (en) 2001-07-04

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
8127 New person/name/address of the applicant

Owner name: QIMONDA AG, 81739 MUENCHEN, DE

R002 Refusal decision in examination/registration proceedings
R016 Response to examination communication
R006 Appeal filed
R008 Case pending at federal patent court
R081 Change of applicant/patentee

Owner name: INFINEON TECHNOLOGIES AG, DE

Free format text: FORMER OWNER: QIMONDA AG, 81739 MUENCHEN, DE

Owner name: POLARIS INNOVATIONS LTD., IE

Free format text: FORMER OWNER: QIMONDA AG, 81739 MUENCHEN, DE

R082 Change of representative

Representative=s name: WILHELM & BECK, DE

R081 Change of applicant/patentee

Owner name: POLARIS INNOVATIONS LTD., IE

Free format text: FORMER OWNER: INFINEON TECHNOLOGIES AG, 85579 NEUBIBERG, DE

R082 Change of representative

Representative=s name: WILHELM & BECK, DE

R003 Refusal decision now final
R010 Appeal proceedings settled by withdrawal of appeal(s) or in some other way
R130 Divisional application to

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