CN1298626A - 具有柔性导电粘合剂的倒装芯片器件 - Google Patents

具有柔性导电粘合剂的倒装芯片器件 Download PDF

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Publication number
CN1298626A
CN1298626A CN99805435A CN99805435A CN1298626A CN 1298626 A CN1298626 A CN 1298626A CN 99805435 A CN99805435 A CN 99805435A CN 99805435 A CN99805435 A CN 99805435A CN 1298626 A CN1298626 A CN 1298626A
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Prior art keywords
substrate
conductive adhesive
contact pad
flexible conductive
electronic device
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Pending
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CN99805435A
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English (en)
Inventor
凯文·K·T·钟
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Amerasia International Technology Inc
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Amerasia International Technology Inc
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Priority claimed from US09/166,633 external-priority patent/US6108210A/en
Priority claimed from US09/276,259 external-priority patent/US6297564B1/en
Application filed by Amerasia International Technology Inc filed Critical Amerasia International Technology Inc
Publication of CN1298626A publication Critical patent/CN1298626A/zh
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Abstract

一种电子器件(10,100),包括利用具有低弹性模量的柔性导电粘合剂(40,140),以倒装芯片方式与下一级的衬底(20,120)互连的一个或多个半导体芯片(30,130)。柔性导电粘合剂(40,140)作为导电凸点(40,140)施加于衬底(20,120)的接触焊盘(24,124)上或半导体芯片(30,130)的接触焊盘(34,134)上,并且是具有导电颗料的柔性热塑性或热固性树脂填料。利用用于半导体芯片(30,130)的相同柔性导电粘合剂凸点(24,124,34,134),键合例如包括电阻器、电容器之类的封装元件的其它电子器件(44,46,144,146)。优选地,在互连之前用最好是贵金属的金属涂层(38)使芯片(30,130)和下一级衬底(20,120)的接触焊盘钝化,以防止焊盘(37)氧化。可使用其弹性模量实质上与柔性导电粘合剂(40,140)的弹性模量同样低的柔性绝缘有机底层填料(150)。

Description

具有柔性导电粘合剂的倒装芯片器件
本申请要求下列美国申请的优先权：1998年4月24日申请的美国临时申请序列号为60/082885；1998年7月9日申请的美国临时申请序列号为60/092147；1998年10月5日申请的美国专利申请序列号为09/166633；1998年4月28日申请的美国临时申请序列号为60/083326；和1999年3月25日申请的美国专利申请序列号为09/276259。
本发明涉及电子器件，特别涉及包括粘接固定于其上的半导体芯片的电子器件。
自从本世纪六十年代早期发明了集成电路以来，集成电路的应用激增，对于现代社会所依赖和必需的许多电子产品来说，它们已经成为不可缺少的部分。尽管有将电路和其它半导体芯片封装成功能块形式的许多方法，但如果这样的封装电子器件的物理尺寸较小和这种封装器件的成本较低，那么将大大提高这些方法的实用性。
传统上，用细小的金或铝键合引线进行与半导体的连接，该键合引线从半导体芯片顶部表面周边(即其上形成电子电路的芯片侧面)附近设置的接触焊盘到引线框、头部(header)或其它封装或其上连接半导体芯片底部表面的衬底形成回路。最好键合引线互连的布图达到这样的程度，使各键合引线连接的成本低于1分($0.01US)。即使在相对短的距离上细微键合引线回路的电特性也必然会将不需要的电感和电容引入互连中，并由此减小电子器件的带宽和操作速率。作为更快的微处理器和更高频率的信号处理和通信装置的发展结果，近几年来该缺陷变得越来越明显。
减小这些互连的电感和电容的一种方式是缩短互连通路的长度。一个有效的常规方法是翻转半导体芯片(称为“倒装芯片”)，以便接触焊盘与其上形成有相应的可与该半导体接触焊盘直接连接的一组接触焊盘的衬底直接邻近。授予给L.F.Miller的题目为“Method of Joining a Component to aSubstrate”，的美国专利3429040披露了利用焊料凸点将半导体芯片连接于衬底上的倒装芯片结构。在倒装芯片与衬底之间的距离可减小到大约50-100微米(micrometer(微米)还可称为micron(微米))，从而能够以引人注目的较高频率进行操作。
从利用非常精细的金属化和冶金术(metallurgy)来形成只需使用很少且廉价的焊料凸点就可实施连接的适当高度的导电凸点，已发展到按倒装芯片结构的半导体器件的互连。可以用公知的方法改变焊接和焊料凸点技术和冶金术，以容许组分改变和采用适于这种互连的较低和较高温度的回流焊淀积方法。当试图将半导体器件直接连接到有机衬底上时，因材料的热膨胀系数(CTE)不同，因而焊料凸点技术的固有缺陷就变得明显起来。例如，FR-4纤维玻璃衬底具有17ppm/℃的CTE，而半导体芯片具有3ppm/℃的CTE。当半导体芯片尺寸比各边缘大5毫米(5mm)时，即使将倒装芯片互连到CTE仅为7ppm/℃的二氧化铝衬底上，该固有缺陷同样也显露出来。焊料连接具有约700000kg/cm2(约10000000psi，因0.0703kg/cm2等于1psi)的弹性模量，因而具有非常小的柔顺性(compliance)，由此当经受周期性温度摆幅(excursions)时，表现出焊料连接的疲劳失效。
授予给Fujita等人、题目为“Electrically Conductive Adhesive ConnectingArrays of Conductors”的美国专利4113981披露了除它可被压缩的情况之外，填充少量导电颗粒以呈现导电性的非导电粘合剂基。Fujita等人公开了使用这样的粘合剂以连接凸起的接触，其中在非导电粘合剂中普通非接触导电颗粒被压向器件的凸起接触，以便器件的凸起接触与衬底的凸起的接触焊盘电接触，和利用绝缘树脂维持在横向相邻接触之间的绝缘。在常规半导体晶片中，一般由铝形成的接触焊盘凹入在最后的绝缘无机钝化层之下。Fujita专利的缺陷之一是接触焊盘必须在绝缘钝化层或衬底的顶部上延伸。作为半导体晶片制造或作为隔离工序的一部分的该附加的制备将增加半导体器件的成本，并由此增加互连的成本。Fujita互连的另一个缺陷是，在各导电接触内仅形成有限数量的导电路径，从而仅在少量导电颗粒之间的电绝缘能够具有非导电互连，因此没有实用价值。
各向同性导电粘合剂长期以来就已用于在管芯接触焊盘被引线键合到封装引线上之前将半导体管芯的背侧粘接到封装体上，并还发现已广泛地用于在混合电路组件和印刷电路板组件中连接半导体元件、片式电阻器和片式电容器。
在Scharf等人在1967年出版的IEEE Electronic Component Conference会议论文集(pp.269-275)的题目为“Flip-component Technology”论文中披露了用于倒装芯片键合的导电粘合剂的早期使用。其中，将导电粘合剂凸点模板印刷在对于将要键合的各半导体管芯来说具有十六个键合焊盘阵列的衬底上。Scharf等人集中在如何产生印刷精确凸点的更好模板印刷并陈述了使用导电粘合剂的一些优点，例如较低温度的键合和较低的成本。随后，授予给P.Jourdain等人、题目为“Method of Simultaneously ManufacturingMultiple E1ectrical Connections Between Two Electrical Elemems”的美国专利4442966披露了使用导电膏，用以使半导体上铝焊盘与衬底键合，其中采用在接触焊盘上淀积导电粘合剂凸点的模板印刷方法并且在组装半导体与衬底期间进行加热。
在下列几篇文章中，例如由K.Gilleo在“Direct Chip Interconnect UsingPolymer Bonding”,39th Electronic Component Conference,1989年5月(pp.37-44)和一些美国专利中报道了使用这样的导电环氧树脂粘合剂来键合半导体芯片以及这种粘合剂的应用。其中刚性导电粘合剂的缺点与焊料凸点方法的缺点相同，即在温度循环期间连接有破裂的趋势。在所报道的应用中的粘合剂连接使用其弹性模量为70000kg/cm2(1000000psi)或以上的刚性粘合剂，结果，具有非常小的柔顺性和在重复的温度摆幅期间分层(delamination)或破裂。
这样，芯片与元件或芯片与电路板的互连所面临的主要问题是：由于半导体芯片的硅的热膨胀系数与半导体芯片要连接于其上的下一级板即衬底的热膨胀系数不同，因而出现内部应力。因作为现代电子学趋势的极限温度差和较大芯片而加重了的这些高应力引起失效，因而阻碍了常规导电粘合剂和焊料凸点技术的发展。
解决应力问题的常规方法是试图在没有包含导电粘合剂连接的区域中使用环氧树脂底层填料(underfill)来分散应力。尽管适当的底层填料在许多情况下有助于增加热循环数以致这样的互连根据半导体管芯尺寸和温度摆幅可保持6-8倍幸免，但以高强度底层填料的有益压力平衡抵消破坏性剪切应力的固有问题仍然未解决，其中该有益压力限制所出现的循环应变，剪切应力将使连接或部件分层或破裂。半导体管芯尺寸的每一个的增加都增加剪切应力，因而对温度的各特定范围必须重新评价组装的倒装芯片在热循环下的可靠性。同样地，当温度摆幅极限延伸到更低或更高的温度时，附加的剪切应力可相反地影响组装的倒装芯片的可靠性，还必须进行昂贵的重新评价测试。尽管适当的高弹性模量的底层填料有助于增加倒装芯片器件组件抗热摆幅应力的能力，但无论如何，对可利用的半导体器件的尺寸和半导体芯片与下一级衬底之间的热膨胀系数之差都有限制。此外，装入这样的刚性粘合剂底层填料的成本相对较高，高强度粘合剂底层填料还使补救和重做更加困难(如果完全可能)，从而还增加了装有多个倒装芯片器件的成本。
另一个解决该技术问题的可能方案是设计下一级的板即衬底，使其具有与半导体芯片相同的热膨胀系数，即约为3ppm/℃。尽管某些人已成功地采用了该技术解决方案，但因显影和制备这样的衬底和配备支持这种新技术所需的基本设置的不期望的高成本，因而该方法未被广泛采用。甚至更令人烦恼的是：最低成本的普通电子衬底是普遍用于印刷电路板并且其CTE为17ppm/℃的叠层环氧树脂的玻璃纤维，例如FR-4。普通商用电子设备几乎都广泛使用FR-4印刷电路板。因此，要求按附加成本的额外的中间衬底，或者要求用特定的衬底材料来代替FR-4。
因此，需要一种芯片规模封装(chip-scale-packaging)和在功能电路板上的直接芯片(direct-chip)连接的互连技术，它容许半导体芯片的硅与下一级板的热膨胀系数之间的差异。
为此，本发明包括一种半导体芯片，其上具有用贵金属钝化的接触焊盘，其中以倒装芯片方式将半导体芯片连接到其上有相应的用贵金属钝化的接触焊盘的衬底上。用具有低弹性模量的柔性导电粘合剂在半导体芯片和衬底上的相应接触焊盘之间进行连接。
附图的简要说明
当结合附图进行阅读时，可更容易和更好地理解本发明优选实施例的详细说明，其中：
图1是包括本发明倒装芯片半导体器件的电子器件实施例的剖面图；
图2是作为温度函数的各种粘合剂的弹性模量的曲线图；
图3是用于图1的实施例中的半导体器件的平面图；
图4和5分别是在涂敷柔性导电粘合剂之前和之后图3的半导体器件的剖面图；
图6是包括本发明倒装芯片半导体器件的电子器件的另一个实施例的剖面图；
图7是用于图6的实施例中的半导体器件的平面图；
图8是在涂敷柔性导电粘合剂和柔性底层填料之后图7的半导体器件的剖面图；和
图9和10分别是在涂敷柔性导电粘合剂之后图4和7所示半导体器件的另一个实施例的剖面图。
优选实施例的说明
应该理解，借助图示和实例展示本申请所述发明的特定实施例，但这些图示和实例并不构成对本发明的限制，其原理和特征可用于各种实施例中而不会脱离本发明的范围和实质。
一般地，本发明涉及其中在衬底与其上安装的电子元件之间进行互连的电子器件，例如包括半导体器件、电阻器、电容器和其它元件的倒装芯片器件，并且具有低弹性模量以便真正具有柔顺性，以容许电子元件与衬底的热膨胀系数(CTE)之差达到60ppm/℃而不需要高弹性模量的底层填料来防止疲劳和分层失效。如果使用任意的底层填料，期望可以增强电绝缘和减少用作导体的某些金属的迁移，那么这样的底层填料也必须是具有低弹性模量的柔性，其弹性模量最好与柔性导电粘合剂互连的弹性模量相同或更低。
图1的电子器件10包括绝缘衬底20，在绝缘衬底20上对准和安装多个电子器件，例如半导体芯片30、片式(chip)电阻器44和片式电容器46。在本实施例中，在器件30、44、46与衬底20之间没有绝缘底层填料。半导体芯片30包括在衬底管芯32的第一表面上的多个接触焊盘34，接触焊盘34用于使包含于半导体芯片30中的电子电路与外部电子元件电连接。类似地，电阻器44和电容器46分别包括在各自的第一表面上的多个接触焊盘，该接触焊盘用于通过衬底20使分别包含于片式电阻器44和片式电容器46中的电阻电路元件和电容电路元件与外部电子元件电连接。
衬底20包括在其第一表面上以常规方式形成电子电路导体的印刷布线导体22。在分别相应于其上要安装电子器件30、44、46的相应键合焊盘34、45、47的位置的衬底20的导体22上形成多个接触焊盘24。亦即，衬底20的接触焊盘24的排列、尺寸和间隔与半导体器件30的接触焊盘34的排列、尺寸和间隔匹配。衬底20可由诸如FR-4玻璃纤维或BT材料的叠层、或涂有铝的、或氧化铝、陶瓷或其它适当绝缘材料制备，其上的导体22可由诸如铜、铝、金或银等金属形成，或利用例如薄膜或厚膜淀积等公知技术形成导电油墨来形成。如果其上的接触焊盘不是例如贵金属那样的无氧化性材料，那么与贵金属涂层或其合金的接触就应该是钝化的，以实现相容的长期稳定性和充分的电接触，正如连接于衬底上的器件那样的情况。
设置电子器件30、44、46，使其各自的第一表面最接近衬底20的第一表面，以便电子器件30、44、46的各接触焊盘与衬底20上的各个相应的接触焊盘24相邻，即为倒装芯片方式。利用多个柔性导电粘合剂凸点40，电子器件30、44、46连接于衬底20上，从而提供各器件30、44、46与衬底20的机械连接并且在各自的接触焊盘34、45、46与对应地设置于衬底20上的其配对物之间提供低阻抗电连接，典型地为0.1欧姆或以下。
导电粘合剂40必须是“柔性的”，其含义是指它具有低的弹性模量。需要其弹性模量小于约35000 kg/cm2(大约500000psi)的导电粘合剂作为填充组合物。通过使其中包含小颗粒的导电材料，包括热塑性或热固性树脂或其混合物或其共聚物的粘合剂可呈现导电性，这还可使其弹性模量超过纯树脂时的弹性模量。适当柔性的导电粘合剂包括LTP8150型液态柔性热塑性导电粘合剂、ESS8450型(银填料)、ESS8456型(银-钯合金填料)、ESS8457型(镀金铜填料)、ESS8458型(金粉末填料)和ESS8459型(镀金镍填料)柔性环氧基粘合剂膏和PSS8156型(银-钯合金填料)、PSS8157型(镀金铜填料)、PSS8158型(金粉末填料)和PSS8159型(镀金镍填料)柔性膏状粘合剂，所有这些都可从AI Technology,Inc.Of Princeton,New Jersey商业购买。如图2所示，这些柔性导电粘合剂具有约-55℃至-60℃的玻璃转换温度，因而在低温下具有约为35000kg/cm2(约500000psi)的弹性模量。PSS81 50型柔性导电粘合剂包含其玻璃转换温度低于-20℃且在破裂之前其尺寸的延伸率大于30％的热塑性树脂。ESS8450型柔性导电粘合剂包含其玻璃转换温度低于0℃且在破裂之前其线性尺寸的延伸率大于30％的改进的热塑性树脂。优选其熔融流动温度低于300℃的热塑性树脂。
图2中示出各种导电粘合剂的作为温度(℃)函数的弹性模量(psi)的曲线图。在半导体器件典型工作的大部分温度范围内，诸如焊料(solder)和环氧树脂之类的常规粘合剂的弹性模量超过大约70000kg/cm2(约1000000psi)。对于将用于诸如汽车、航天和军事应用等应用领域的器件来说，半导体器件的典型工作温度范围为-55至+150℃，而对于诸如民用娱乐和仪表应用等应用领域的器件来说，其工作温度可以低于所规定的温度范围。
使用于本发明的柔性导电粘合剂的弹性模量在规定半导体器件工作的工作温度范围的至少约50％的范围内大约为35000kg/cm2(约500000psi)或以下。在这样的温度范围内，优选粘合剂的弹性模量低于约7000kg/cm2(约100000psi)，正如ESS8459型所呈现的那样，并且甚至低于约3500kg/cm2(约50000psi)，正如PSS8159型所呈现的那样，这两种类型的柔性导电粘合剂都具有约为-55℃至-60℃的玻璃转换温度。
用于柔性导电粘合剂的适当导电填料包括银、金、钯或铂颗粒(薄片(flakes)、球体或粉末)银-钯合金颗粒，和镀金铜或镍颗粒，正如可从AITechnology,Inc购买的上述柔性导电粘合剂中的各种导电填料。当钯的比例至少在约10-30％的范围内时，银钯合金粉末填料是最能防止银迁移的；尽管钯的较高百分比可提供较大的防止银迁移能力，但是对于许多应用来说，填料变得太昂贵了。贵金属的其它合金也是适用的。本发明的柔性导电粘合剂连接可呈现0.1欧姆或以下的接触电阻。
此外，一个优选的柔性导电粘合剂包括含有镀金和镀钯铜薄片的导电填料。另一个优选的柔性导电粘合剂包括含有镀金和镀钯镍薄片的导电填料。还可以使用如铝等非贵金属和镀有贵金属的其它非贵金属合金核芯。可根据成本和镀敷容易程度来选择核芯材料和镀敷材料。用特别制备的银颗粒制作的另一个柔性导电粘合剂，呈现低于0.00009欧姆-厘米的体电阻率，从而允许较高的电流流过特别的互连，或者，换言之，允许在互连中有较高的电流密度。应该指出，导电填料不限于上述那些特别提及的填料，但导电填料至少必须是钝化的，在颗粒的核芯不是由贵金属构成的情况下，通过涂敷或镀敷贵金属来防氧化。
对于涂有金、钯和铂的金属薄片和粉末来说，贵金属涂层应该多于约5wt％，以提供抗长期高温氧化的稳定性，例如这种氧化可能在贵金属涂层过薄时发生，它将缓慢地引起填料的体电阻率特性劣化。当贵金属涂层超过填料总重量的大约50％时，使用涂敷金属的成本效率是低的。对于令人满意的电性能和成本效率来说，在约5wt％至30wt％范围内的金含量是有效的。
因此，上述是低成本的柔性导电粘合剂互连，因它具有低的弹性模量，并且不容易因衬底20与衬底32之间固有的CTE差引起应力而损坏。包括12mm×12mm的半导体器件而没有底层填料的上述电子器件的实例，在经过1000次温度范围为-55℃至+150℃的循环和50次以上的热冲击循环之后，没有测出键合强度和接触电阻的变劣，其中该热中击循环在-65℃与+150℃之间且在各温度停留10分钟和在温度之间经过10秒钟的过渡。通过与公布的热循环数据进行比较，可容易地认识到使用柔性导电粘合剂互连半导体芯片和衬底的上述电子器件的优势。近年来由Rosner等人研究出版的“FlipChip Bonding Using Isotropic Conductive adhesives”,Proceedings of ElectronicComponent and Technology Conference,1996年5月(PP.578-581);Wu等人的“Materials and Mechanics Issues in F1ip-Chip Organic Packaging”,ElectronicComponent and Technology Conference,1996年5月(PP.524-534)；和Gamota等人的“Advanced Encapsulant Material Systems for Flip Chip”,AdvancingMicroelectronics,1997年7/8月(PP.22-24)，报道了对于焊料凸点连接和刚性导电粘合剂连接来说作为热循环的函数的接触电阻的可靠性及其改进。焊料凸点互连和刚性导电粘合剂互连并且没有底层填料的实例，当衬底经受-25℃到+125℃的适度范围的温度循环时，在100次循环之内就失效了。
结合图3、4和5可理解参照图1所展示和描述的那种类型的电子器件的一种构成方法。图3中，平面图中的半导体衬底32包括在其顶部表面上的多个接触焊盘或键合焊盘34。接触焊盘34可在衬底32的周边，或在衬底32的内部，或如图所示的双方，这对半导体器件30的设计者来说是方便的。不包含接触焊盘34的衬底32的区域用诸如氮化硅或其它绝缘涂层之类的无机氮化物钝化，并不接收柔性导电粘合剂。如下所述，柔性导电粘合剂的凸点40施加于多个接触焊盘34的每一个上。为便于处理和低成本化，最好在晶片级(wafer level)，在晶片刻划和单个衬底管芯分离之前，将柔性导电粘合剂的凸点施加在其上形成的整个衬底32上，当然，如果希望的话，粘合剂可施加于单个衬底32上。
图4是沿图3中剖面线3-3截取的图3的半导体器件的剖面图。接触焊盘34包括铝焊盘37，焊盘37淀积于半导体衬底32上要进行电接触的位置处，用于使形成于其上的电路(未示出)起电功能作用，并且利用无氧化性金属的淀积金属层38使铝焊盘37钝化，最好无氧化性金属为镍和金的顺序，或其它贵金属例如金、银、铂、钯或其合金等其它贵金属。镍和铬也可用于无氧化性的钝化。还利用无氧化性金属使衬底20的接触焊盘24钝化。无机钝化层36的厚度厚于接触焊盘34的厚度，这在半导体制造中是普通的，但并不是必需的。
图5中，在多个接触焊盘34上淀积多个柔性导电粘合剂凸点40。在接触焊盘34的镍-金钝化层38上，淀积柔性导电粘合剂凸点40，并且由柔性热塑性导电粘合剂构成柔性导电粘合剂凸点40，这些粘合剂例如是可从AITechnology,Inc.商业购买的液态热塑性导电粘合剂LTP8150。树脂与银填料之比最好在约100∶100和100∶600之间，以根据淀积来产生约0.00015欧姆-厘米的体(volume)电阻率。用酯醇溶剂可调节液态热塑性粘合剂与银薄片的混合物的粘度，使其达到200000cp，其中酯醇溶剂例如为商品名Texanol的从Eastman Kodak Chemicals商业购买，使用从Brookfield Company ofStoughton,Massachusetts商业购买的粘度测量装置在锥板(cone-and-plate)的0.5rpm下来测量该粘度的。
使用标准不锈钢模板或网板，可淀积构成凸点40的柔性导电粘合剂，该凸点尺寸为75微米或以上，或通过油墨喷射印刷、接触淀积、预先形成叠层结构或其它适当的淀积方式形成该凸点40。凸点的形状可以是圆形或矩形。尽管凸点的尺寸和形状对于大多数应用来说并不是严格的，但优选地，凸点40的尺寸(直径)至少象接触焊盘34的尺寸(直径)那样大，以便在组装成最终的器件10时，呈现尽可能小的接触电阻。允许液态热塑性膏在60-80℃下进行30-60分钟的干燥，以按湿厚度为75-125微米来淀积。当干燥时所获得的粘合剂凸点40的高度典型地为湿厚度的50-60％，凸点直径一般是均匀的，达到接近98％的精度，凸点高度达到接近90％的精度。干凸点的高度典型地为50-100微米。最好，在半导体芯片30为晶片形式并且在用镍-金层38使铝键合焊盘37钝化以防止氧化之后，淀积柔性导电粘合剂凸点40。其上具有干导电凸点40的晶片还可在200℃下进行1-5秒的处理，以改善粘合剂凸点40与接触焊盘34的粘接。然后，可以将制备的晶片切片成单个衬底管芯，在随后被组装成电子器件之前，该管芯可储存在环境温度下。
将图5所示的被制备的其上带有柔性导电粘合剂凸点的半导体器件30组装在下一级的板即衬底20上，以形成如下所述的图1中所示的电子器件10。在衬底20上使半导体器件30对准，以便衬底20和半导体器件30的各接触焊盘24、34对准。如果温度在195-215℃和设置压力在大约0.7kg/cm2(约10psi)，那么把器件30和衬底20压在一起，柔性导电粘合剂凸点40便立即使各接触焊盘键合在一起。为了获得更高的效率，将衬底20预热到约为150-200℃的温度，同时将拾取半导体芯片30的卡盘预热到约220-280℃。已经表明，这样组装的包括键合到氧化铝衬底20上且其边缘尺寸大于10mm的半导体管芯30的电子器件10可承受1000次以上在-65℃与150℃之间的热循环和50次以上在-65℃与+150℃之间的热冲击，而没有测出接触电阻的变化。在相对湿度(RH)为85％且在85℃下暴露168小时，也没有测出电接触电阻的劣化，在100％的RH和100℃下暴露200小时也没有测出管芯30与衬底20的共有粘接强度的劣化。已证明，在氧化铝衬底上厚膜和薄膜金键合焊盘都是令人满意的。
应该指出，在上述组装方法中所用的器具和温度与具有利用回流焊的焊料凸点的倒装芯片器件的传统设置和连接相适宜的。在两种情况下，倒装芯片器件的接触焊盘都与衬底的相应接触焊盘对准，然后在低于300℃的温度和小于0.7kg/cm2(约10psi)的压力下压接在一起，在约10秒内实现键合。
尽管参照图1-5所述的上述实施例不要求和不使用底层填料，但在某些应用中，可能希望使用具有适当流动特性的底层填料。底层填料是放置于诸如倒装芯片器件之类的被安装器件与衬底之间的导电互连之间的空间中的绝缘粘合剂材料。为了保持机械挠性和低的内部应力，按照本发明的互连键合的特征在于，适当的底层填料材料是非导电的柔性导电粘合剂，其弹性模量大体与在半导体器件与衬底之间进行导电互连的柔性导电粘合剂的相同或低于该弹性模量，即小于约35000kg/cm2(约500000psi)。
图6的电子器件100包括绝缘衬底120，在绝缘衬底120上对准和安装有多个电子器件，例如半导体芯片130、片式电阻器144和片式电容器146。半导体芯片130包括在衬底132的第一表面上的多个接触焊盘134，接触焊盘134用于在包含于半导体芯片130的电子电路与外部电子元件之间进行电连接。类似地，片式电阻器144和片式电容器146分别包括在各自的第一表面上的多个接触焊盘，接触焊盘用于通过衬底120在分别包含于片式电阻器144和片式电容器146的电阻和电容元件电路与外部电子元件之间进行电连接。
衬底120包括在其第一表面上以常规方式形成电子电路导体的印刷布线导体122。在分别相应于其上要安装电子器件130、144、146的键合焊盘134、145、147的位置的衬底120的导体122上形成多个接触焊盘124。亦即，衬底120的接触焊盘124的排列、尺寸和间隔与半导体器件130的接触焊盘134的排列、尺寸和间隔匹配。衬底120可由诸如FR-4玻璃纤维、或BT材料叠层、或氧化铝、陶瓷或其它适当绝缘材料等制备，其上的导体122可由诸如铜、铝、金或银等金属形成，或利用例如薄膜或厚膜淀积等公知技术形成导电油墨来形成。如果其上的接触焊盘不是例如贵金属那样的无氧化性的材料，那么与贵金属涂层或合金的接触就应该是钝化的，以具有相容的长期稳定性和充分的电接触，正如粘附于衬底上的器件那样的情况。
设置电子器件130、144、146，使其各自的第一表面最接近衬底120的第一表面，以便电子器件130、144、146的各接触焊盘与衬底120上的各个相应的接触焊盘124相邻。利用多个柔性导电粘合凸点140，电子器件130、144、146被粘接于衬底120上，从而提供各器件130、144、146与衬底120的机械连接并且在各自的接触焊盘134、145、146与对应地设置于衬底120上的其配对物之间提供低阻抗电连接。绝缘柔性底层填料150基本上填充在图5的实施例中的未被柔性导电粘合剂140占据的器件130、144、146与衬底120之间的空隙或空间。
导电粘合剂140以及绝缘粘合剂150都必须是“柔性的”，其含义是指它们分别具有小于约35000kg/cm2(大约500000psi)的弹性模量。可从AITechnology,Inc.Of Princeton,New Jersey商业购买的适当柔性导电粘合剂与参照图1的实施例所述的一样。可以为热塑性或热固性树脂的非导电性或绝缘树脂可从柔性底层填料或封装材料中选择，例如MEE7650-5环氧树脂基的封装材料还可从AI Technology,Inc.获得，该材料的弹性模量低于1050kg/cm2(大约15000psi)和玻璃转换温度低于-20℃。除增加元件130、144、146和衬底120之间的键合强度之外，该柔性绝缘底层填料还有助于防止在高湿度条件下可能产生的在元件130、144、146或衬底120的接触焊盘之间的银迁移。
结合图7和8可理解参照图6所展示和描述的电子器件的一种构成方法。图7中，平面图中的半导体衬底132包括在其顶部表面上的多个接触焊盘或键合焊盘134。不包含接触焊盘134的衬底132的区域用诸如氮化硅或其它绝缘涂层之类的无机氮化物钝化，并接收柔性非导电粘合剂150。如下所述，柔性导电粘合剂140的凸点施加于多个接触焊盘134的每一个上，并且柔性绝缘粘合剂150的图形施加于柔性导电粘合剂凸点之间的空间中。为便于处理和低成本化，最好在晶片划片和单个衬底管芯分离之前，在晶片级将柔性导电粘合剂140的凸点和非导电的柔性粘合剂150的图形施加在其上形成的整个衬底132上，当然，如果希望的话，粘合剂可施加于单个衬底132上。此外，柔性绝缘粘合剂150最好不完全填充接触焊盘34之间的空间，以便在半导体器件130与衬底120的键合期间，允许柔性粘合剂140、150流动并填充空隙。
图8是沿图7中剖面线7-7截取的图7的半导体器件的剖面图。接触焊盘134包括铝焊盘137，淀积于半导体衬底132上要进行电接触的位置处，使其上形成的电路(未示出)起电功能作用。利用无氧化性金属的淀积金属层138使铝焊盘137钝化，最好无氧化性金属为镍和金或镍和铂层的顺序，或另外的贵金属，例如金、银、钯、铂或其合金。在图8的示例性实施例中，无机钝化层136的厚度基本上与接触焊盘134的厚度相同。
在多个接触焊盘134上淀积多个柔性导电粘合剂凸点140。在接触焊盘134的镍-金钝化层138上，淀积柔性导电粘合剂凸点140，并且由柔性热塑性导电粘合剂构成柔性导电粘合剂凸点140，这些粘合剂例如是可从AITechnology,Inc.商业购买的液态热塑性导电粘合剂LTP8150，如以上参照图1的实施例所述那样。再有，尽管凸点的尺寸和形状对于大多数应用来说并不是严格的，但优选地，凸点140的尺寸至少象接触焊盘134的尺寸那样大，以便在组装成最终器件100时，呈现尽可能小的接触电阻。
类似地，可构图柔性绝缘粘合剂150，填充凸点140之间的空间，或者最好可以构图柔性绝缘粘合剂150不完全填充该空间，以便在半导体器件130与衬底120组装时允许柔性导电粘合剂140和柔性绝缘粘合剂150都可流动。最好，在半导体芯片30为晶片形式时在用镍-金层38或其它贵金属使铝键合焊盘137钝化以防止氧化之后，淀积柔性导电粘合剂凸点140和柔性绝缘粘合剂150的图形。然后，可以将制备的晶片切片分成单个衬底管芯，在后面被组装成电子器件之前，管芯可储存在环境温度下。使用标准不锈钢模板或网板，可淀积构成凸点140的柔性导电粘合剂，或通过油墨喷射印刷、接触淀积、预先形成叠层结构或其它适当的淀积方式形成该凸点140。
用作底层填料的柔性绝缘粘合剂是象优选柔性导电粘合剂那样的在淀积和干燥之后以及最终组装键合期间之前在延长期间可储存在环境温度下。适当材料的实例是可从AI Technology,Inc.购买的液态热塑性膏型LTP7150和液态环氧树脂型LESP7450。LTP7150是一种热塑性膏，它可淀积和B分级(B-staged)，通过在60-80℃进行30-60分钟的处理来形成固体膜。LESP7450是一种环氧树脂膏，它可淀积和B分级，通过在60-80℃进行30-60分钟的处理来形成固态膜。这些改进的B分级柔性粘合剂在其纯树脂形式具有诸如整个玻璃转换温度低于-55℃的分子结构。这两个B分级柔性绝缘粘合剂具有较高的流动指数和比柔性导电粘合剂凸点的弹性模量低的弹性模量。当绝缘粘合剂流动和填充器件边缘附近的空间时，也可保护器件的边缘。在暴露于快速加速的湿度和温度下的机械测试表明，其键合强度改变小于20％，并且没有键合的分层。对用这些粘合剂将具有大于20ppm/℃的CTE的大的硅半导体管芯(16mm边缘尺寸)粘接到铝衬底上的组装的电子器件进行2000次从-65℃到150℃的热循环，也没有产生键合的分层和没有测出键合强度的降低。
将图8中所示的被制备的其上带有柔性导电粘合剂凸点140和柔性绝缘粘合剂150的图形的半导体器件130组装在下一级的板即衬底120上，形成如下所述的图6中所示的电子器件100。在衬底120上使半导体器件130对准，以便衬底120和半导体器件130的各接触焊盘124、134对准。如果温度在195-215℃和设置压力在大约10psi，那么把器件130和衬底120压在一起，柔性导电粘合剂凸点140便立即使各接触焊盘124、134键合在一起。以同样的方式，柔性绝缘粘合剂150使衬底120的接触焊盘124之间的区域与半导体器件130的接触焊盘134之间的相应区域键合。为了获得更高的效率，将衬底120预热到约为150-200℃的温度，同时将拾取半导体芯片130的卡盘预热到约220-280℃。已经表明，这样组装的包括键合到氧化铝衬底120上的其边缘尺寸大于10mm的半导体管芯130的电子器件100可承受1000次以上在-65℃与+150℃之间的热循环和50次以上在-65℃与+150℃之间的热冲击，而没有测出接触电阻的变化。在相对湿度(RH)为85％且在85℃下经过168小时，也没有测出电接触电阻的劣化，在100％的RH和100℃下经过200小时也没有测出管芯130与衬底120的共有粘接强度的劣化。已证明，在铝衬底上厚膜和薄膜金键合焊盘都是令人满意的。
使用柔性环氧树脂粘合剂的组装过程是类似的。设置的卡盘维持在150-175℃的较低温度，和允许在组装之前在l50-175℃下对将要置于下一级衬底板上的管芯另外再处理5分钟，而不用加压或使用其它器具。当使用热塑性基柔性粘合剂时，必须维持放置的卡盘(和它所固定的管芯)和衬底的温度比柔性导电粘合剂凸点和绝缘粘合剂底层填料的温度高几度，如果需要，它们可呈现流动性的。
在绝大多数应用中，接触焊盘34和粘合剂凸点40可以具有相同的尺寸。可是，在某些情况下，因相对少量的接触焊盘，因而整个键合区域可能较小，从而在相对于接触焊盘的区域实质上扩大导电凸点B同时维护接触焊盘的节距(即在相邻接触焊盘之间中心-中心之间间隔)来说是有利的。在柔性导电凸点的区域中这样的增加将增加半导体器件30与衬底20之间键合的机械强度，以及降低整个电阻和增加柔性导电互连的载流能力。
接触焊盘34的总面积基本上小于半导体器件30总面积的约33％，键合区域可能不足以提供足够的键合强度同时不能增强。在图9的实施例中，半导体器件30上的柔性导电粘合剂凸点240被有意扩大，以便覆盖实质上大于单个键合焊盘34的区域。可使用被扩大的导电粘合剂凸点240同时维持在多于50微米的最接近的焊盘之间的推荐最小间隔，导电凸点240的“悬挂”可增加总键合面积，使其大于约50％，并由此仅利用柔性导电粘合剂而不需要底层填料层来增加键合整体性。
另一方面，当大量接触焊盘34是大的并且接触焊盘的节距小时，期望实质上减小柔性导电凸点的面积同时维持该节距。导电凸点面积的减小有助于减小键合工序中相邻互连之间桥接的可能性。柔性互连面积的减小在没有使用绝缘底层填料的情况下特别有用。
例如，当接触焊盘34比约100微米更近地靠在一起时，可使用具有小于接触焊盘34的面积的导电凸点340。图10中，导电凸点340的面积基本上小于半导体器件30的键合焊盘34。该方法更适于低电流密度互连和由衬底20和半导体器件30构成的电子电路一部分所允许的较高互连电阻的情况。
尽管利用上述示例性实施例已经描述了本发明，但本领域的技术人员显然可以在权利要求所限定的本发明范围和精神内进行各种改变。例如，衬底20的电路板材料可以与具有7ppm/℃的CTE的陶瓷氧化铝不同。事实上，大多数商业应用使用FR-4、BT和具有较大CTE的其它有机衬底材料，以便在其CTE为3ppm/℃的硅倒装芯片与衬底之间的CTE失配度从氧化铝的7ppm/℃的CTE增加到FR-4的17ppm/℃的CTE。由于较大CET的失配，例如，大于10ppm/℃，热循环和热冲击是很可能因互连的分层或失效而引起失效的。按照本发明的电子器件10，使用可从AI Technology,Inc.购买的LTP8150型和ESS8450型柔性导电粘合剂组装电子器件10，并且包括键合到铝衬底上的其边缘尺寸大至16mm以便具有3对25ppm/℃的CTE失配的硅器件，其中进行2000次以上从-65℃到150℃的热循环，没有检测到分层或键合强度的改变。对使用FR-4衬底的电子器件进行类似测试，没有发现分层或键合强度的改变。
此外，也可以代之以具有与AI Technology,Inc.LTP8150型的相同或相似的分子柔顺性、粘性和导电率的其它柔性导电粘合剂以及使用其它导电填料的柔性粘合剂。适当的供选择的淀积装置，例如模板印刷、丝网印刷、掩蔽法、油墨喷射印刷、接触淀积、预先形成叠层、探针配置等，可用于将导电粘合剂凸点40、140、240淀积在半导体器件30或其它电子元件44、46的接触焊盘上，或者，将导电粘合剂凸点40、140、240淀积在衬底20的接触焊盘上。
尽管上述示例性的实施例具有在半导体管芯上的柔性导电粘合剂凸点和柔性绝缘粘合剂图形，但应该指出，柔性导电粘合剂凸点和柔性绝缘粘合剂的图形也可以淀积在衬底上。或者，柔性绝缘粘合剂的图形可以淀积在半导体器件或衬底之一上，而柔性导电粘合剂凸点可淀积在另一个之上。此外，柔性绝缘粘合剂可包含导热但绝缘的填料。这样的一些适当的粘合剂包括可从AI Technology,Inc.购买的LESP7455、LESP7555和LTP7095型。
虽然上述示例性实施例展示了单倒装连接，但应该明白，利用本说明书所述的方法，多个半导体芯片也可安装于相同的器件衬底上。应该指出，利用导电凸点和本说明书中所述的方法，裸(即未覆盖)倒装芯片半导体器件和其它电子元件，以及封装的半导体器件和电子元件，都可连接到相同的电路衬底上。

Claims (9)

1．一种电子器件(10,100)，包括：
至少一个半导体器件(30,130)，在其第一表面上具有多个接触焊盘(34,134)；衬底(20,120)，在其第一表面上具有多个接触焊盘(24,124)，其中按相应于接触焊盘(34,134)的图形排列所述衬底(20,120)的所述接触焊盘(24,124)，和设置所述半导体器件(30,130)和所述衬底(20,120)，使它们各自的第一表面彼此最接近；和在所述半导体器件(30,130)的接触焊盘(34,134)和所述衬底(20,120)的接触焊盘(24,124)之间的多个连接(40,140)，其特征在于，所述连接包括其弹性模量低于35000kg/cm2的柔性导电粘合剂(40,140)。
2．如权利要求1的电子器件(10,100)，其特征在于，柔性导电粘合剂(40,140)的弹性模量低于7000kg/cm2。
3．如权利要求2的电子器件(10,100)，其特征在于，在规定电子器件(10,100)工作的温度范围的50％以上保持弹性模量。
4．如权利要求1的电子器件(10,100)，其特征在于，柔性导电粘合剂(40,140)包括从其熔融流动温度低于300℃的熔热塑性塑料、可交链的热固性塑料和其混合物和其共聚物构成的组中选择的有机树脂，其中作为纯树脂的有机树脂的分子结构的基本部分具有低于0℃的玻璃转换温度。
5．如权利要求1的电子器件(10,100)，其特征在于，柔性导电粘合剂(40,140)包括导电颗粒，所述导电颗粒基本上小于所述半导体器件(30,130)和所述衬底(20,120)的任何接触焊盘(24,124,34,134)，其中所述导电颗粒包括至少一种：(a)选自由银、金、钯、铂和其合金构成的组中的金属，和(b)镀有选自由银、金、钯、铂和其合金构成的组中的金属的非贵金属核芯。
6．如权利要求5的电子器件(10,100)，其特征在于，所述合金是具有至少10wt％的钯的银钯合金。
7．如权利要求5的电子器件(10,1000)，其特征在于，所述镀敷的非贵金属核芯包括不低于5wt％的金、钯、铂和其合金之一。
8．如权利要求1的电子器件(10,100)，其特征在于，所述柔性导电粘合剂(40,140)淀积在所述半导体器件(30,130)和所述衬底(20,120)之一的接触焊盘(24,124,34,134)上，其中淀积在所述接触焊盘(24,124,34,134)的至少某些上的柔性导电粘合剂(40,140)具有(a)实质上大于所述接触焊盘(24,124,34,134)区域和(b)实质上小于所述接触焊盘(24,124,34,134)区域之一的区域，同时维持所述接触焊盘(24,124,34,134)之间的节距。
9．如权利要求1的电子器件(10,100)，其特征在于，用其弹性模量低于柔性导电粘合剂(40,140)的弹性模量的柔性绝缘粘合剂(150)，至少部分填充具有柔性导电粘合剂(40,140)的所述半导体器件(30,130)的不与所述衬底(20,120)连接的区域。
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KR20010088292A (ko) 2001-09-26
EP1090535A4 (en) 2003-09-24

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