CN1238595A - 差分放大器电路 - Google Patents

差分放大器电路 Download PDF

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CN1238595A
CN1238595A CN99104407A CN99104407A CN1238595A CN 1238595 A CN1238595 A CN 1238595A CN 99104407 A CN99104407 A CN 99104407A CN 99104407 A CN99104407 A CN 99104407A CN 1238595 A CN1238595 A CN 1238595A
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differential amplifier
amplifier circuit
current source
mos transistor
constant
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CN1132306C (zh
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福井厚夫
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Ablic Inc
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Seiko Instruments Inc
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45Differential amplifiers
    • H03F3/45071Differential amplifiers with semiconductor devices only
    • H03F3/45076Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45179Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
    • H03F3/45183Long tailed pairs
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45Differential amplifiers
    • H03F3/45071Differential amplifiers with semiconductor devices only
    • H03F3/45479Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
    • H03F3/45632Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit
    • H03F3/45744Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit by offset reduction
    • H03F3/45766Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit by offset reduction by using balancing means
    • H03F3/45771Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit by offset reduction by using balancing means using switching means
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45048Calibrating and standardising a dif amp
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45564Indexing scheme relating to differential amplifiers the IC comprising one or more extra current sources
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45612Indexing scheme relating to differential amplifiers the IC comprising one or more input source followers as input stages in the IC
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45674Indexing scheme relating to differential amplifiers the LC comprising one current mirror

Abstract

为了即使在输入电压接近于GND时也将在差分级产生的偏移电压设置成零并保证稳定地工作,将通过修整能改变电流的恒流源和由耗尽型P-MOS晶体管构成的漏极接地电路加到常规的差分放大器电路的各个输入端上。

Description

差分放大器电路
本发明涉及半导体集成电路的差分放大器电路。
作为常规的差分放大器电路,已知有图5中示出的电路。这就是说,该常规的差分放大器电路由差分对100、恒流源106和电流镜像电路101构成,其中,差分对100包括增强型P-MOS晶体管102和103,增强型P-MOS晶体管102和103的源极互相连接,恒流源106的一端连接到该差分对的源极,其另一端连接到电源Vdd,电流镜像电路101包括增强型N-MOS晶体管104和105。形成该差分对100的增强型P-MOS晶体管102的栅极连接到非反相输入端1上,而增强型P-MOS晶体管103的栅极连接到反相输入端2上,该差分对的增强型P-MOS晶体管103和电流镜像电路101的增强型N-MOS晶体管105的各个漏极连接到输出端3上。
在非反相输入端1的电压VINP大于反相输入端2的电压VINN的情况下,输出端3的电压VOUT变成高电平,而在VINP小于VINN的情况下,VOUT变成低电平。
图5中示出的常规的差分放大器电路使约10mV的偏移电压得以产生,这导致该CMOS差分放大器电路的一个严重缺点。
另外,在图5中示出的常规的差分放大器电路中,在非反相输入端1或反相输入端2的电压接近于GND(地电位)的情况下,形成差分对的增强型P-MOS晶体管102或103变成非饱和状态,这导致下述的问题:偏移电压的更加恶化,工作速度的降低或工作的不正常。
为了解决上述问题,本发明提供一种用于调整偏移电压的电路和一种用于防止差分对的增强型P-MOS晶体管变成非饱和状态的电平移动电路。
图1示出按照第1实施例的差分放大器电路的电路图。
图2示出能利用激光器来调整电流的恒流源的电路图。
图3示出按照本发明的第2实施例的差分放大器电路的电路图。
图4示出按照本发明的第3实施例的差分放大器电路的电路图。
图5示出常规的差分放大器电路的电路图。
在本发明中,将一种能通过修整(trimming)来改变电流值的恒流源和一种由增强型P-MOS晶体管形成的漏极接地电路加到差分放大器电路的各个输入端上。
以下,将参照附图来描述本发明的实施例。
图1示出按照本发明的第1实施例的差分放大器电路的电路图。该差分放大器电路除了由增强型P-MOS晶体管102和103构成的差分对100和由增强型N-MOS晶体管104和105构成的电流镜像电路101外,还包括恒流源109和110以及漏极接地电路107和108,其中,恒流源109和110能通过使用激光器等进行修整来改变电流值,电路107和108由用来进行电平移动的增强型P-MOS晶体管来构成。如果假定能改变电流的恒流源109的输出电流是I109,则在增强型P-MOS晶体管107的栅极与源极间的电压VSG107由表达式(1)来给出。 VSG 107 = Vtp ÷ 2 μ · Cox · L W · I 109 - - - ( 1 )
类似地,如果假定能改变电流的恒流源110的输出电流是I110,则在增强型P-MOS晶体管108的栅极与源极间的电压VSG108由表达式(2)来给出。 VSG 108 = Vtp ÷ 2 μ · Cox · L W · I 110 - - - ( 2 )
其中,Vtp是增强型P-MOS晶体管的阈值电压,μ是迁移率,Cox是单位面积的栅极电容,L是栅极长度,和W是栅极宽度。
由此,如果假定在非反相输入端1处的电压是VINP,在反相输入端2处的电压是VINN,则根据表达式(1)和(2),在点A和B处的电压VA和VB由下述的表达式来给出。
VA=VINP+VSG107                  …(3)
VB=VINN+VSG108                  …(4)
根据表达式(3)和(4),在VINP-VINN=0时的VA-VB由下述的表达式来给出。
VA-VB=VSG107-VSG108             …(5)
将表达式(1)和(2)代到表达式(5)中,以得到下述的表达式。 VA - VB = 2 μ · Cox L W I 109 - 2 μ · Cox · L W · I 110 - - - ( 6 )
如果假定由图1中示出的差分放大器电路产生的偏移电压是Vos,则总的偏移电压Vos(total)由下述的表达式来给出。
Vos(total)=VA-VB-Vos    …(7)
为了将总的偏移电压Vos(total)设置成0,根据表达式(7),可满足下述的表达式。
Vos=VA-VB-              …(8)
满足由表达式(8)定义的条件可抵消由图1中示出的差分放大器电路产生的偏移电压Vos其结果是可将总的偏移电压Vos(total)设置成0。
这就是说,通过诸如将参照图2进行描述的用激光器切割熔丝的修整装置来调整I109或I110的值,由表达式(6)或(8)得到下述的表达式,由此能将总的偏移电压Vos(total)设置成0。 Vos = 2 μ · Cos · L W · I 109 - 2 μ · Cox · I 110 - - - ( 9 )
即使非反相输入端1或反相输入端2处的电位是GND,但由于增强型P-MOS晶体管107和108进行电平移动,故由表达式(3)和(4)显然可知,满足VA=VSG107和VB=VSG108(VA和VB通常约为0.8V)。其结果,差分对100的增强型P-MOS晶体管102或103不会变成非饱和状态。因此,当VINP或VINN接近于GND时,不会象常规的差分放大器电路中那样,引起偏移电压的恶化,工作速度的降低或工作的不正常等情况。表达式(8)显示出将总的偏移电压设置成0的条件。但是,显然通过适当地调整恒流源109和110的电流I109和I110,不仅可将总的偏移电压Vos(total)设置成0,而且可将其设置成任意的值。
图2示出能通过使用激光器来调整电流的恒流源109和110的实施例。通过用激光器切割熔丝124至126来调整耗尽型P-MOS晶体管120~123的沟道长度L,由此能改变输出电流。采用以串联的方式再连接任意数目的熔丝和耗尽型P-MOS晶体管,可更精确地调整输出电流。
图3示出按照本发明的第2实施例的差分放大器电路。第2实施例与第1实施例之间的差别在于:图3中的其电流值为固定的恒流源111被图1中的通过使用激光器等能调整电流的恒流源110代替。类似地,显然第2实施例可得到与第1实施例相同的效果。同样,即使在其电流值为固定的恒流源被图1中的通过使用激光器等能调整电流的恒流源109代替的情况下,显然也能得到与图3中示出的第2实施例相同的效果。
图4示出按照本发明的第3实施例的差分放大器电路。该差分放大器电路除了由增强型N-MOS晶体管200和201构成的差分对100和由增强型P-MOS晶体管202和203构成的电流镜像电路101外,还包括恒流源109和110以及漏极接地电路204和205,其中,恒流源109和110能通过使用激光器等进行修整来改变电流值,电路204和205由用来进行电平移动的增强型N-MOS晶体管来构成。
类似地,在图4中,显然通过利用修整调整恒流源109和110的电流I109和I110可调整编移电压。另一方面,第3实施例与第1实施例的不同之处在于:当非反相输入端1处的电压VINP或反相输入端2处的电压VINN接近于Vdd时,不会引起偏移电压的恶化,工作速度的降低或工作的不正常等情况。
在图4中,即使将通过使用激光器等能调整电流的恒流源只用于通过使用激光器等能调整电流的恒流源109和110的任一个,将其电流值为固定的恒流源用于另一个恒流源109或110,显然也能得到相同的效果。在按照本发明的差分放大器电路中,即使输入电压接近于GND,特性也不会恶化,而且通过使用修整技术可将偏移电压设置成任意值。

Claims (1)

1.一种差分放大器电路,其特征在于:
包括:
恒流源,通过使用激光器等进行修整能调整电流;以及
漏极接地电路和差分放大器电路,两者串联地连接到所述恒流源上,其中,按照由所述差分放大器电路产生的偏移电压值来修整所述恒流源的电流。
CN99104407A 1998-03-25 1999-03-25 差分放大器电路 Expired - Lifetime CN1132306C (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP78070/1998 1998-03-25
JP10078070A JPH11272786A (ja) 1998-03-25 1998-03-25 差動増幅回路
JP78070/98 1998-03-25
US09/275,697 US6114906A (en) 1998-03-25 1999-03-24 Differential amplifier circuit

Publications (2)

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CN1238595A true CN1238595A (zh) 1999-12-15
CN1132306C CN1132306C (zh) 2003-12-24

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JP (1) JPH11272786A (zh)
CN (1) CN1132306C (zh)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100583636C (zh) * 2005-03-21 2010-01-20 半导体元件工业有限责任公司 扇出缓冲器及其方法
CN101854150A (zh) * 2008-12-31 2010-10-06 东部高科股份有限公司 运算放大器
CN104914286A (zh) * 2014-03-13 2015-09-16 精工电子有限公司 电压检测电路
CN106059507A (zh) * 2016-05-30 2016-10-26 矽力杰半导体技术(杭州)有限公司 D类放大器和抑制d类放大器噪声的方法

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JP2002217653A (ja) * 2001-01-12 2002-08-02 Toshiba Microelectronics Corp 差動増幅回路
JP3998553B2 (ja) * 2002-09-30 2007-10-31 Necエレクトロニクス株式会社 差動出力回路,及びそれを用いた回路
US7285995B2 (en) * 2004-02-02 2007-10-23 Toshiba America Electronic Components, Inc. Charge pump
JP4477373B2 (ja) * 2004-02-05 2010-06-09 Necエレクトロニクス株式会社 定電流回路
US7049889B2 (en) * 2004-03-31 2006-05-23 Analog Devices, Inc. Differential stage voltage offset trim circuitry
FR2895171B1 (fr) * 2005-12-16 2008-02-15 Atmel Grenoble Soc Par Actions Circuit electronique a compensation de decalage intrinseque de paires diffentielles

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US5045806A (en) * 1988-04-17 1991-09-03 Teledyne Industries Offset compensated amplifier
US5200654A (en) * 1991-11-20 1993-04-06 National Semiconductor Corporation Trim correction circuit with temperature coefficient compensation
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EP0782250B1 (en) * 1995-12-29 2001-05-30 STMicroelectronics S.r.l. Offset compensating method and circuit for MOS differential stages
US5812005A (en) * 1996-07-30 1998-09-22 Dallas Semiconductor Corp. Auto zero circuitry and associated method

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100583636C (zh) * 2005-03-21 2010-01-20 半导体元件工业有限责任公司 扇出缓冲器及其方法
CN101854150A (zh) * 2008-12-31 2010-10-06 东部高科股份有限公司 运算放大器
CN104914286A (zh) * 2014-03-13 2015-09-16 精工电子有限公司 电压检测电路
CN106059507A (zh) * 2016-05-30 2016-10-26 矽力杰半导体技术(杭州)有限公司 D类放大器和抑制d类放大器噪声的方法
CN106059507B (zh) * 2016-05-30 2019-03-01 上海芃矽半导体技术有限公司 D类放大器和抑制d类放大器噪声的方法

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CN1132306C (zh) 2003-12-24
JPH11272786A (ja) 1999-10-08

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