CN1213142A - 带有内置行缓冲器的半导体存储器和驱动该存储器的方法 - Google Patents
带有内置行缓冲器的半导体存储器和驱动该存储器的方法 Download PDFInfo
- Publication number
- CN1213142A CN1213142A CN98120206A CN98120206A CN1213142A CN 1213142 A CN1213142 A CN 1213142A CN 98120206 A CN98120206 A CN 98120206A CN 98120206 A CN98120206 A CN 98120206A CN 1213142 A CN1213142 A CN 1213142A
- Authority
- CN
- China
- Prior art keywords
- line buffer
- data
- subarray
- semiconductor memory
- line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Read Only Memory (AREA)
Abstract
Description
Claims (13)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP26647397A JP3277860B2 (ja) | 1997-09-30 | 1997-09-30 | ロウバッファ内蔵半導体メモリ |
JP266473/1997 | 1997-09-30 | ||
JP266473/97 | 1997-09-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1213142A true CN1213142A (zh) | 1999-04-07 |
CN1187759C CN1187759C (zh) | 2005-02-02 |
Family
ID=17431427
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB981202063A Expired - Fee Related CN1187759C (zh) | 1997-09-30 | 1998-09-30 | 带有内置行缓冲器的半导体存储器和驱动该存储器的方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US6154385A (zh) |
JP (1) | JP3277860B2 (zh) |
KR (1) | KR100328374B1 (zh) |
CN (1) | CN1187759C (zh) |
TW (1) | TW411469B (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107068176A (zh) * | 2015-12-30 | 2017-08-18 | 三星电子株式会社 | 半导体存储器设备及包括半导体存储器设备的存储器系统 |
US9870831B2 (en) | 2001-12-19 | 2018-01-16 | Toshiba Memory Corporation | Semiconductor integrated circuit adapted to output pass/fail results of internal operations |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10068636B2 (en) * | 2016-12-30 | 2018-09-04 | Intel Corporation | Apparatuses and methods for accessing and scheduling between a plurality of row buffers |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4649516A (en) * | 1984-06-01 | 1987-03-10 | International Business Machines Corp. | Dynamic row buffer circuit for DRAM |
JPS6439692A (en) * | 1987-08-05 | 1989-02-09 | Hitachi Ltd | Semiconductor memory device |
KR910009555B1 (ko) * | 1989-01-09 | 1991-11-21 | 조경연 | 싱글 포트 듀얼 ram(spdram) |
US5323350A (en) * | 1992-08-18 | 1994-06-21 | Micron Technologies, Inc. | Integrated circuit memory with dual P-sense amplifiers associated with each column line |
JP3380050B2 (ja) * | 1994-07-14 | 2003-02-24 | 富士通株式会社 | 半導体記憶装置のデータ読み出し方法 |
-
1997
- 1997-09-30 JP JP26647397A patent/JP3277860B2/ja not_active Expired - Fee Related
-
1998
- 1998-09-30 CN CNB981202063A patent/CN1187759C/zh not_active Expired - Fee Related
- 1998-09-30 TW TW087116324A patent/TW411469B/zh active
- 1998-09-30 US US09/163,169 patent/US6154385A/en not_active Expired - Lifetime
- 1998-09-30 KR KR1019980040772A patent/KR100328374B1/ko not_active IP Right Cessation
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9870831B2 (en) | 2001-12-19 | 2018-01-16 | Toshiba Memory Corporation | Semiconductor integrated circuit adapted to output pass/fail results of internal operations |
CN104200839B (zh) * | 2001-12-19 | 2018-07-03 | 东芝存储器株式会社 | 半导体集成电路 |
CN104200841B (zh) * | 2001-12-19 | 2018-07-24 | 东芝存储器株式会社 | 半导体集成电路 |
US10410731B2 (en) | 2001-12-19 | 2019-09-10 | Toshiba Memory Corporation | Semiconductor integrated circuit adapted to output pass/fail results of internal operations |
US10741266B2 (en) | 2001-12-19 | 2020-08-11 | Toshiba Memory Corporation | Semiconductor integrated circuit adapted to output pass/fail results of internal operations |
US11295823B2 (en) | 2001-12-19 | 2022-04-05 | Kioxia Corporation | Semiconductor integrated circuit adapted to output pass/fail results of internal operations |
CN107068176A (zh) * | 2015-12-30 | 2017-08-18 | 三星电子株式会社 | 半导体存储器设备及包括半导体存储器设备的存储器系统 |
CN107068176B (zh) * | 2015-12-30 | 2021-12-14 | 三星电子株式会社 | 半导体存储器设备及包括半导体存储器设备的存储器系统 |
Also Published As
Publication number | Publication date |
---|---|
CN1187759C (zh) | 2005-02-02 |
JP3277860B2 (ja) | 2002-04-22 |
TW411469B (en) | 2000-11-11 |
KR19990030288A (ko) | 1999-04-26 |
JPH11110979A (ja) | 1999-04-23 |
US6154385A (en) | 2000-11-28 |
KR100328374B1 (ko) | 2002-09-04 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C06 | Publication | ||
PB01 | Publication | ||
ASS | Succession or assignment of patent right |
Owner name: NEC ELECTRONICS TAIWAN LTD. Free format text: FORMER OWNER: NONE Effective date: 20030425 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20030425 Address after: Tokyo, Japan Applicant after: NEC Corp. Co-applicant after: NEC Corp. Address before: Tokyo, Japan Applicant before: NEC Corp. |
|
ASS | Succession or assignment of patent right |
Owner name: ERBIDA MEMORY CO., LTD. Free format text: FORMER OWNER: NIPPON ELECTRIC CO., LTD. Free format text: FORMER OWNER: NEC ELECTRONICS TAIWAN LTD. Effective date: 20040723 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20040723 Address after: Tokyo, Japan Applicant after: Elpida Memory Inc. Address before: Tokyo, Japan Applicant before: NEC Corp. Co-applicant before: NEC Corp. |
|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: PS4 LASCO CO., LTD. Free format text: FORMER OWNER: ELPIDA MEMORY INC. Effective date: 20130826 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20130826 Address after: Luxemburg Luxemburg Patentee after: PS4 Russport Co.,Ltd. Address before: Tokyo, Japan Patentee before: Elpida Memory Inc. |
|
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20050202 Termination date: 20140930 |
|
EXPY | Termination of patent right or utility model |