CN121002620A - 半导体芯片的清洗方法及半导体装置的制造方法 - Google Patents

半导体芯片的清洗方法及半导体装置的制造方法

Info

Publication number
CN121002620A
CN121002620A CN202480027940.1A CN202480027940A CN121002620A CN 121002620 A CN121002620 A CN 121002620A CN 202480027940 A CN202480027940 A CN 202480027940A CN 121002620 A CN121002620 A CN 121002620A
Authority
CN
China
Prior art keywords
semiconductor
circuit layer
cleaning
semiconductor chip
dicing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202480027940.1A
Other languages
English (en)
Chinese (zh)
Inventor
出口央视
牧野龙也
甲斐诚二
白坂敏明
诸崎友人
青柳元
佐佐木一博
木下健宏
直田耕治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Resonac Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Resonac Corp filed Critical Resonac Corp
Publication of CN121002620A publication Critical patent/CN121002620A/zh
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/30—Cleaning after the substrates have been singulated
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00—Cutting or separating of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7402—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7416—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting

Landscapes

  • Cleaning Or Drying Semiconductors (AREA)
  • Dicing (AREA)
CN202480027940.1A 2023-05-01 2024-04-25 半导体芯片的清洗方法及半导体装置的制造方法 Pending CN121002620A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2023-075732 2023-05-01
JP2023075732 2023-05-01
PCT/JP2024/016316 WO2024228364A1 (ja) 2023-05-01 2024-04-25 半導体チップの洗浄方法及び半導体装置の製造方法

Publications (1)

Publication Number Publication Date
CN121002620A true CN121002620A (zh) 2025-11-21

Family

ID=93333002

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202480027940.1A Pending CN121002620A (zh) 2023-05-01 2024-04-25 半导体芯片的清洗方法及半导体装置的制造方法

Country Status (5)

Country Link
JP (3) JP7794362B2 (https=)
KR (1) KR20260002717A (https=)
CN (1) CN121002620A (https=)
TW (1) TW202445727A (https=)
WO (1) WO2024228364A1 (https=)

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001197431A (ja) 2000-11-02 2001-07-19 Sony Corp 情報処理装置および情報処理方法、並びにプログラム格納媒体
JP2010093273A (ja) 2009-11-13 2010-04-22 Casio Computer Co Ltd 半導体装置の製造方法
JP5830250B2 (ja) 2011-02-15 2015-12-09 日東電工株式会社 半導体装置の製造方法
JP6390034B2 (ja) 2014-08-01 2018-09-19 リンテック株式会社 粘着シート
JP2016039186A (ja) 2014-08-05 2016-03-22 株式会社ディスコ ウエーハの加工方法
JP6899252B2 (ja) 2017-05-10 2021-07-07 株式会社ディスコ 加工方法
JP6961387B2 (ja) * 2017-05-19 2021-11-05 日東電工株式会社 ダイシングダイボンドフィルム
JP6519759B2 (ja) 2017-05-26 2019-05-29 パナソニックＩｐマネジメント株式会社 素子チップの製造方法
JP2020188154A (ja) 2019-05-15 2020-11-19 パナソニックＩｐマネジメント株式会社 樹脂組成物、樹脂被覆基板および素子チップの製造方法
CN111739854B (zh) 2020-07-06 2022-03-29 绍兴同芯成集成电路有限公司 一种开窗孔双面电镀厚铜膜
JP2022096079A (ja) 2020-12-17 2022-06-29 パナソニックＩｐマネジメント株式会社 素子チップの製造方法
KR20240005909A (ko) 2021-05-28 2024-01-12 미쓰이 가가쿠 토세로 가부시키가이샤 백그라인드용 점착성 필름 및 전자 장치의 제조 방법
JP7488231B2 (ja) 2021-09-16 2024-05-21 古河電気工業株式会社 半導体加工用テープ、及び半導体チップの製造方法

Also Published As

Publication number Publication date
JP2026066333A (ja) 2026-04-16
JP7819808B2 (ja) 2026-02-25
JP2026009401A (ja) 2026-01-19
WO2024228364A1 (ja) 2024-11-07
KR20260002717A (ko) 2026-01-06
JPWO2024228364A1 (https=) 2024-11-07
JP7794362B2 (ja) 2026-01-06
TW202445727A (zh) 2024-11-16

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