CN1208502A - 高功率微波混合集成电路 - Google Patents
高功率微波混合集成电路 Download PDFInfo
- Publication number
- CN1208502A CN1208502A CN96199885A CN96199885A CN1208502A CN 1208502 A CN1208502 A CN 1208502A CN 96199885 A CN96199885 A CN 96199885A CN 96199885 A CN96199885 A CN 96199885A CN 1208502 A CN1208502 A CN 1208502A
- Authority
- CN
- China
- Prior art keywords
- metal
- crown cap
- semiconductor device
- area
- dielectric substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
Claims (4)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNB961998857A CN1139125C (zh) | 1996-12-04 | 1996-12-04 | 高功率微波混合集成电路 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNB961998857A CN1139125C (zh) | 1996-12-04 | 1996-12-04 | 高功率微波混合集成电路 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1208502A true CN1208502A (zh) | 1999-02-17 |
CN1139125C CN1139125C (zh) | 2004-02-18 |
Family
ID=5129575
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB961998857A Expired - Fee Related CN1139125C (zh) | 1996-12-04 | 1996-12-04 | 高功率微波混合集成电路 |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN1139125C (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100536122C (zh) * | 2001-02-06 | 2009-09-02 | 株式会社日立制作所 | 混合集成电路器件及其制造方法和电子装置 |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107787128A (zh) * | 2016-08-24 | 2018-03-09 | 深南电路股份有限公司 | 一种pcb加工方法 |
-
1996
- 1996-12-04 CN CNB961998857A patent/CN1139125C/zh not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100536122C (zh) * | 2001-02-06 | 2009-09-02 | 株式会社日立制作所 | 混合集成电路器件及其制造方法和电子装置 |
Also Published As
Publication number | Publication date |
---|---|
CN1139125C (zh) | 2004-02-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CI01 | Correction of invention patent gazette |
Correction item: International date of application, international application number, international date of entry Correct: 1996.12.04 PCT/RU1996/00336 1998.08.04 Number: 7 Page: 440 Volume: 20 |
|
CI03 | Correction of invention patent |
Correction item: International date of application, international application number, international date of entry Correct: 1996.12.04 PCT/RU1996/00336 1998.08.04 Number: 7 Page: The title page Volume: 20 |
|
COR | Change of bibliographic data |
Free format text: CORRECT: INTERNATIONAL APPLICATION DATE INTERNATIONAL APPLICATION NO. ENTERING DATE OF INTERNATIONAL PUBLICATION TO: 1996.12.4 PCT/RU1996/00336 1998.8.4 |
|
ERR | Gazette correction |
Free format text: CORRECT: INTERNATIONAL APPLICATION DATE INTERNATIONAL APPLICATION NO. ENTERING DATE OF INTERNATIONAL PUBLICATION; 1996.12.4 PCT/RU1996/00336 1998.8.4 |
|
C19 | Lapse of patent right due to non-payment of the annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |