CN118251724A - 存储器电路 - Google Patents

存储器电路 Download PDF

Info

Publication number
CN118251724A
CN118251724A CN202180104266.9A CN202180104266A CN118251724A CN 118251724 A CN118251724 A CN 118251724A CN 202180104266 A CN202180104266 A CN 202180104266A CN 118251724 A CN118251724 A CN 118251724A
Authority
CN
China
Prior art keywords
memory
signal
control unit
memory group
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202180104266.9A
Other languages
English (en)
Chinese (zh)
Inventor
大塚龙志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Socionext Inc
Original Assignee
Socionext Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Socionext Inc filed Critical Socionext Inc
Publication of CN118251724A publication Critical patent/CN118251724A/zh
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0683Plurality of storage devices
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0625Power saving in storage systems
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659Command handling arrangements, e.g. command buffers, queues, command scheduling
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
CN202180104266.9A 2021-11-19 2021-11-19 存储器电路 Pending CN118251724A (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2021/042634 WO2023089778A1 (ja) 2021-11-19 2021-11-19 メモリ回路

Publications (1)

Publication Number Publication Date
CN118251724A true CN118251724A (zh) 2024-06-25

Family

ID=86396469

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202180104266.9A Pending CN118251724A (zh) 2021-11-19 2021-11-19 存储器电路

Country Status (4)

Country Link
US (1) US20240295973A1 (https=)
JP (1) JP7845375B2 (https=)
CN (1) CN118251724A (https=)
WO (1) WO2023089778A1 (https=)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006065697A (ja) * 2004-08-27 2006-03-09 Hitachi Ltd 記憶デバイス制御装置
WO2008022454A1 (en) * 2006-08-22 2008-02-28 Mosaid Technologies Incorporated Scalable memory system
US8407395B2 (en) * 2006-08-22 2013-03-26 Mosaid Technologies Incorporated Scalable memory system
US7554855B2 (en) * 2006-12-20 2009-06-30 Mosaid Technologies Incorporated Hybrid solid-state memory system having volatile and non-volatile memory
KR20110081958A (ko) * 2008-09-30 2011-07-15 모사이드 테크놀로지스 인코퍼레이티드 출력 지연 조정을 가진 직렬 연결 메모리 시스템
US10764455B2 (en) * 2018-12-31 2020-09-01 Kyocera Document Solutions Inc. Memory control method, memory control apparatus, and image forming method that uses memory control method

Also Published As

Publication number Publication date
JP7845375B2 (ja) 2026-04-14
US20240295973A1 (en) 2024-09-05
JPWO2023089778A1 (https=) 2023-05-25
WO2023089778A1 (ja) 2023-05-25

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