CN117836937A - 在封装衬底中的金属结构中具有空隙限定区段以减小管芯-衬底机械应力的半导体管芯模块封装件及相关方法 - Google Patents

在封装衬底中的金属结构中具有空隙限定区段以减小管芯-衬底机械应力的半导体管芯模块封装件及相关方法 Download PDF

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Publication number
CN117836937A
CN117836937A CN202280056728.9A CN202280056728A CN117836937A CN 117836937 A CN117836937 A CN 117836937A CN 202280056728 A CN202280056728 A CN 202280056728A CN 117836937 A CN117836937 A CN 117836937A
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CN
China
Prior art keywords
metal
void
die
voids
metal structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202280056728.9A
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English (en)
Chinese (zh)
Inventor
A·德特勒夫森
J·比伦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of CN117836937A publication Critical patent/CN117836937A/zh
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/25—Arrangements for cooling characterised by their materials
    • H10W40/255—Arrangements for cooling characterised by their materials having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/01—Manufacture or treatment
    • H10W40/03—Manufacture or treatment of arrangements for cooling
    • H10W40/037—Assembling together parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/121—Arrangements for protection of devices protecting against mechanical damage
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/461—Leadframes specially adapted for cooling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/66—Conductive materials thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Structure Of Printed Boards (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Ceramic Engineering (AREA)
CN202280056728.9A 2021-09-09 2022-07-01 在封装衬底中的金属结构中具有空隙限定区段以减小管芯-衬底机械应力的半导体管芯模块封装件及相关方法 Pending CN117836937A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US17/470,961 US20230076844A1 (en) 2021-09-09 2021-09-09 Semiconductor die module packages with void-defined sections in a metal structure(s) in a package substrate to reduce die-substrate mechanical stress, and related methods
US17/470,961 2021-09-09
PCT/US2022/073351 WO2023039312A1 (en) 2021-09-09 2022-07-01 Semiconductor die module packages with void-defined sections in a metal structure(s) in a package substrate to reduce die-substrate mechanical stress, and related methods

Publications (1)

Publication Number Publication Date
CN117836937A true CN117836937A (zh) 2024-04-05

Family

ID=83050029

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202280056728.9A Pending CN117836937A (zh) 2021-09-09 2022-07-01 在封装衬底中的金属结构中具有空隙限定区段以减小管芯-衬底机械应力的半导体管芯模块封装件及相关方法

Country Status (7)

Country Link
US (1) US20230076844A1 (https=)
EP (1) EP4399744A1 (https=)
JP (1) JP2024533137A (https=)
KR (1) KR20240057407A (https=)
CN (1) CN117836937A (https=)
TW (1) TW202312416A (https=)
WO (1) WO2023039312A1 (https=)

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6175158B1 (en) * 1998-09-08 2001-01-16 Lucent Technologies Inc. Interposer for recessed flip-chip package
JP2003168848A (ja) * 2001-11-30 2003-06-13 Nec Kansai Ltd 配線基板
JP2009500830A (ja) * 2005-06-30 2009-01-08 サンディスク コーポレイション 封止された集積回路パッケージにおける歪みを減らす方法
US20100263914A1 (en) * 2009-04-16 2010-10-21 Qualcomm Incorporated Floating Metal Elements in a Package Substrate
US9659884B2 (en) * 2015-08-14 2017-05-23 Powertech Technology Inc. Carrier substrate
US9978699B1 (en) * 2017-04-07 2018-05-22 Dr Technology Consulting Company, Ltd. Three-dimensional complementary-conducting-strip structure
JP7357436B2 (ja) * 2017-04-10 2023-10-06 日東電工株式会社 撮像素子実装基板、その製造方法、および、実装基板集合体
JP7407498B2 (ja) * 2017-09-15 2024-01-04 日東電工株式会社 配線回路基板およびその製造方法

Also Published As

Publication number Publication date
WO2023039312A1 (en) 2023-03-16
JP2024533137A (ja) 2024-09-12
EP4399744A1 (en) 2024-07-17
KR20240057407A (ko) 2024-05-02
US20230076844A1 (en) 2023-03-09
TW202312416A (zh) 2023-03-16

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