CN117812827A - Printed circuit board and preparation method thereof - Google Patents

Abstract

The application discloses a printed circuit board and a preparation method thereof, wherein the preparation method of the printed circuit board comprises the following steps: obtaining a layer-added plate with a conductive layer formed on one side, and preparing a conductive boss at a first preset position of the conductive layer; placing one side of the build-up plate with the conductive boss towards the processing plate, and pressing the build-up plate and the processing plate; and etching the conductive layer based on the first preset position to form a target conductive circuit so as to obtain the printed circuit board. By means of the mode, the control of the internal resistance of the conductive line and the high-density wiring of the conductive line can be considered.

Description

Printed circuit board and preparation method thereof

Technical Field

The application is applied to the technical field of printed circuit boards, in particular to a printed circuit board and a preparation method thereof.

Background

PCB (Printed Circuit Board), also called a printed wiring board or a printed circuit board, is an important electronic component widely used, and is a support for electronic components, and is also a carrier for electrical connection of electronic components.

There are various types of lines in a printed circuit board, including signal lines, power lines, etc., wherein specific lines such as power lines are required to reduce internal resistance and prevent overheat overload.

In a printed circuit board, when a conductive line has a definite internal resistance control requirement, the internal resistance of the conductive line is reduced by thickening the copper of the whole surface of the conductive line, thereby increasing the sectional area of the conductor.

However, the surface copper of the method is thickened, so that the method is not suitable for a high-density wiring scene, meanwhile, the manufacturing difficulty of a solder resist ink layer is increased, and the risk of oil dropping is caused.

Disclosure of Invention

The application provides a printed circuit board and a preparation method thereof, which are used for solving the problem that the control internal resistance of a conductive line and high-density wiring cannot be considered.

In order to solve the technical problems, the application provides a preparation method of a printed circuit board, which comprises the following steps: obtaining a layer-added plate with a conductive layer formed on one side, and preparing a conductive boss at a first preset position of the conductive layer; placing one side of the build-up plate with the conductive boss towards the processing plate, and pressing the build-up plate and the processing plate; and etching the conductive layer based on the first preset position to form a target conductive circuit so as to obtain the printed circuit board.

The lamination plate comprises a conductive layer and a base layer which are arranged in a laminating way; placing the side, on which the conductive boss is formed, of the lamination plate towards the processing plate, and pressing the lamination plate and the processing plate together comprises the following steps: placing the dielectric layer on one side of the processing plate, and placing one side of the build-up plate, on which the conductive boss is formed, towards the processing plate, and placing the dielectric layer on one side of the dielectric layer, which is far away from the processing plate, so as to press the dielectric layer; and removing the base layer to expose the conductive layer.

Wherein the laminate sheet member comprises a single-sided copper-clad plate; the step of removing the base layer to expose the conductive layer comprises: removing the base layer in a physical brushing mode to expose the conductive layer; or the conducting layer and the base layer of the layer-added plate are adhered and fixed through the bonding layer; the step of removing the base layer to expose the conductive layer comprises: and tearing off the adhesive layer to remove the base layer so as to expose the conductive layer.

Wherein the build-up plate is a metal substrate.

The step of etching the conductive layer based on the first preset position to form a target conductive line to obtain the printed circuit board comprises the following steps: and thickening the conductive layer, and etching the conductive layer based on the first preset position to form a target conductive circuit so as to obtain the printed circuit board.

The step of thickening the conductive layer and etching the conductive layer based on the first preset position to form a target conductive line to obtain the printed circuit board comprises the following steps: drilling a second preset position of the conducting layer until a plurality of blind holes of the exposed processing plate are obtained; electroplating and thickening the conductive layer until the electroplating layer fills up the blind holes and extends to the surface of the conductive layer so as to form conductive blind holes and thicken the conductive layer respectively; etching the thickened conductive layer, and avoiding the first preset position until a target conductive circuit is formed, so as to obtain the printed circuit board.

Wherein the first preset position and the second preset position at least partially overlap.

The step of obtaining the conductive boss prepared at the first preset position of the conductive layer comprises the following steps: electroplating the first preset position of the conductive layer to form a conductive boss; or etching the conductive layer, and reserving the conductive layer at the first preset position to form a conductive boss so as to obtain a build-up plate; wherein the depth of the etching process is less than the depth of the conductive layer.

The step of etching the conductive layer to form a target conductive line to obtain the printed circuit board further comprises the following steps: etching the conductive layer to form a target conductive circuit, and obtaining a processed plate after adding the layer; taking the processed plate after the lamination as a new processed plate, circularly executing the steps of placing one side of the lamination plate, which is provided with the conductive boss, towards the processed plate, and pressing the lamination plate and the processed plate; and etching the conductive layer based on the first preset position to form a target conductive circuit until the printed circuit board is obtained.

In order to solve the technical problem, the application also provides a printed circuit board, which is prepared by the preparation method of any one of the printed circuit boards, and comprises the following steps: a plurality of layers of conductive lines and a plurality of layers of dielectric layers which are alternately laminated and bonded in sequence; the first preset position of the target side of at least part of the conductive circuits is provided with a conductive boss, and the target side is the side of the conductive circuits facing the inner side direction of the printed circuit board.

In order to solve the technical problems, the preparation method of the printed circuit board of the application prepares the conductive boss at a first preset position of the conductive layer of the build-up plate; placing one side of the build-up plate with the conductive boss towards the processing plate, and pressing the build-up plate and the processing plate; and etching the conductive layer based on the first preset position to form a target conductive circuit so as to obtain the printed circuit board, thereby increasing the sectional area of the corresponding position through the arrangement of the conductive boss, reducing the internal resistance of the conductive layer and realizing the internal resistance control. Because be formed with the one side of electrically conductive boss towards processing plate, can make electrically conductive boss by the pressfitting in the inside of whole plate, and whole plate's surface is still level to utilize the conductive layer guarantee of level surface to hinder the preparation of welding printing ink, reduce the oil risk. And through the directional thickening of the conductive layer of accurate control first preset position, can reduce the preparation of the conductive line that influences the conductive layer, ensure the scene of high-density wiring.

Drawings

Fig. 1 is a schematic flow chart of an embodiment of a method for manufacturing a printed circuit board provided in the present application;

fig. 2 is a schematic flow chart of another embodiment of a method for manufacturing a printed circuit board provided in the present application;

FIG. 3 is a schematic structural diagram of the preparation flow of the embodiment of FIG. 2;

fig. 4 is a schematic structural diagram of an embodiment of a printed circuit board provided in the present application.

Detailed Description

The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.

It should be noted that, in the embodiment of the present application, directional indications (such as up, down, left, right, front, and rear … …) are referred to, and the directional indications are merely used to explain the relative positional relationship, movement conditions, and the like between the components in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indications are correspondingly changed.

In addition, if there is a description of "first", "second", etc. in the embodiments of the present application, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions of the embodiments may be combined with each other, but it is necessary to base that the technical solutions can be realized by those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should be regarded as not exist and not within the protection scope of the present application.

Referring to fig. 1, fig. 1 is a schematic flow chart of an embodiment of a method for manufacturing a printed circuit board according to the present application.

Step S11: and obtaining a layer-added plate with a conductive layer formed on one side, and preparing a conductive boss at a first preset position of the conductive layer.

In a specific application scenario, the build-up plate may be a metal substrate, i.e. a monolithic metal plate, and the entire metal substrate is a conductive layer. The metal substrate may include, but is not limited to, a metal substrate such as a copper substrate, an aluminum substrate, a silver substrate, or an alloy substrate.

In a specific application scenario, the build-up plate may include a conductive layer and a dielectric layer that are laminated, such as a copper-clad plate (Copper Clad Laminate) or a flexible copper-clad plate, specifically for example: single-sided copper-clad laminate, single-sided flexible copper-clad laminate, double-sided copper-clad laminate, and the like. The conductive layer in this embodiment refers to a whole conductive layer formed of a conductive material having the same size as the dielectric layer, and the conductive circuit refers to a conductive circuit formed by patterning the conductive layer.

And preparing a conductive boss at a first preset position of the conductive layer. Specifically, when the conductive layer is thicker, the conductive layers except the first preset position can be thinned in an etching mode or a mechanical depth control mode, so that the conductive layer at the first preset position is protruded to obtain a conductive boss; when the conductive layer is thinner, the conductive boss can be prepared at the first preset position in a plating thickening mode.

The first preset position is a position on the conductive layer where the internal resistance needs to be reduced, specifically can be determined based on actual requirements, and can be a part of the conductive layer or an integral part of the conductive layer.

The length and width of the conductive boss and the thickness thereof can be determined based on the internal resistance control requirements of the corresponding conductive layer.

Step S12: and placing one side of the lamination plate, on which the conductive boss is formed, towards the processing plate, and pressing the lamination plate and the processing plate.

The plate is processed into a plate which needs to be added with a conductive layer with a conductive boss, and the plate can comprise a single-layer circuit board or a multi-layer circuit board, in particular an initial core board prepared from a double-sided copper-clad plate, and also can comprise a plate which needs to be added after being added.

In a specific application scenario, a build-up board may be laminated to one side of the processed board to build up a layer. In another specific application scenario, the two lamination plates can be respectively laminated with two opposite sides between the processing plates, so as to perform lamination.

After lamination, the cross-sectional area of the conductive layer with the conductive boss is increased at the position of the conductive boss, so that the internal resistance of the conductive layer can be reduced based on the principle that R (resistance) =ρ (conductor resistivity) =l (conductor length)/S (conductor cross-sectional area), and the internal resistance control is realized. Because be formed with the one side of electrically conductive boss towards processing plate, can make electrically conductive boss by the pressfitting in the inside of whole plate, and whole plate's surface is still level to utilize the conductive layer guarantee of level surface to hinder the preparation of welding printing ink, reduce the oil risk. And through the directional thickening of conducting layer of accurate control first preset position, can reduce the influence to the preparation of the conductive line of conducting layer, ensure the scene of high-density wiring.

Step S13: and etching the conductive layer based on the first preset position to form a target conductive circuit so as to obtain the printed circuit board.

In a specific application scenario, when the build-up plate is a metal substrate, a dry film is directly adhered to the whole plate on the conductive layer on the pressed plate, the dry film is exposed and developed based on a first preset position and the preparation requirement of the conductive circuit, and finally etching treatment is performed to avoid the first preset position, ensure the internal resistance control requirement of the conductive circuit, and prepare the conductive layer into a target conductive circuit.

In another specific application scenario, when the lamination plate piece comprises a conductive layer and a dielectric layer which are arranged in a laminating way, the dielectric layer is firstly removed, then the conductive layer is subjected to electroplating thickening so as to meet the thickness requirement of a conductive circuit, after thickening, a dry film is pasted on the conductive layer, the dry film is exposed and developed based on a first preset position and the preparation requirement of the conductive circuit, and finally etching treatment is performed so as to avoid the first preset position, ensure the internal resistance control requirement of the conductive circuit, and prepare the conductive layer into a target conductive circuit.

Through the steps, the conductive boss is prepared at the first preset position of the conductive layer of the build-up plate; placing one side of the build-up plate with the conductive boss towards the processing plate, and pressing the build-up plate and the processing plate; and etching the conductive layer based on the first preset position to form a target conductive circuit so as to obtain the printed circuit board, thereby increasing the sectional area of the corresponding position through the arrangement of the conductive boss, reducing the internal resistance of the conductive layer and realizing the internal resistance control. Because be formed with the one side of electrically conductive boss towards processing plate, can make electrically conductive boss by the pressfitting in the inside of whole plate, and whole plate's surface is still level to utilize the conductive layer guarantee of level surface to hinder the preparation of welding printing ink, reduce the oil risk. And through the directional thickening of the conductive layer of accurate control first preset position, can reduce the preparation of the conductive line that influences the conductive layer, ensure the scene of high-density wiring, and then compromise the control of conductive line internal resistance and the high-density wiring of conductive line.

Referring to fig. 2-3, fig. 2 is a schematic flow chart of another embodiment of a method for manufacturing a printed circuit board according to the present application. Fig. 3 is a schematic structural diagram of the preparation flow of the embodiment of fig. 2.

Step S21: and obtaining a layer-added plate with a conductive layer formed on one side, and preparing a conductive boss at a first preset position of the conductive layer.

In a specific application scenario, the build-up plate may include a metal substrate, i.e. a monolithic metal plate, and the entire metal substrate is the conductive layer. The metal substrate may include, but is not limited to, a metal substrate such as a copper substrate, an aluminum substrate, a silver substrate, or an alloy substrate.

In a specific application scenario, the build-up plate may include a conductive layer and a base layer that are laminated, for example: a single-sided copper-clad plate or a double-sided copper-clad plate, etc. The conductive layer in this embodiment refers to a whole conductive layer made of conductive material with the same size as the dielectric layer, and the conductive circuit refers to a conductive circuit formed after the conductive layer is patterned.

In a specific application scenario, the conductive layer and the base layer of the build-up plate can be attached and fixed through the bonding layer. Wherein the adhesive layer is a middle-low viscosity and strippable adhesive layer.

And preparing a conductive boss at a first preset position of the conductive layer.

In a specific application scenario, electroplating treatment can be performed on a first preset position of the conductive layer to form a conductive boss; specifically, a dry film is firstly stuck on the surface of a conductive layer, then the dry film is exposed and developed based on a first preset position to expose the conductive layer at the first preset position, then the conductive layer is subjected to electroplating treatment until the conductive layer is electroplated and thickened at the first preset position to form a conductive boss, finally the residual dry film is removed, the partial thickening of the conductive layer is completed, the preparation of the conductive boss is realized, and the preparation mode of the conductive boss can be applied to an application scene of thinner conductive layer of a build-up plate.

In a specific application scenario, the conductive layer may be etched, and the conductive layer at the first preset position is reserved to form a conductive boss, so as to obtain a build-up plate; specifically, a dry film is firstly stuck on the surface of the conductive layer, then exposure and development are carried out on the dry film based on a first preset position, so that the dry film corresponding to the first preset position is reserved, the dry films at other positions are exposed, then etching treatment is carried out on the conductive layer, so that the conductive layer at other positions is removed, the conductive layer at the first preset position is protruded, finally, the residual dry film is removed, the partial thinning of the conductive layer is completed, and the preparation of the conductive boss is realized. The depth of etching treatment is smaller than that of the conductive layer, so that the conductive layer at other positions is remained, the conductive layer can be conveniently used as a priming layer in the electroplating thickening step after the subsequent lamination, and the electroplating efficiency is improved. The preparation mode of the conductive boss can be applied to application scenes with thicker conductive layers of the build-up plate.

The first preset position is a position on the conductive layer where the internal resistance needs to be reduced, and can be specifically determined based on actual requirements.

The length, width and thickness of the conductive boss can be determined based on the internal resistance control requirement of the corresponding conductive layer so as to realize accurate control of the internal resistance.

Referring to fig. 3a, the present schematic diagram illustrates a laminate assembly including a conductive layer and a base layer.

The first laminate board 10 includes a first base layer 101, an adhesive layer 104, and a first conductive layer 102 that are laminated and bonded in this order, and a first conductive boss 103 is formed on a first preset position (not labeled in the figure) on a side of the first conductive layer 102 away from the first base layer 101. Wherein the number and position of the first conductive bosses 103 may be set based on the actual internal resistance reduction requirement.

Referring to fig. 3b, the present schematic diagram illustrates a single-sided copper clad laminate as a laminate sheet.

The second laminate panel 11 includes a second base layer 111 and a second conductive layer 112 that are laminated, and a second conductive boss 113 is formed on a first preset position (not labeled in the figure) on a side of the second conductive layer 112 away from the second base layer 111. Wherein the number and positions of the second conductive bosses 113 may be set based on the actual internal resistance reduction requirement.

Step S22: and placing the dielectric layer on one side of the processing plate, and pressing the side, on which the conductive boss is formed, of the build-up plate towards the processing plate, and on one side, far away from the processing plate, of the dielectric layer.

Referring to fig. 3c, in fig. 3c, two dielectric layers 12 are respectively disposed on opposite sides of the processed plate 13, and a side of the first laminated plate 10 with the first conductive boss 103 is disposed towards the processed plate 13, and a side of the corresponding dielectric layer 12 away from the processed plate 13, and a side of the second laminated plate 11 with the second conductive boss 113 is disposed towards the processed plate 13, and a side of the corresponding dielectric layer 12 away from the processed plate 13, so as to obtain a laminated plate 14 after lamination.

The dielectric layer 12 includes one or more of prepregs, epoxies, polyester resins (PET), polyimides, polycarbonates (PC), bismaleimide triazines (Bismaleimide Triazine, BT), ceramic based, and like insulating materials.

The processed board 13 of the present embodiment includes a first conductive circuit 131, a central base layer 132, and a second conductive circuit 133 that are laminated and bonded in sequence. The processed plate 13 of this embodiment may be manufactured by etching a double-sided copper-clad plate. In other embodiments, the processed plate may be a laminated plate or any other plate requiring lamination.

In this embodiment, the first build-up plate 10 and the second build-up plate 11 are respectively laminated on two opposite sides of the processed plate 13 for illustration, in other embodiments, the processed plate 13 may be build-up on only one side, or when build-up is performed on two opposite sides, the first build-up plate 10 or the second build-up plate 11 may be used, or build-up plates formed by metal substrates may be used, or the build-up plates may be used in a mixed manner, which is not limited herein.

Step S23: and removing the base layer to expose the conductive layer.

Referring to fig. 3d, fig. 3d is a view of fig. 3c, in which the first base layer 101 and the second base layer 111 are removed. Specifically, since the first conductive layer 102 of the first laminate board 10 and the first base layer 101 are adhered and fixed by the adhesive layer 104, the first base layer 101 may be removed by tearing off the adhesive layer 104 to expose the first conductive layer 102.

And because the second build-up plate 11 is made of copper-clad plate, the second base layer 111 can be removed by means of physical brushing to expose the second conductive layer 112. The physical brushing board may include, but is not limited to, ceramic brushing board, spade brushing board, non-woven fabric, etc.

In other embodiments, when the build-up plate is a metal substrate, the step of removing the base layer may be omitted, and the subsequent step S24 may be directly performed.

Because during the pressfitting, electrically conductive boss is towards the processing plate pressfitting, consequently, the inside setting of electrically conductive boss after the pressfitting, and the outside surface of conducting layer is still level, and outside still even conducting layer both can satisfy the demand of enlarging the increase sectional area, still can not have the influence to electrically conductive circuit wiring and solder mask step and board thickness to ensure the scene of high-density wiring and reduce the oil risk of falling.

Step S24: and thickening the conductive layer, and etching the conductive layer based on the first preset position to form a target conductive circuit so as to obtain the printed circuit board.

In a specific application scenario, when the build-up conductive layer does not have the requirement for preparing a via hole, the build-up conductive layer may be directly thickened, and the conductive layer may be etched based on the first preset position, so as to form the target conductive line.

In a specific application scenario, when the build-up conductive layer has the preparation requirement of a via hole, drilling a second preset position of the conductive layer until a plurality of blind holes of the exposed processed plate are obtained; electroplating and thickening the conductive layer until the electroplating layer fills up the blind holes and extends to the surface of the conductive layer so as to form conductive blind holes and thicken the conductive layer respectively; etching the thickened conductive layer, and avoiding the first preset position until a target conductive circuit is formed.

Specifically, referring to fig. 3e, fig. 3e is a schematic view of fig. 3d, and the two opposite sides of the processed plate 13 are respectively drilled based on a second preset position (not labeled in the drawing) so as to penetrate the first conductive layer 102 until at least one first blind hole 151 of the first conductive trace 131 of the exposed processed plate 13 is obtained, and penetrate the second conductive layer 112 until at least one second blind hole 152 of the second conductive trace 133 of the exposed processed plate 13 is obtained. The drilling mode can adopt mechanical drilling, laser drilling and the like.

The second preset position is the position on each conductive layer where the conductive holes need to be prepared. The first preset position and the second preset position are at least partially overlapped, so that the sectional area of the conductive layer can be further increased by means of the conductive holes, the internal resistance is further reduced, and the internal resistance of the conductive layer is controlled.

Referring to fig. 3f, in fig. 3f, on the basis of fig. 3e, the first conductive layer 102 and the second conductive layer 112 on opposite sides of the processed plate 13 are subjected to electroplating thickening treatment until the electroplating layers fill up the first blind holes 151 and the second blind holes 152 and extend to the surfaces of the corresponding first conductive layer 102 and the second conductive layer 112, so as to form the first conductive blind holes 153 and the second conductive blind holes 154 respectively, and complete thickening of the first conductive layer 102 and the second conductive layer 112.

The first via 153 communicates with the first conductive trace 131 and the first conductive bump 103 of the first conductive layer 102, and the second via 154 communicates with the second conductive trace 133 and the second conductive bump 113 of the second conductive layer 112.

The first conductive layer 102 may increase its cross-sectional area at the first preset position by means of the first conductive bump 103 alone or in combination by means of the first conductive bump 103 and the first via hole 153, thereby reducing the internal resistance. The second conductive layer 112 may have a cross-sectional area increased at the first predetermined position by the second conductive bump 113 alone or in combination by the second conductive bump 113 and the second via hole 154, thereby reducing the internal resistance.

In the second preset position, the conductive boss is not prepared in advance at the conductive layer corresponding to a certain target position S, and the cross section area is enlarged by directly preparing the conductive blind hole in the step, wherein the target position S is a certain area of the coaxial center position of the corresponding conductive blind hole, D is more than or equal to 65% and less than or equal to D is 95%, and D is the aperture of the corresponding conductive blind hole.

Referring to fig. 3g, fig. 3g is a schematic diagram of fig. 3f, in which the thickened first conductive layer 102 and the second conductive layer 112 are etched, and the first predetermined position is avoided until the first target conductive line 105 and the second target conductive line 115 are formed. The etching treatment specifically includes: film pasting, exposure, development, etching and film removal.

After the target conductive line is formed, the current layer adding is completed. In a specific application scenario, after the layer is added, if the layer adding requirement of the printed circuit board is met, the steps of subsequent solder resist, surface coating, contour milling and the like can be performed, so that the printed circuit board is obtained.

In a specific application scenario, after the layer is added, if the layer adding requirement of the printed circuit board is not met, taking the current plate as a new processed plate, and executing steps S21-S24 in a circulating way until the printed circuit board is prepared.

The directional thickening of the appointed position of the conductive layer can be realized in the layering process through the steps S21-S24, and the scheme can also be used for carrying out similar immersive thickening on all the conductive layers of the printed circuit board based on the requirement.

The scheme can accurately control the copper thickness of the appointed conductor circuit and combine line width dimension control, so that the internal resistance is accurately controlled, and the process can be reused at different layers, so that the reduction of the overall internal resistance of the cross-layer is completed; and because the conductive boss is pressed inwards, the conductive boss belongs to an immersed thickening scheme, and can reduce the influence on the thickness of the printed circuit board while controlling the internal resistance of a conductor circuit.

Through the above-mentioned step, this application obtains electrically conductive boss through the preparation of the first position of predetermineeing of the conducting layer at the layer-increasing plate spare, place the dielectric layer in one side of processing plate spare, and be formed with electrically conductive boss one side towards processing plate spare with the layer-increasing plate spare, and place one side of keeping away from processing plate spare at the dielectric layer, press together, get rid of the basic unit, with exposing the conducting layer, carry out the incrassation to the conducting layer, and carry out etching treatment to the conducting layer based on first position predetermineeing, form the conductive line of target, in order to obtain the printed circuit board, thereby through the setting of electrically conductive boss and/or switch on the blind hole, increase the cross-sectional area of corresponding position, thereby reduce its internal resistance, and thereby combine linewidth size control and realize accurate internal resistance control. Because be formed with the one side of electrically conductive boss towards processing plate, can make electrically conductive boss by the pressfitting in the inside of whole plate, and whole plate's surface is still level to utilize the conductive layer guarantee of level surface to hinder the preparation of welding printing ink, reduce the oil risk. And through the directional thickening of the conductive layer of accurate control first preset position, can reduce the preparation of the conductive line that influences the conductive layer, ensure the scene of high-density wiring.

Referring to fig. 4, fig. 4 is a schematic structural diagram of an embodiment of a printed circuit board provided in the present application.

The printed circuit board 200 includes: a plurality of conductive traces 231 and a plurality of dielectric layers 232 alternately stacked and bonded in this order; wherein, at least a first preset position of a target side (not labeled in the drawing) of the conductive trace 231 is formed with a conductive pad 203, and the target side is a side of the conductive trace 231 facing the inner side direction of the printed circuit board 200.

The present embodiment is described with respect to the printed circuit board 200 including 4 layers of conductive traces 231, but in other embodiments, the printed circuit board 200 may include any other number of conductive traces 231, wherein at least some of the conductive traces 231 may be provided with conductive lands 203 inward.

The printed circuit board 200 is prepared by the method for preparing a printed circuit board according to any of the above embodiments. Therefore, the cross-sectional area of the corresponding position can be increased through the arrangement of the conductive boss, so that the internal resistance of the conductive boss is reduced, and the internal resistance control is realized. Because be formed with the one side of electrically conductive boss towards processing plate, can make electrically conductive boss by the pressfitting in the inside of whole plate, and whole plate's surface is still level to utilize the preparation of the electrically conductive circuit guarantee solder mask printing ink of level surface, reduce the oil risk. And through the directional thickening of the conductive line of accurate control first preset position, can reduce the preparation that influences the conductive line, ensure the scene of high-density wiring.

In other embodiments, the printed circuit board 200 may further be provided with a plurality of blind vias 253, and the blind vias 253 are disposed between each adjacent conductive traces 231, respectively, so as to implement interlayer interconnection.

At least a portion of the conductive via 253 may be connected to the conductive pad 203 of the conductive trace 231, so as to increase the cross-sectional area of the corresponding conductive trace 231 in combination with the conductive pad 203, thereby further reducing the internal resistance thereof.

The foregoing description is only of embodiments of the present application, and is not intended to limit the scope of the patent application, and all equivalent structures or equivalent processes using the descriptions and the contents of the present application or other related technical fields are included in the scope of the patent application.

Claims (10)

1. The preparation method of the printed circuit board is characterized by comprising the following steps of:

obtaining a layer-added plate with a conductive layer formed on one side, and preparing a conductive boss at a first preset position of the conductive layer;

placing one side of the build-up plate, on which the conductive boss is formed, towards a processing plate, and pressing the build-up plate and the processing plate together;

and etching the conductive layer based on the first preset position to form a target conductive circuit so as to obtain the printed circuit board.

2. The method for manufacturing a printed circuit board according to claim 1, wherein the build-up board member includes a conductive layer and a base layer which are laminated;

the step of placing the side, on which the conductive boss is formed, of the build-up plate toward the processing plate, and pressing the build-up plate and the processing plate includes:

placing a dielectric layer on one side of the processing plate, and pressing the side, on which the conductive boss is formed, of the lamination plate towards the processing plate, and placing the dielectric layer on one side, away from the processing plate, of the dielectric layer;

and removing the base layer to expose the conductive layer.

3. The method for manufacturing a printed circuit board according to claim 2, wherein,

the laminate plate comprises a single-sided copper-clad plate; the step of removing the base layer to expose the conductive layer includes:

removing the base layer in a physical brushing mode to expose the conductive layer; or (b)

The conducting layer and the base layer of the layer-added plate are bonded and fixed through the bonding layer; the step of removing the base layer to expose the conductive layer includes:

and tearing off the bonding layer to remove the base layer so as to expose the conductive layer.

4. The method of manufacturing a printed circuit board of claim 1, wherein the build-up board is a metal substrate.

5. The method for manufacturing a printed circuit board according to any one of claims 1 to 4, wherein the step of etching the conductive layer based on the first preset position to form a target conductive line to obtain the printed circuit board comprises:

and thickening the conductive layer, and etching the conductive layer based on the first preset position to form a target conductive circuit so as to obtain the printed circuit board.

6. The method of manufacturing a printed circuit board according to claim 5, wherein the step of performing thickening treatment on the conductive layer and performing etching treatment on the conductive layer based on the first preset position to form a target conductive line to obtain the printed circuit board comprises:

drilling a second preset position of the conducting layer until a plurality of blind holes exposing the processing plate are obtained;

electroplating and thickening the conductive layer until the electroplating layer fills up each blind hole and extends to the surface of the conductive layer so as to form a conductive blind hole and thicken the conductive layer respectively;

and etching the thickened conductive layer, and avoiding the first preset position until a target conductive circuit is formed, so as to obtain the printed circuit board.

7. The method for manufacturing a printed circuit board according to claim 6, wherein,

the first preset position at least partially overlaps the second preset position.

8. The method for manufacturing a printed circuit board according to claim 1, wherein the step of obtaining the conductive bump manufactured at the first preset position of the conductive layer comprises:

electroplating the first preset position of the conductive layer to form the conductive boss; or (b)

Etching the conductive layer, and reserving the conductive layer at a first preset position to form the conductive boss so as to obtain the build-up plate; wherein the depth of the etching process is less than the depth of the conductive layer.

9. The method of manufacturing a printed circuit board of claim 1, wherein the step of etching the conductive layer to form a target conductive trace to obtain the printed circuit board further comprises:

etching the conductive layer to form a target conductive circuit, and obtaining a processed plate after adding the layer;

taking the processed plate after the lamination as a new processed plate, circularly executing the steps of placing one side of the lamination plate, on which the conductive boss is formed, towards the processed plate, and pressing the lamination plate and the processed plate; and etching the conductive layer based on the first preset position to form a target conductive circuit until the printed circuit board is obtained.

10. A printed circuit board prepared by the method of preparing a printed circuit board according to any one of claims 1-9, the printed circuit board comprising: a plurality of layers of conductive lines and a plurality of layers of dielectric layers which are alternately laminated and bonded in sequence;

at least a part of the conductive circuit is formed with a conductive boss at a first preset position on a target side, wherein the target side is a side of the conductive circuit facing the inner side direction of the printed circuit board.