CN114258194A - Circuit board and manufacturing method thereof - Google Patents

Circuit board and manufacturing method thereof Download PDF

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Publication number
CN114258194A
CN114258194A CN202011019031.3A CN202011019031A CN114258194A CN 114258194 A CN114258194 A CN 114258194A CN 202011019031 A CN202011019031 A CN 202011019031A CN 114258194 A CN114258194 A CN 114258194A
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CN
China
Prior art keywords
conductive
hole
layer
board
sub
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Pending
Application number
CN202011019031.3A
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Chinese (zh)
Inventor
郭聪
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Shennan Circuit Co Ltd
Original Assignee
Shennan Circuit Co Ltd
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Publication date
Application filed by Shennan Circuit Co Ltd filed Critical Shennan Circuit Co Ltd
Priority to CN202011019031.3A priority Critical patent/CN114258194A/en
Priority to PCT/CN2020/138644 priority patent/WO2022062218A1/en
Publication of CN114258194A publication Critical patent/CN114258194A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0097Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits

Abstract

The application discloses a circuit board and a manufacturing method thereof. The manufacturing method of the circuit board comprises the following steps: preparing at least two sub-boards, wherein each sub-board is formed by sequentially and alternately laminating at least one layer of substrate and at least two layers of conducting circuit layers, and a first conducting layer is formed on the first side of at least one sub-board; forming a first through hole on the first side of the daughter board and electroplating to form a first conductive hole, wherein the first conductive hole is connected with the first conductive layer, and the first conductive hole electrically connects at least two conductive circuit layers connected with the first conductive hole; two daughter boards are stacked and fixed to form a mother board, wherein the first side of one daughter board is positioned on the side away from the other daughter board; and forming a second through hole on the motherboard, electroplating the second conductive hole to form a second conductive hole, connecting the second conductive hole with the first conductive layer, and electrically connecting at least two designated conductive circuit layers on the motherboard. Through the scheme, the signal transmission loss of the formed circuit board can be reduced.

Description

Circuit board and manufacturing method thereof
Technical Field
The application belongs to the technical field of printed circuit board processing, and particularly relates to a circuit board and a manufacturing method thereof.
Background
In PCB (Printed circuit boards) circuit board production field, to the PCB circuit board of large capacity, usually can set up first electrically conductive hole in the both sides of carrying on the back of the body of same hole site on the PCB circuit, then set up the second electrically conductive hole that needs run through whole circuit board at other hole sites, when the PCB circuit board of current large capacity was made, the conducting layer that first electrically conductive hole and the two difference of second electrically conductive hole are connected can not be at same height usually appear, thereby can lead to the signal transmission loss increase of circuit board, therefore, when guaranteeing PCB circuit board transmission loss, need adopt other high-speed transmission material, thereby can lead to PCB circuit board manufacturing cost to improve.
Disclosure of Invention
The present application provides a circuit board and a method for manufacturing the same to solve the above technical problems.
In order to solve the technical problem, the application adopts a technical scheme that: provided is a method of manufacturing a circuit board, including:
preparing at least two sub-boards, wherein each sub-board is formed by sequentially and alternately laminating at least one layer of substrate and at least two layers of conducting circuit layers, and a first conducting layer is formed on the first side of at least one sub-board;
forming a first through hole on the first side of the daughter board and electroplating to form a first conductive hole, wherein the first conductive hole is connected with the first conductive layer, and at least two conductive circuit layers connected with the first conductive hole are electrically connected through the first conductive hole;
stacking and fixing two daughter boards to form a mother board, wherein the first side of one daughter board is positioned at one side away from the other daughter board;
and forming a second through hole on the motherboard, and electroplating the second conductive hole to form a second conductive hole, wherein the second conductive hole is connected with the first conductive layer to electrically connect at least two designated conductive circuit layers on the motherboard.
In order to solve the technical problem, the application adopts a technical scheme that: providing a circuit board, the circuit board comprising:
the daughter boards are arranged in a stacked mode and each daughter board comprises at least one layer of base board and at least two layers of conducting circuit layers, and the at least one layer of base board and the at least two layers of conducting circuit layers are arranged in a stacked mode in an alternating mode;
the first conducting layer is arranged on the first side of at least one sub-board, and the first side of the sub-board is positioned on the side away from the other sub-board;
the first conductive hole is formed by forming a first through hole on the first side of the daughter board and electroplating, the first conductive hole is connected with the first conductive layer, and the first conductive hole is used for electrically connecting at least two designated conductive circuit layers on the daughter board corresponding to the first conductive hole; and
and the second conductive hole is formed by forming a second through hole on the motherboard and electroplating the second conductive hole, and is connected with the first conductive layer and used for electrically connecting at least two layers of the conductive circuit layers appointed by the two daughter boards.
The beneficial effect of this application is: the technical scheme of this application is through all being connected to first conducting layer with first conducting hole and second conducting hole on, can avoid appearing electromagnetic shield disappearance in the opening position of first conducting hole and second conducting hole, consequently can improve the signal transmission efficiency who forms the circuit board, reduces the signal transmission loss. Furthermore, the manufacturing method of the circuit board is simple in manufacturing process, production time can be shortened, production efficiency is improved, and production cost can be saved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, it is obvious that the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without inventive efforts, wherein:
FIGS. 1 a-1 c are schematic flow charts illustrating an embodiment of a conventional circuit board manufacturing method;
FIG. 2 is a schematic flow chart illustrating an embodiment of a method for manufacturing a circuit board according to the present disclosure;
3 a-3 j are schematic flow charts of another embodiment of a method for manufacturing a circuit board provided by the present application;
fig. 4 is a schematic structural diagram of an embodiment of a circuit board provided in the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that if directional indications (such as up, down, left, right, front, and back … …) are referred to in the embodiments of the present application, the directional indications are only used to explain the relative positional relationship between the components, the movement situation, and the like in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indications are changed accordingly.
In addition, if there is a description of "first", "second", etc. in the embodiments of the present application, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present application.
Please refer to fig. 1 a-1 c. Fig. 1a to 1c are schematic flow charts of an embodiment of a conventional circuit board manufacturing method.
As shown in fig. 1 a-1 b, in this step, at least two sub-boards are required to be prepared, and each sub-board includes at least one layer of substrate 310 and at least two layers of conductive circuit layers 320, and the at least one layer of substrate 310 and the at least two layers of conductive circuit layers 320 may be stacked and arranged alternately.
A through hole may be formed in the sub-board, and then the through hole is plated to form a plated layer in the through hole, so that the first conductive hole 330 may be formed. The first conductive via 330 may be connected to the conductive trace layer 320 on the surface side of the daughter board, and the first conductive via 330 may electrically connect at least two conductive trace layers 320 of the daughter board.
After the first conductive via 330 is formed, the conductive line layer 320 on the surface of the sub-board needs to be patterned, so as to form a conductive line (or pad) 321 connected to the first conductive via 330.
As shown in fig. 1c, after the conductive traces (or pads) 321 connected to the first conductive vias 330 are formed on the daughter boards, the two daughter boards may be stacked and fixed to form a mother board, and then the second conductive vias 360 may be formed on the mother board; correspondingly, the forming manner of the second conductive hole 360 may be the same as the forming manner of the first conductive hole 330, and the difference is that the second conductive hole 360 may sequentially penetrate through the two daughter boards, and the second conductive hole 360 may electrically connect at least two designated conductive circuit layers 320 in the motherboard, for example, the second conductive hole 360 may electrically connect at least one conductive circuit layer 320 on the two daughter boards, so as to implement signal transmission between the two daughter boards.
In this step, when forming the electroplated layer in the second conductive hole 360, it is necessary to perform chemical copper deposition, black hole or black shading treatment on the through hole corresponding to the second conductive hole 360, so as to form a conductive layer on the inner wall of the through hole, where the conductive layer can be used as a seed layer, and then electroplating is performed based on the seed layer, so as to form the electroplated layer of the second conductive hole 360.
When the chemical copper deposition, the black hole or the blackening treatment is performed on the through hole corresponding to the second conductive hole 360, in order to prevent a solution used in the chemical copper deposition, the black hole or the blackening treatment from entering the first conductive hole 330, the first conductive hole 330 is corroded and damaged, and therefore the opening of the first conductive hole 330 needs to be sealed.
Generally, a covering layer 350 may be generally disposed on the opening side of the first conductive hole 330 to seal the opening of the first conductive hole 330. The covering layer 350 may be fixedly attached to the first conductive via 330 through a connection layer 352, so as to encapsulate an opening of the first conductive via 330, where the covering layer 350 may be a metal layer formed by a sheet such as a copper foil; then, a through hole is formed in the motherboard and a second conductive hole 360 is formed by electroplating, at this time, as the covering layer 350 is arranged, and the opening of the second conductive hole 360 is positioned on the side of the covering layer 350 departing from the motherboard, the position of the opening of the second conductive hole 360 is not flush with the position of the opening of the first conductive hole 330, so that when the first conductive hole 330 and the second conductive hole 360 are spliced and matched with and electrically connected with different pins of an element, electromagnetic shielding deficiency easily occurs at the positions of the opening of the first conductive hole 330 and the opening of the second conductive hole 360, and thus the signal transmission loss of the whole circuit board is increased.
It should be noted that if it is required to ensure that the second conductive hole 360 can electrically connect at least one conductive circuit layer 320 on each of the two daughter boards, after the first conductive hole 330 is formed on the daughter board, the at least two daughter boards are stacked to form a mother board, and then the second conductive hole 360 is formed by forming a through hole on the mother board, at this time, the cover layer 350 needs to be covered at the opening position of the first conductive hole 330, so that the first conductive hole 330 and the second conductive hole 360 are located on different layers of the metal layer respectively connected to the openings on one side of the mother board; if a conductive through hole is formed on the daughter board, then the daughter boards are overlapped to form the mother board, and then the conductive through holes on different daughter boards are communicated, so that a second conductive hole 360 is formed, the scheme can enable the first conductive hole 330 and the second conductive hole 360 to be positioned on the same layer of the metal layer connected with the opening on one side of the mother board, but the scheme is difficult to ensure that effective electrical connection is formed between different conductive through holes, and the formed second conductive hole 360 needs to be electroplated, so that the manufacturing process is more complicated, and the production efficiency is reduced.
In order to solve the technical problem, the application provides a manufacturing method of a circuit board. Referring to fig. 2, fig. 2 is a schematic flow chart illustrating a method for manufacturing a circuit board according to an embodiment of the present disclosure.
The manufacturing method of the circuit board specifically comprises the following steps:
s101: preparing at least two sub-boards, wherein each sub-board is formed by sequentially and alternately stacking at least one layer of substrate and at least two layers of conducting circuit layers, and a first conducting layer is formed on the first side of at least one sub-board.
At least two daughter boards need to be prepared in this step. Each daughter board can adopt at least one layer of base plate and at least two layers of conducting circuit layers to be arranged alternately and superposedly in sequence.
Wherein, a first conductive layer is formed on the first side surface of at least one sub-board. The first conductive layer may be provided on the metal layer of the first side surface of the sub-board, and the first conductive layer may cover at least a partial area or all of the area of the first side surface of the sub-board. The first conductive layer may be patterned to form a plurality of conductive traces with a predetermined pattern, and the subsequent processing of the first conductive layer is described in detail later.
It should be noted that the conductive circuit layer in the inner layer of each sub-board may be a conductive circuit layer having a plurality of conductive circuits, which is subjected to patterning.
In this embodiment, the substrate may be made of an insulating material, for example, the substrate may be made of a resin material. The reinforced material is soaked with resin adhesive and is prepared by the processes of drying, cutting, laminating and the like. The conductive trace layer may include, but is not limited to, copper, aluminum, iron, nickel, gold, silver, platinum group, chromium, magnesium, tungsten, molybdenum, lead, tin, indium, zinc, or alloys thereof.
S102: and a first through hole is formed in the first side of the daughter board and is electroplated to form a first conductive hole, the first conductive hole is connected with the first conductive layer, and the first conductive hole electrically connects at least two conductive circuit layers connected with the first conductive hole.
In this step, a first conductive hole may be formed on the first side of the daughter board. Specifically, a first through hole may be formed from a first side (a side having the first conductive layer) of the daughter board, wherein the first through hole penetrates through at least one substrate of the daughter board and at least two conductive circuit layers, and by performing electroplating, a plating layer electrically connected to the first conductive layer may be formed on an inner wall of the first through hole, so that the first conductive hole may be formed.
The first conductive hole is connected with the first conductive layer, and the first conductive layer can electrically connect at least two conductive circuit layers connected with the first conductive layer, for example, the first conductive hole can electrically connect the first conductive layer with a conductive circuit layer on any inner layer in the daughter board, or when the daughter board has more than two conductive circuit layers, the first conductive hole can also electrically connect conductive circuit layers on at least two inner layers in the daughter board.
Specifically, a through hole may be formed in the sub-board, and an electroplated layer may be formed in the through hole by an electroplating process. Forming a first back-drilled hole by removing part of the electroplated layer in the first conductive hole on a second side of the daughter board, which is away from the first side of the daughter board; the first back drilling hole can disconnect the conductive circuit layer connected with the first back drilling hole from the position corresponding to the first back drilling hole, so that the first back drilling hole is formed by back drilling treatment, and the first conductive hole can electrically connect the specified layer or more than one layer of inner layer conductive circuit layer on the daughter board with the first conductive layer on the first side surface of the daughter board.
In this embodiment, the first conductive hole may be drilled at a position corresponding to the first conductive hole on the second side of the daughter board, so as to remove a part of the plating layer in the first conductive hole, thereby forming a first back-drilled hole; wherein the drilling process may remove a portion of the plated layer in the first conductive hole by reaming the through hole, or may remove only a portion of the plated layer in the through hole by the drilling process.
Or in other embodiments, the plating layer in the first conductive hole may be partially removed without drilling. For example, the first back-drilled hole may be formed by removing a portion of the plating layer in the first conductive hole by etching or laser ablation.
S103: and two sub-boards are stacked and fixed to form the mother board, wherein the first side of one sub-board is positioned at the side away from the other sub-board.
After the first conductive holes are formed in the daughter boards, a connection layer can be arranged between the two daughter boards to fixedly stack the two daughter boards to form a mother board.
In this embodiment, the first conductive layers may be disposed on the first sides of the two sub-boards, and the first conductive holes may be formed in the first conductive layers of the two sub-boards. Or the first conductive layer may be provided on only one daughter board, and the first conductive hole may be formed.
When first sides on two daughter boards all are provided with first conducting layer, and all are provided with first electrically conductive hole on the first conducting layer of two daughter boards, the second side that deviates from that respective first side corresponds of two daughter boards can set up face to face for the opening of the first back drilling hole that corresponds on two daughter boards can set up towards each other. Optionally, after the two daughter boards are stacked and fixed, the surfaces of the first sides of the two daughter boards may form two opposite side surfaces of the motherboard respectively; the surfaces of the second sides of the two daughter boards are disposed facing each other and are both connected with the connection layer. At this time, the first conductive holes on the two sub-boards may be coaxially arranged. In one embodiment, the first conductive via apertures on the two sub-boards may be set to be equal in diameter.
When the first conductive layer is arranged on only one daughter board and the first conductive hole is formed, the first conductive layer on the daughter board with the first conductive hole can be arranged on one side departing from the other daughter board.
S104: and forming a second through hole on the motherboard, electroplating the second conductive hole to form a second conductive hole, connecting the second conductive hole with the first conductive layer, and electrically connecting at least two designated conductive circuit layers on the motherboard.
In this step, after the mother board described in the previous step S103 is formed, the mother board may be further processed, so as to form the second conductive hole on the mother board.
Specifically, a second through hole may be formed in the motherboard, and a second conductive hole may be formed by electroplating the second conductive hole, where the second conductive hole is connected to the first conductive layer, so as to electrically connect at least two designated conductive line layers on the motherboard. The forming manner of the second conductive hole may be the same as that of the first conductive hole, and is not described herein.
The second conductive hole can electrically connect at least one conductive circuit layer on one of the sub-boards with at least one conductive circuit layer on the other sub-board. The electroplated layer in the second conductive hole can be connected with the first conductive layer on the surface layer of the motherboard, so that the first conductive layer is electrically connected with the second conductive hole.
After the second conductive holes are prepared, the first conductive layer on the surface layer of the motherboard can be subjected to patterning treatment, so that the first conductive layer on the surface layer of the motherboard can also form a plurality of conductive circuits.
And on the first conductive layer, the thickness of the conductive circuit connected with the first conductive hole and the thickness of the conductive circuit connected with the second conductive hole can be the same.
Therefore, in the embodiment, the first conductive hole and the second conductive hole are connected to the first conductive layer, so that electromagnetic shielding loss at the opening positions of the first conductive hole and the second conductive hole can be avoided, the signal transmission efficiency of the circuit board can be improved, and the signal transmission loss can be reduced.
Further, please refer to fig. 3 a-3 j. Fig. 3a to fig. 3j are schematic flow charts of another embodiment of a method for manufacturing a circuit board provided by the present application.
The manufacturing method of the circuit board specifically comprises the following steps:
1. at least two daughter boards are prepared.
Referring to fig. 3a, in the step, the sub-board 100 may be formed by stacking a plurality of layers of the substrate 110 and a plurality of layers of the conductive traces 120. Wherein a first conductive layer 111 is provided on the first side 101 surface of both sub-boards 100.
In this step, the first conductive layer 111 may be entirely covered on the surface of the first side 101 of the sub-board 100. Specifically, the first conductive layer 111 may be formed by attaching a metal foil (e.g., a copper foil) to the surface of the first side 101 of the sub-board 100.
2. A first conductive via is formed on the daughter board.
Referring to fig. 3 b-3 c, in this step, a hole opening operation may be performed on the daughter board 100 formed in the previous step, so as to form the first conductive via 130 on the daughter board 100.
Specifically, the sub-board 100 may be provided with a first through hole 131, wherein the first through hole 131 may sequentially penetrate through the multi-layer substrate 110 and the multi-layer conductive trace layer 120 of the sub-board 100. Then, by electroplating, the plating layer 132 may be formed on the inner wall of the first through-hole 131, and thus the first conductive hole 130 may be formed. The plating layer 132 of the first conductive via 130 can be connected to the first conductive layer 111 on the surface of the first side 101, so that the conductive via is electrically connected to the first conductive layer 111; further, the plating layer 132 in the first conductive via 130 may be electrically connected to other conductive trace layers 120 of the sub-board 100, so as to electrically connect at least one conductive trace layer 120 connected to the first conductive via 130 to the first conductive layer 111.
Wherein, optionally, the first through hole 131 may be formed by mechanically drilling the sub-board 100; or may be formed by laser drilling or the like.
Referring to fig. 3d, after the formation of the plating layer 132 on the inner wall of the first through hole 131 to form the first conductive hole 130 is completed, the first conductive hole 130 may be subjected to a back drilling process to form a first back-drilled hole 133.
Specifically, the first through hole 131 may be subjected to a hole expanding process at a position corresponding to the first through hole 131 on the surface of the second side 102 of the sub-board 100, so as to remove the plated layer 132 on a part of the hole section in the first through hole 131 to form the first back-drilled hole 133, and the other un-expanded hole sections of the first through hole 131 and the plated layer 132 on the hole sections may electrically connect the at least two designated conductive trace layers 120.
The first back-drilled hole 133 may electrically disconnect the connected multiple conductive trace layers 120 at the position, so that the first back-drilled hole 133 may open such that the one or more conductive trace layers 120 on the sub-board 100 are electrically connected through the first conductive hole 130, and the one or more conductive trace layers 120 may further be electrically connected to the first conductive layer 111 through the first conductive hole 130.
In this manner, the plurality of sub-boards 100 may be processed, and the first conductive holes 130 are formed on the plurality of sub-boards 100.
3. And laminating and fixing the two daughter boards to form the motherboard.
Referring to fig. 3e, in this step, two daughter boards 100 may be stacked to form the motherboard 10.
Specifically, the second sides 102 of the two sub-boards 100 may be disposed toward each other, and the two sub-boards 100 may be fixedly connected by disposing the connection layer 140 between the two sub-boards 100. Among them, in the motherboard 10, the openings of the first back-drilled holes 133 on the second sides 102 of the two sub-boards 100 may be disposed correspondingly, so that the first conductive holes 130 of the two sub-boards 100 are coaxially disposed. In this case, the first side 101 of the daughter board 100 may be located on the opposite sides of the motherboard 10.
In this step, a prepreg may be disposed between the two daughter boards 100, and the connection layer 140 may be formed by performing hot pressing on the two daughter boards 100 and the prepreg.
Optionally, a window may be disposed at an opening position of the prepreg corresponding to the first back-drilled hole 133, so that the two daughter boards 100 may communicate with each other through the corresponding first back-drilled hole 133 and the window on the prepreg.
4. A second conductive via is formed on the motherboard.
Referring to fig. 3 f-3 h, after the mother board 10 is formed as described above, a second conductive hole may be further formed on the mother board 10.
In this step, the protection layer 150 may be covered on the first conductive layer 111 on the two opposite sides of the motherboard 10.
The protective layer 150 may be formed by attaching a protective film to the surface of the motherboard 10, for example, an insulating film such as a PET (polyethylene terephthalate) film, a PI (Polyimide) film, or a PP (polypropylene) film may be attached to the surface of the first conductive layer 111 by adhesive; or a prepreg may be attached to a metal sheet such as a copper foil, the prepreg is attached to the surface of the first conductive layer 111, and then hot pressing is performed to make the prepreg in a molten state, after the molten prepreg is cooled and fixed, the metal sheet may be attached to the first conductive layer 111, and at this time, the metal sheet and the first conductive layer 111 may be separated by the prepreg; alternatively, an insulating adhesive may be disposed on the metal foil to adhere the metal foil to the surface of the first conductive layer 111, thereby forming the protective layer 150.
Alternatively, in another embodiment, the protective layer 150 may be formed by covering the surface of the motherboard with a protective material. For example, an insulating material may be coated on the surface of the first conductive layer 111 to form the protection layer 150; alternatively, a prepreg may be placed on the surface of the first conductive layer 111, and hot-pressing may be performed to form the protective layer 150.
Referring to fig. 3g, after the protective layer 150 is formed, a hole opening process may be performed on the motherboard 10 to form a second via 161 on the motherboard 10; a plating layer 162 may be formed on the inner wall of the second through hole 161 by a plating process, wherein the first conductive layer 111 on the opposite sides of the motherboard 10 and the one or more conductive line layers 120 designated as the inner layer of the motherboard 10 may be electrically connected by the plating layer 162.
Referring further to fig. 3 h-3 i, after the plating layer 162 is formed, the second through hole 161 may be subjected to a hole expanding process from the mother board 10 side to remove a portion of the plating layer 162 in the second through hole 161, so as to form a second back-drilled hole 163, and similarly, the second back-drilled hole 163 may electrically disconnect the first conductive layer 111 and/or the conductive line layer 120 connected thereto at the position of the second back-drilled hole 163; the second via 161 is left with a hole section that is not subjected to the hole expansion process, and the corresponding plating layer 162 on the hole section may form the second conductive hole 160. Thus, by forming the second conductive via 160, the conductive layer 111 on the surface of one side of the motherboard 10 can be electrically connected to the one or more conductive trace layers 120 designated by the inner layer thereof.
5. And patterning the first conductive layer on the surface layer of the motherboard.
Referring to fig. 3j, after the second conductive holes 160 are formed, patterning may be performed on the first conductive layer 111 on the surface layer of the motherboard 10, and the first conductive layer 111 on the surface layer of the motherboard 10 may also form a conductive circuit layer having a plurality of conductive circuits, so that a predetermined functional circuit may be formed on the motherboard 10.
Specifically, the protective layer 150 on the surface layer of the motherboard 10 may be removed first. So that the covered first conductive via 130 and the covered second conductive via 160 are exposed.
Then, the first conductive layer 111 on the surface layer of the motherboard 10 is patterned, so as to form a conductive line layer having a plurality of conductive lines.
Specifically, a light blocking layer formed by a photoresist material may be covered on the conductive surface of the first conductive layer 111, and a predetermined region of the light blocking layer is subjected to light irradiation, so that the light blocking layer corresponding to the region may have a property change; removing the light blocking layer in the region with changed properties to expose the region corresponding to the covered first conductive layer 111; the exposed areas of the first conductive layer 111 are removed by etching or the like, so that a plurality of conductive lines can be formed on the first conductive layer 111.
In this embodiment, the first conductive layers 111 on the two opposite sides of the motherboard 10 may be patterned. When the patterning process is performed on the first conductive layers 111 on the opposite sides of the mother substrate 10, the remaining light blocking layer may be removed, so that a desired circuit board may be obtained.
In this embodiment, the two opposite sides of the motherboard 10 may be provided with the second conductive holes 160 as described above, and the second conductive holes 160 may electrically connect at least one conductive line layer 120 in each of the two daughter boards 100; thereby enabling signal transmission between the two sub-boards 100. Wherein the first conductive via 130 and the second conductive via 160 on the same side of the motherboard 10 can be used for mating with and electrically connecting to different connection portions of the component.
Further, this application still provides a circuit board. Referring to fig. 4, fig. 4 is a schematic structural diagram of an embodiment of a circuit board provided in the present application.
The circuit board 20 may be manufactured using a method of manufacturing a circuit board as shown in fig. 2 or fig. 3a to 3 j. The circuit board 20 may include two sub-boards 200 stacked one on another, and the two sub-boards 200 may be fixedly connected to each other by providing a connection layer 250 and the two sub-boards 200.
Each sub-board 200 includes at least one substrate 210 and at least two conductive trace layers 220, which are sequentially overlapped.
As shown in fig. 4, the circuit board 20 may be formed by stacking and fixing two sub-boards 200, and in other embodiments, the circuit board 20 may also be formed by stacking and fixing three or more sub-boards 200.
The following description will be made by taking an example in which the circuit board 20 is formed by stacking and fixing two daughter boards 200.
In this embodiment, the surface of the first side 201 of at least one sub-board 200 is provided with a first conductive layer 211, wherein, as shown in fig. 4, the two first conductive layers 211 of the two sub-boards 200 are respectively disposed on two opposite sides of the two sub-boards 200. Each daughter board 200 is provided with a first conductive hole 230, and the first conductive holes 230 on the two daughter boards 200 electrically connect at least two designated conductive circuit layers 220 in the corresponding daughter board 200; the first conductive holes 230 of the two sub-boards 200 are connected to the first conductive layer 211 of the corresponding sub-board 200.
The circuit board 20 further has a second conductive hole 240, the second conductive hole 240 penetrates through the two sub-boards 200 stacked in layers, and the second conductive hole 240 is used to electrically connect at least one conductive circuit layer 220 of each of the two sub-boards 200. Accordingly, an electrical connection between the two sub-boards 200 may be formed through the second conductive hole 240, so that an electrical signal in one sub-board 200 may be transmitted to the other sub-board 200 through the second conductive hole 240.
Therefore, the first conductive hole and the second conductive hole are connected to the first conductive layer, electromagnetic shielding loss at the opening positions of the first conductive hole and the second conductive hole can be avoided, and therefore signal transmission efficiency of a formed circuit board can be improved, and signal transmission loss is reduced.
In this embodiment, optionally, the first conductive layers 211 on the opposite sides of the circuit board 20 may be patterned to form a plurality of conductive traces 2111, where the thicknesses of the first conductive layers 211 may be uniformly set and the thicknesses of the first conductive layers 211 may be the same, so that the conductive traces 2111 connected to the first conductive holes 230 and the conductive traces 2111 connected to the second conductive holes 240 have the same thickness and are disposed on the same plane. The first conductive via 230 and the second conductive via 240 on the same side of the circuit board 20 can be electrically connected to the pins of the component. The element may be a connector or the like.
In the above embodiments, the manufacturing method of the second conductive via 240 can specifically refer to the foregoing, and is not described herein again. A second back-drilled hole 243 may be formed on at least one side of the second conductive hole 240, and the conductive trace layer 220 connected to the second back-drilled hole 243 may be electrically disconnected at the position of the second back-drilled hole 243 through the second back-drilled hole 243, so that the second conductive hole 240 may electrically connect at least two designated conductive trace layers 220 in the circuit board 20.
Referring to fig. 4, in the present embodiment, a second side of each of the two daughter boards 200 away from the first side 201 thereof may be provided with a first back-drilled hole 233. The first back-drilling holes 233 may also be formed by removing a portion of the plating layer in the first conductive holes 230, and the method for forming the first back-drilling holes 233 may refer to the foregoing, which is not described herein. The first back drilling holes 233 can electrically disconnect the conductive circuit layers 220 connected thereto at positions corresponding to the first back drilling holes 233, so that the first conductive holes 230 electrically connect at least two designated conductive circuit layers 220 in the sub board 200 corresponding thereto.
The opening of the first back drilling hole 233 on one of the sub-boards 200 may be abutted to the opening of the first back drilling hole 233 on the other sub-board 200, and a window is disposed at a position of the connection layer 250 corresponding to the first back drilling hole 233, so that the first back drilling holes 233 on the two sub-boards 200 may be communicated through the window of the connection layer 250.
Optionally, the first conductive vias 230 on the two sub-boards 200 may be arranged in equal aperture, and the first conductive via 230 on one of the sub-boards 200 may be arranged coaxially with the first conductive via 230 on the other sub-board 200, which may implement that two conductive vias are opened on one hole site of the circuit board. The first conductive via 230 and the second conductive via 240 located on the same side of the circuit board 20 may be electrically connected to different connection portions of the component, wherein the different connection portions of the component may be respectively plugged and matched with the first conductive via 230 and the second conductive via 240; or different connection portions of the components may be respectively attached to and electrically connected to the conductive traces 2111 connected to the first conductive via 230 and the second conductive via 240, where the connection portions of the components may be soldered to the conductive traces 2111 or bonded by using a conductive adhesive.
Further, the application also provides an electronic device. The electronic device may include the circuit board 20 and the connector, wherein two connection portions of the connector are respectively plugged into and electrically connected to the first conductive hole 230 and the second conductive hole 240 on the same side of the circuit board 20.
In summary, those skilled in the art can easily understand that the beneficial effects of the present application are: by connecting the first conductive hole and the second conductive hole to the first conductive layer, electromagnetic shielding loss at the opening positions of the first conductive hole and the second conductive hole can be avoided, so that the signal transmission efficiency of the circuit board can be improved, and the signal transmission loss can be reduced. Furthermore, the manufacturing method of the circuit board is simple in manufacturing process, production time can be shortened, production efficiency is improved, and production cost can be saved.
The above description is only an example of the present application and is not intended to limit the scope of the present application, and all modifications of equivalent structures and equivalent processes, which are made by the contents of the specification and the drawings, or which are directly or indirectly applied to other related technical fields, are intended to be included within the scope of the present application.

Claims (18)

1. A method of manufacturing a circuit board, comprising:
preparing at least two sub-boards, wherein each sub-board is formed by sequentially and alternately laminating at least one layer of substrate and at least two layers of conducting circuit layers, and a first conducting layer is formed on the first side of at least one sub-board;
forming a first through hole on the first side of the daughter board and electroplating to form a first conductive hole, wherein the first conductive hole is connected with the first conductive layer, and at least two conductive circuit layers connected with the first conductive hole are electrically connected through the first conductive hole;
stacking and fixing two daughter boards to form a mother board, wherein the first side of one daughter board is positioned at one side away from the other daughter board;
and forming a second through hole on the motherboard, and electroplating the second conductive hole to form a second conductive hole, wherein the second conductive hole is connected with the first conductive layer to electrically connect at least two designated conductive circuit layers on the motherboard.
2. The method for manufacturing a circuit board according to claim 1, wherein the step of forming the first through hole on the first side of each of the sub-boards and forming the first conductive hole by electroplating comprises:
and removing part of the electroplated layer in the first conductive hole from a second side of the sub-board, which is opposite to the first side, to form a first back drilling hole.
3. The method for manufacturing a circuit board according to claim 2, wherein the first conductive layer is formed on a first side of each of the two sub-boards, and the first conductive hole is formed on the first side of each of the two sub-boards;
the step of laminating and fixing the two daughter boards to form the motherboard comprises the following steps:
arranging the surfaces of the two daughter boards, which are provided with the openings of the first back drilling holes, in a way of facing each other, and arranging a connecting layer between the two daughter boards;
and after the opening of the first back drilling hole on one daughter board is butted with the opening of the first back drilling hole on the other daughter board, the two daughter boards are fixedly connected.
4. The method of claim 2, wherein said mating the opening of the first back-drilled hole in one of the daughter boards with the opening of the first back-drilled hole in the other daughter board comprises:
and arranging the first back drilling hole on one sub-board to be coaxial with the first back drilling hole on the other sub-board.
5. The method of manufacturing a circuit board according to claim 3,
the connection layer is formed by arranging a prepreg between the two daughter boards and hot-pressing the two daughter boards and the prepreg.
6. The method of manufacturing a circuit board according to claim 5,
the connection layer has a fenestration corresponding to an opening of the first backdrilled hole.
7. The method for manufacturing a circuit board according to claim 1, wherein before the steps of forming the second through hole on the motherboard and forming the second conductive hole by electroplating on the second through hole, the method further comprises:
and protective layers are covered on the surfaces of the two opposite sides of the motherboard, and the protective layers are partially covered on the openings of the first conductive holes.
8. The method of manufacturing a circuit board according to claim 7,
the protective layer is formed by attaching a protective film to the surface of the motherboard; or
The protective layer is formed by covering a protective material on the surface of the motherboard.
9. The method for manufacturing a circuit board according to claim 7, wherein after the steps of forming the second through hole on the motherboard and forming the second conductive hole by electroplating, the method further comprises:
removing the protective layer to expose the first conductive hole and the second conductive hole;
and patterning the conductive circuit layers on the surfaces of the two opposite sides of the motherboard to form a plurality of conductive circuits with preset patterns.
10. The method of manufacturing a circuit board according to claim 1,
at least one layer of the conductive circuit layer in each of the two daughter boards is electrically connected through the second conductive hole;
the first conductive hole and the second conductive hole which are positioned on the same side of the motherboard are used for being plugged and matched with different connecting parts of elements and electrically connected with the different connecting parts of the elements.
11. A circuit board, comprising:
the daughter boards are arranged in a stacked mode and each daughter board comprises at least one layer of base board and at least two layers of conducting circuit layers, and the at least one layer of base board and the at least two layers of conducting circuit layers are arranged in a stacked mode in an alternating mode;
the first conducting layer is arranged on the first side of at least one sub-board, and the first side of the sub-board is positioned on the side away from the other sub-board;
the first conductive hole is connected with the first conductive layer and used for electrically connecting at least two designated conductive circuit layers on the daughter board corresponding to the first conductive hole; and
and the second conductive hole is connected with the first conductive layer and used for electrically connecting at least two layers of the conductive circuit layers appointed by the two daughter boards.
12. The circuit board of claim 11,
and a second side of the daughter board, which is far away from the first side, is provided with a first back drilling hole, and the first back drilling hole is formed by removing part of the electroplating layer in the first conductive hole.
13. The circuit board of claim 12,
the first conducting layers are formed on the first sides of the two daughter boards, and the first conducting holes are formed in the first sides of the two daughter boards;
the second side surfaces of the two sub-boards, which are opposite to the first side, are oppositely arranged, and the opening of the first back drilling hole in one sub-board is butted with the opening of the first back drilling hole in the other sub-board;
and a connecting layer is arranged between the two daughter boards so as to fixedly connect the two daughter boards.
14. The circuit board of claim 13,
wherein the first back-drilled hole on one of the sub-boards is coaxially disposed with the first back-drilled hole on the other sub-board.
15. The circuit board of claim 13,
the connecting layer is formed by hot pressing of a prepreg.
16. The circuit board of claim 15,
the connection layer has a fenestration corresponding to an opening of the first backdrilled hole.
17. The circuit board of claim 11,
at least one layer of the conductive circuit layer in each of the two daughter boards is electrically connected through the second conductive hole;
the first conductive hole and the second conductive hole which are positioned on the same side of the motherboard are used for being electrically connected with different connecting parts of components.
18. The circuit board of claim 11,
the first conductive layer is uniform in thickness and equal in thickness at each position.
CN202011019031.3A 2020-09-24 2020-09-24 Circuit board and manufacturing method thereof Pending CN114258194A (en)

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CN202011019031.3A CN114258194A (en) 2020-09-24 2020-09-24 Circuit board and manufacturing method thereof
PCT/CN2020/138644 WO2022062218A1 (en) 2020-09-24 2020-12-23 Circuit board and manufacturing method therefor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
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Publication number Priority date Publication date Assignee Title
WO2023197513A1 (en) * 2022-04-15 2023-10-19 深南电路股份有限公司 Printed circuit board

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EP1443810A1 (en) * 2003-01-23 2004-08-04 Alcatel Multilayer backplane with vias for pin connection
CN104754886B (en) * 2013-12-27 2019-06-14 中兴通讯股份有限公司 PCB processing method and PCB
US9743526B1 (en) * 2016-02-10 2017-08-22 International Business Machines Corporation Wiring board with stacked embedded capacitors and method of making
WO2018175660A1 (en) * 2017-03-21 2018-09-27 Sanmina Corporation Methods of forming blind vias for printed circuit boards
CN108617097B (en) * 2018-05-11 2020-09-18 华南理工大学 Manufacturing method of printed circuit board and printed circuit board

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023197513A1 (en) * 2022-04-15 2023-10-19 深南电路股份有限公司 Printed circuit board

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