CN117810330A - LED structure, manufacturing method thereof and corresponding LED chip - Google Patents

Abstract

The invention discloses an LED structure, a manufacturing method thereof and a corresponding LED chip. The LED structure comprises an epitaxial lamination and metal electrode layers positioned on two sides of the epitaxial lamination, wherein the epitaxial lamination comprises an n-type expansion layer, an n-type limiting layer, an active layer, a p-type limiting layer and a p-type conducting layer which are sequentially stacked along a growth direction, the n-type expansion layer is an n-type AlInP layer or an n-type AlGaInP layer, and high-concentration Te doping is realized through a high-temperature diffusion process. According to the invention, an independent n-type conducting layer is not required, and under the condition of realizing the same or higher transverse conducting capability, the epitaxial thickness of the n-type expansion layer can be thinned, the epitaxial time is reduced, the quality of material growth is improved, and the epitaxial cost is reduced.

Description

LED structure, manufacturing method and corresponding LED chip

Technical Field

The present invention relates to the field of semiconductor technology, and specifically relates to an LED structure and a manufacturing method thereof, as well as related LED chips.

Background technique

As an electroluminescent light source, light-emitting diodes (LEDs) are energy-saving and environmentally friendly. They have a series of excellent properties such as high light efficiency, high brightness, low power consumption, and long life, and are widely used. From the first appearance of red light-emitting diodes to the present, with the advancement of material growth technology and the development of device technology, the luminous efficiency of red LEDs has continued to improve.

In the existing red LED epitaxial structure, a current expansion layer is designed to expand the light-emitting area and improve the external quantum efficiency of the diode. The current expansion layer must grow to a certain thickness to effectively expand the current. If the current expansion layer is not grown or the thickness is not enough, the light emitted by the diode is mainly concentrated under the electrode. Since the electrodes are all non-transparent metal materials, the emitted light will be reflected back and cannot be effectively extracted, resulting in poor light extraction. Growing a current expansion layer of a certain thickness can spread the current to the entire diode chip, allowing the chip to emit light as evenly as possible and improve the light extraction efficiency. Therefore, in the current red LED, in order to achieve effective lateral expansion of the current, the current expansion layer is relatively thick. However, a current expansion layer that is too thick has several disadvantages: ① A too thick expansion layer will spread the current to the edge of the LED chip, which will increase surface recombination and reduce efficiency; ② The absorption of light below the band gap of this layer of material increases with the increase of thickness; ③ The growth time is long, which may cause the doping source to diffuse into the active area and reduce the internal quantum efficiency. ④ The growth time is long, which may affect the growth quality of this layer and the active area. In addition, the raw materials of the LED n-side expansion layer, Al, In, and P, are relatively expensive, especially In and P. Growing AlInP:Si with a thickness that can achieve the n-expansion effect is very costly.

Therefore, it is necessary to provide a method for thinning the current spreading layer without reducing the n-plane spreading effect.

Contents of the invention

1. Technical issues to be resolved

The object of the present invention is to provide an LED structure and a preparation method that thin the current expansion layer and solve the problem of the thick current expansion layer of flip-chip red LEDs in the prior art without reducing the n-plane expansion effect. .

(2) Technical solutions

In order to achieve the above object, one aspect of the present invention proposes an LED structure, including an epitaxial stack and metal electrode layers located on both sides of the epitaxial stack. The epitaxial stack includes n-type extension layers stacked along the growth direction, n-type A confinement layer, an active layer, a p-type confinement layer and a p-type conductive layer; the n-type extension layer is an n-type AlInP layer or an n-type AlGaInP layer; the n-type extension layer is doped with Te.

As a preferred embodiment of the present invention, the n-type extension layer is doped with a high concentration of Te.

As a preferred embodiment of the present invention, the metal electrode layer includes an n-face metal electrode layer directly disposed on the surface of the n-type extension layer.

As a preferred embodiment of the present invention, the concentration of Te doped in the n-type extension layer is greater than or equal to 1×10 ¹⁹ /cm ³ .

As a preferred embodiment of the present invention, the high-concentration Te doping is performed using an ex-situ high-temperature diffusion method for Te doping.

As a preferred embodiment of the present invention, the n-type extension layer is doped with Si, and the doping concentration of Si is between 0.5×10 ¹⁷ /cm ³ and 5×10 ¹⁷ /cm ³ .

As a preferred embodiment of the present invention, the thickness of the n-type extension layer is between 400nm and 2000nm.

Another aspect of the present invention provides a method for manufacturing an LED structure, which includes the following steps: producing an epitaxial stack through an epitaxial growth process. The epitaxial stack includes an n-type extension layer, an n-type confinement layer, and an n-type extension layer sequentially stacked along the growth direction. An active layer, a p-type confinement layer and a p-type conductive layer, wherein the n-type extension layer is an n-type AlInP layer or an n-type AlGaInP layer; a Te-containing thin film layer is formed on the n-type extension layer, and the The Te-containing thin film layer is grown ex-situ so that Te in the Te-containing thin film layer enters the n-type extension layer; metal electrode layers are formed on both sides of the epitaxial stack.

As a preferred embodiment of the present invention, an n-side metal electrode layer is directly formed on the surface of the n-type extension layer.

As a preferred embodiment of the present invention, the step of diffusing Te in the Te-containing thin film layer into the n-type extension layer is performed by high temperature diffusion.

As a preferred embodiment of the present invention, after performing an annealing step on the Te thin film layer, residual Te-containing components on the n-type extension layer are removed.

As a preferred embodiment of the present invention, potassium hydroxide or nitric acid is used to clean the remaining Te-containing components.

As a preferred embodiment of the present invention, the Te-containing thin film layer is a Te thin film layer or a CdTe thin film layer.

As a preferred embodiment of the present invention, in the step of forming a Te-containing thin film layer on the n-type extension layer: when the Te-containing thin film layer is a Te thin film layer, the thickness of the Te thin film layer is at least the thickness of the n-type extension layer. 0.03% of the thickness; when the Te-containing thin film layer is a CdTe thin film layer, the thickness of the CdTe thin film layer is at least 0.07% of the thickness of the n-type extension layer.

As a preferred embodiment of the present invention, the temperature of the high-temperature diffusion is 300°C to 500°C, and the time is 1 min to 10 min.

As a preferred embodiment of the present invention, the material of the metal electrode layer formed on the n-type extension layer side is Au.

A third aspect of the present invention provides an LED chip, including the LED structure proposed above.

A fourth aspect of the present invention provides an LED chip, including an LE structure produced by the above-mentioned manufacturing method of an LED structure.

(3) Beneficial effects

Under the condition of achieving the same lateral conductivity, the present invention can reduce the epitaxial thickness of the n-type extension layer, shorten the epitaxial time, improve the quality of material growth, and reduce the epitaxial cost.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic structural diagram of an epitaxial stack produced in a method for manufacturing an LED structure according to a comparative embodiment.

FIG. 2 is a schematic structural diagram of forming a p-plane gold electrode layer on an epitaxial stack in the manufacturing method of the LED structure of the comparative embodiment.

3 is a schematic structural diagram of forming a metal electrode layer on the n-type extension layer side in the manufacturing method of the LED structure of the comparative embodiment.

FIG. 4 is a schematic structural diagram of an epitaxial stack produced in the method for manufacturing an LED structure in Embodiment 1 of the present invention.

FIG. 5 is a schematic structural diagram of forming a p-plane gold electrode layer on an epitaxial stack in the method for manufacturing an LED structure in Embodiment 1 of the present invention.

6 is a schematic structural diagram of Te doping in the n-type extension layer in the manufacturing method of the LED structure in Embodiment 1 of the present invention.

7 is a schematic structural diagram of forming a metal electrode layer on the n-type extension layer side in the manufacturing method of the LED structure according to Embodiment 1 of the present invention.

Detailed ways

As mentioned before, in red LEDs, in order to achieve effective lateral expansion of current, the current expansion layer is relatively thick. The purpose of the present invention is to provide an LED structure and a preparation method that can thin the current expansion layer and solve the above-mentioned problems in the prior art without reducing the n-plane expansion effect.

Without reducing the n-side expansion effect, thinning the n-side current spreading layer requires considering the conductivity of this side. According to the resistance formula R=ρL/S (R: resistance; ρ: resistivity; L: current diffusion length; S cross-sectional area through which current passes). Regardless of the change in L, there are two ways to reduce resistance: ① Reduce the resistivity ρ; ② Increase the cross-sectional area S through which the current passes.

In method ②, increasing the cross-sectional area S through which the current passes requires increasing the thickness of the n-side current expansion layer, which does not meet the purpose of thinning. In method ①, according to the formula ρ = 1/nqμ _n (n: carrier concentration, q: unit charge, μ _n : mobility), the change in mobility is generally small and can be reduced by increasing the doping concentration. Small resistivity.

The n-side extension layer material of the LED structure is generally Si-doped Al(Ga)InP (expressed as AlInP:Si or AlGaInP:Si). The doping concentration of Si in Al(Ga)InP is low, so the doping can be replaced. Impurity sources are used to achieve the purpose of high doping and reduced resistance. Te can reach a higher doping concentration in Al(Ga)InP, which meets the requirements. Te doping in Al(Ga)InP can be done in two ways:

The first is in-situ doping, which directly dopes and grows Te during the epitaxial growth of Al(Ga)InP. However, this method has two limiting factors or shortcomings. First, it is difficult to epitaxially grow high-quality, high-Te-doped AlInP materials using the MOCVD method. The quality of material growth is difficult to guarantee, which may affect the subsequent growth quality of the active area. Second, the diffusion coefficient of Te in III-V semiconductor materials such as Al(Ga)InP is very high. Under high-temperature growth conditions with high doping concentrations, or when subsequent chips operate at high temperatures for a long time, Te atoms have It may diffuse into the active area, thereby reducing the internal quantum efficiency and affecting chip performance.

The second method is non-in-situ doping. During the chip process, a layer of Te is evaporated on the low-Si-doped Al(Ga)InP. Through RTP annealing, Te is thermally diffused into Al(Ga)InP:Si to increase the doping concentration, reduce the resistance of the n-side extension layer, and thin the n-side extension layer.

According to literature reports, high Si doping will affect the growth quality of Al(Ga)InP materials. This subsequent Te diffusion also has the advantage that when MOCVD epitaxial growth of Si-doped Al(Ga)InP material layers, it can reduce the Si The doping concentration improves the growth quality of this layer, thereby improving or ensuring the material quality of the subsequent active area. At the same time, this method can also control the diffusion depth of Te so that it does not diffuse into the active area and does not affect the internal quantum efficiency.

In order to achieve the above objects, the technical solutions adopted by the present invention are as follows:

The LED structure includes an epitaxial stack and metal electrode layers located on both sides of the epitaxial stack. The epitaxial stack at least includes an n-type extension layer, an n-type confinement layer, an active layer, a p-type confinement layer and a p-type layer sequentially stacked along the growth direction. A conductive layer, wherein the n-type extension layer is an n-type AlInP layer or an n-type AlGaInP layer, and the n-type extension layer is doped with Te.

Te doped in the n-type expansion layer is diffused into the n-type expansion layer through the high-temperature diffusion process of the present invention, and can be expanded in the n-type by controlling the thickness, process time and temperature of the Te film layer The concentration in the layer is greater than or equal to 1×10 ¹⁹ /cm ³ . At the same time, in order to improve the growth quality of the n-type AlInP layer or n-type AlGaInP layer, the present invention can reduce the Si doping concentration in the n-type AlInP layer or n-type AlGaInP layer. For example, the present invention can make it be at 0.5×10 ¹⁷ /cm ³ and 5 × 10 ¹⁷ /cm ³ , which is much lower than the doping concentration of Te.

The high-temperature diffusion process includes an annealing process.

After adopting the above solution, a high doping concentration of the n-type diffusion layer is achieved, thereby reducing the resistance. Therefore, while achieving the same lateral conductivity, the thickness of the n-type diffusion layer can be thinned, while improving the growth quality of the n-type layer and reducing epitaxy time and cost. Alternatively, the n-type extension layer can be thinned to 1/4 to 1/6 of the n-type extension layer without Te doping, for example, to 1/5 of the original thickness.

The present invention does not strictly limit the composition of the epitaxial stack, but generally speaking, the epitaxial stack structure of the LED includes an n-type extension layer, an n-type confinement layer, an active layer, a p-type confinement layer and a p-type confinement layer that are stacked sequentially along the growth direction. conductive layer. However, it should be noted that other layers, such as ohmic contact layers, may also appear in the epitaxial stack, which should be considered to be within the scope of the present invention. In addition, temporary structures may also appear during the formation process of the deposition layer, such as temporary substrates and temporary functional layers, including buffer layers, corrosion layers, etc.

However, since the band gap of GaAs is relatively small, it can absorb part of the light emitted by the active layer, which will reduce the external quantum efficiency of the LED. Considering this, the present invention preferably does not provide an n-type GaAs ohmic contact layer.

As a specific implementation, the temporary substrate may be a GaAs substrate. For example, one embodiment is to grow an epitaxial stack on a GaAs substrate. The epitaxial stack includes an n-type buffer layer, an n-type etching layer, an n-type extension layer, an n-type confinement layer, and an n-type buffer layer. Source layer, p-type confinement layer, p-type conductive layer.

As a specific implementation manner, in order to dope the n-type extension layer with Te, in the manufacturing process of the present invention, a Te thin film layer or a CdTe thin film layer is evaporated on the n-type extension layer.

The thickness of the Te thin film layer or the CdTe thin film layer is determined based on the thickness of the n-type expansion layer. According to simulations and actual measurements of the present invention, the thickness of the Te thin film layer is preferably greater than or equal to 0.03% of the thickness of the n-type expansion layer. The CdTe film layer The thickness of the layer is preferably greater than or equal to 0.07% of the thickness of the n-type expansion layer; further, to clean the remaining Te thin film layer or CdTe thin film layer, nitric acid or potassium hydroxide can be used.

Te is introduced into the n-type extension layer through a high temperature diffusion process, and the RTP annealing temperature is between 300°C and 500°C to achieve high doping of the n-type extension layer, and the process time is between 1 minute and 10 minutes. An optional process is the RTP annealing process.

According to the present invention, the doping concentration of the n-type extension layer can be increased to 1×10 ¹⁹ /cm ³ and above after the high-temperature diffusion process step. At the same time, compared with the conventional expansion layer whose Si doping concentration is on the order of 10 ¹⁸ /cm ³ , the present invention can reduce the Si doping concentration to the order of 10 ¹⁷ /cm ³ . As a specific embodiment, the metal electrode layer of the present invention preferably adopts an n-metal semiconductor contact structure, such as an n-type AlInP:Si layer/n metal structure. The n metal is preferably Au.

It can be seen that the present invention achieves a high doping concentration of the n-type extension layer by forming and annealing the Te/CdTe thin film layer in the manufacturing process, thereby reducing the resistance. While achieving the same lateral conductivity, the thickness of the n-type extension layer can be thinned, the growth quality of the n-type extension layer can be improved, and the epitaxy time and cost can be reduced.

In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention will be further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

In order to reflect the characteristics and advantages of the present invention over the prior art, a comparative example is first described herein for comparison. The comparative example adopts a conventional LED structure, that is, Te is not doped in the n-type extension layer.

FIG. 1 is a schematic structural diagram of an epitaxial stack produced in a method for manufacturing an LED structure according to a comparative embodiment. As shown in Figure 1, this comparative example uses the metal organic vapor phase epitaxy method to sequentially grow an n-type GaAs:Si buffer layer 2 (200nm) and an n-type GaInP:Si corrosion layer 3 (150nm) on the GaAs substrate 1 from bottom to top. , n-type AlInP:Si extension layer 4 (3μm), n-type AlInP:Si confinement layer 5 (500nm), active layer 6 (sequential growth of Al _0.6 GaInP barrier layer, GaInP, Al _0.55 GaInP, Al _0.6 GaInP barrier layer) , p-type AlInP:Mg confinement layer 7 (500nm) and p-type GaP:Mg conductive layer 8 (3μm).

The thickness of the n-type AlInP:Si extension layer 4 is 3 μm, and the Si doping concentration is 2ⅹ10 ¹⁸ /cm ³ .

FIG2 is a schematic diagram of the structure of forming a p-side gold electrode layer on the epitaxial stack in the manufacturing method of the LED structure of the comparative embodiment. The direction of FIG2 is the direction of FIG1 after being turned upside down. As shown in FIG2, after the epitaxial stack is formed, a p-side metal electrode layer 9 is grown on one side of the p-type conductive layer 8. In addition, the GaAs substrate 1, the GaAs:Si buffer layer 2, and the n-type GaInP:Si etching layer 3 are removed by etching to expose the n-type AlInP:Si extension layer 4.

3 is a schematic structural diagram of forming a metal electrode layer on one side of the n-type extension layer in the manufacturing method of the LED structure of the comparative embodiment. As shown in FIG. 3 , in this comparative example, an evaporation process of the n-surface metal electrode layer 10 is performed on the n-type AlInP:Si extension layer 4, and Au is used here.

Embodiment 1 of the present invention:

FIG. 4 is a schematic structural diagram of an epitaxial stack produced in the method for manufacturing an LED structure in Embodiment 1 of the present invention. As shown in Figure 4, the comparative example Embodiment 1 of the present invention has a similar structure to the comparative example described above. It also uses the metal organic vapor phase epitaxy method to grow n-type GaAs sequentially from bottom to top on the GaAs substrate 1: Si buffer layer 2, n-type GaInP:Si corrosion layer 3, n-type AlInP:Si extension layer 4, n-type AlInP:Si confinement layer 5, active layer 6 (sequentially grow Al _0.6 GaInP barrier layer, GaInP, Al _0.55 GaInP , Al _0.6 GaInP barrier layer), p-type AlInP:Mg confinement layer 7 and p-type GaP:Mg conductive layer 8.

However, unlike the comparative example, the thickness of the n-type AlInP:Si extension layer in Practical Example 1 of the present invention can be reduced to 400 nm to 2000 nm, such as 600 nm. At the same time, the doping concentration of Si can be reduced to 0.5ⅹ10 ¹⁷ /cm ³ ~ 5ⅹ10 ¹⁷ /cm ³ , such as 1ⅹ10 ¹⁷ /cm ³ 1ⅹ10 ¹⁷ /cm ³ .

FIG. 5 is a schematic structural diagram of forming a p-plane gold electrode layer on an epitaxial stack in the manufacturing method of an LED structure in Embodiment 1 of the present invention. Next, as shown in FIG. 5 , similar to the comparative embodiment, after forming the epitaxial stack, a p-plane metal electrode layer 9 is grown on the side of the p-type conductive layer 8 . Furthermore, the GaAs substrate 1, the GaAs:Si buffer layer 2, and the n-type GaInP:Si corrosion layer 3 are removed by etching to expose the n-type AlInP:Si expansion layer 4.

6 is a schematic structural diagram of doping Te in the n-type extension layer and forming a metal electrode layer on this side in the manufacturing method of the LED structure in Embodiment 1 of the present invention. As shown in Figure 6, a Te film 41 is evaporated on the n-type AlInP:Si extension layer 4, with a thickness of 1 nm, and then RTP annealed at 400°C for 1 minute, so that Te enters the n-type AlInP:Si extension layer 4 (in the figure arrow direction), to achieve high doping of the n-type AlInP:Si extension layer 4, and then use potassium hydroxide to clean the remaining Te thin film layer 41.

7 is a schematic diagram of the structure of forming a metal electrode layer on the n-type extension layer side in the manufacturing method of the LED structure of Example 1 of the present invention. Similar to the comparative example, the n-side metal electrode layer 10 is evaporated on the n-type AlInP:Si extension layer 4, and Au is used here.

Embodiment 2:

Embodiment 2 is similar to Embodiment 1, except that the Te thin film layer used in Embodiment 1 is replaced by a CdTe thin film layer. Since the Te content in the CdTe film layer is less than that of the Te film layer, a thicker CdTe film layer is required to achieve the same Te doping concentration.

In Embodiment 2, similarly, first, the metal organic vapor phase epitaxy method is used to grow n-type GaAs:Si buffer layer 2, n-type GaInP:Si corrosion layer 3, and n-type AlInP:Si on the GaAs substrate 1 from bottom to top. Extension layer 4, n-type AlInP:Si confinement layer 5, active layer 6 (sequential growth of Al _0.6 GaInP barrier layer, GaInP, Al _0.55 GaInP, Al _0.6 GaInP barrier layer), p-type AlInP:Mg confinement layer 7, p-type GaP:Mg conductive layer 8. Next, the p-plane metal electrode layer 9 is grown, and the substrate 1, GaAs:Si buffer layer 2, and n-type GaInP:Si etching layer 3 are etched. Then, a layer of CdTe film 41 is evaporated on the n-type AlInP:Si extension layer 4 with a thickness of 2 nm, and then RTP annealing is performed at 400°C for 1 minute, so that Te enters the n-type AlInP:Si extension layer 4, thereby realizing n-type AlInP :Si extension layer 4 is highly doped with Te. Then, the remaining CdTe film is cleaned with nitric acid, and then the n-side metal electrode layer 9 is evaporated, and Au is used here.

In this Embodiment 2, similarly, the thickness of the n-type AlInP:Si extension layer 4 can be 400nm~2000nm, such as 600nm, while the Si doping concentration is reduced to 0.5ⅹ10 ¹⁷ /cm ³ ~ 5ⅹ10 ¹⁷ /cm ³ , For example, 1ⅹ10 ¹⁷ /cm ³ .

In the above-described Embodiment 1 and Embodiment 2, the n-type AlInP:Si extension layer may be replaced by an n-type AlGaInP:Si extension layer.

The LED structure proposed above in the present invention and the LED structure manufactured by the above manufacturing method can be manufactured to form LED chips through a flip-chip packaging process or the like.

To sum up, in the above-mentioned Embodiment 1 and Embodiment 2, since the n-type extension layer is doped with Te through the annealing process, the conductivity of the n-type extension layer is enhanced. Therefore, compared with the existing technology, the thickness of the n-type extension layer can be thinned and the epitaxy time can be reduced while achieving the same lateral conductivity. At the same time, since the doping concentration of Si in the n-type extension layer can be reduced, the present invention is also beneficial to improving the growth quality of the extension layer material and reducing the cost of epitaxy.

The specific embodiments described above further describe the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above are only specific embodiments of the present invention and are not intended to limit the present invention. Within the spirit and principles of the present invention, any modifications, equivalent substitutions, improvements, etc. shall be included in the protection scope of the present invention.

Claims (13)

1. An LED structure, including an epitaxial stack and metal electrode layers located on both sides of the epitaxial stack, characterized by: The epitaxial stack includes an n-type extension layer, an n-type confinement layer, an active layer, a p-type confinement layer and a p-type conductive layer stacked along a growth direction; The n-type extension layer is an n-type AlInP layer or an n-type AlGaInP layer; The n-type extension layer is doped with a high concentration of Te; The metal electrode layer includes an n-face metal electrode layer directly disposed on the surface of the n-type extension layer. 2. The LED structure of claim 1, wherein the maximum Te doping concentration in the n-type extension layer is greater than or equal to 1×10 ¹⁹ /cm ³ . 3. The LED structure of claim 1, wherein the high-concentration Te doping adopts an ex-situ high-temperature diffusion method for Te doping. 4. The LED structure of claim 3, wherein the n-type extension layer is doped with Si, and the doping concentration of Si is between 0.5×10 ¹⁷ /cm ³ and 5×10 ¹⁷ /cm ³ between. 5. The LED structure of claim 4, wherein the thickness of the n-type extension layer is between 400nm and 2000nm. 6. A method for manufacturing an LED structure, characterized in that it includes the following steps: An epitaxial stack is produced by an epitaxial growth process, wherein the epitaxial stack comprises an n-type extension layer, an n-type confinement layer, an active layer, a p-type confinement layer and a p-type conductive layer sequentially stacked along a growth direction, wherein the n-type extension layer is an n-type AlInP layer or an n-type AlGaInP layer; Form a Te-containing thin film layer on the n-type extension layer, and perform ex-situ growth on the Te-containing thin film layer, so that Te in the Te-containing thin film layer diffuses into the n-type extension layer; An n-plane metal electrode layer is directly formed on the surface of the n-type extension layer. 7. The method for manufacturing an LED structure according to claim 6, wherein the step of diffusing Te in the Te-containing thin film layer into the n-type extension layer is performed by high-temperature diffusion. 8 . The method for manufacturing an LED structure according to claim 6 , wherein after the Te in the Te-containing thin film layer is diffused into the n-type extension layer, residual Te-containing components on the n-type extension layer are removed. 9 . The method for manufacturing an LED structure according to claim 6 , wherein the Te-containing thin film layer is a Te thin film layer or a CdTe thin film layer. 10. The method for manufacturing an LED structure as described in claim 9 is characterized in that, in the step of forming a Te-containing thin film layer on the n-type extension layer: when the Te-containing thin film layer is a Te thin film layer, the thickness of the Te thin film layer is at least 0.03% of the thickness of the n-type extension layer; when the Te-containing thin film layer is a CdTe thin film layer, the thickness of the CdTe thin film layer is at least 0.07% of the thickness of the n-type extension layer. 11. The method for manufacturing an LED structure according to claim 7, wherein the high-temperature diffusion occurs at a temperature of 300°C to 500°C and a time of 1 min to 10 min. 12. An LED chip, characterized by comprising the LED structure according to any one of claims 1 to 5. 13. An LED chip, characterized by comprising an LED structure produced by the method of manufacturing an LED structure according to any one of claims 6 to 11.