CN117413358A - 包括集成器件和耦合集成器件的顶侧的桥的封装 - Google Patents

包括集成器件和耦合集成器件的顶侧的桥的封装 Download PDF

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Publication number
CN117413358A
CN117413358A CN202280038808.1A CN202280038808A CN117413358A CN 117413358 A CN117413358 A CN 117413358A CN 202280038808 A CN202280038808 A CN 202280038808A CN 117413358 A CN117413358 A CN 117413358A
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CN
China
Prior art keywords
integrated device
die
bridge
coupled
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202280038808.1A
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English (en)
Chinese (zh)
Inventor
B·查瓦
A·罗伊
S·S·宋
金钟海
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of CN117413358A publication Critical patent/CN117413358A/zh
Pending legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65Shapes or dispositions of interconnections
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/401Package configurations characterised by multiple insulating or insulated package substrates, interposers or RDLs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/05Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68Shapes or dispositions thereof
    • H10W70/685Shapes or dispositions thereof comprising multiple insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

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  • Combinations Of Printed Boards (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
CN202280038808.1A 2021-06-24 2022-05-23 包括集成器件和耦合集成器件的顶侧的桥的封装 Pending CN117413358A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US17/357,811 2021-06-24
US17/357,811 US11830819B2 (en) 2021-06-24 2021-06-24 Package comprising integrated devices and bridge coupling top sides of integrated devices
PCT/US2022/030533 WO2022271376A1 (en) 2021-06-24 2022-05-23 Package comprising integrated devices and bridge coupling top sides of integrated devices

Publications (1)

Publication Number Publication Date
CN117413358A true CN117413358A (zh) 2024-01-16

Family

ID=82492622

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202280038808.1A Pending CN117413358A (zh) 2021-06-24 2022-05-23 包括集成器件和耦合集成器件的顶侧的桥的封装

Country Status (8)

Country Link
US (2) US11830819B2 (enExample)
EP (1) EP4360131A1 (enExample)
JP (1) JP2024523238A (enExample)
KR (1) KR20240025525A (enExample)
CN (1) CN117413358A (enExample)
BR (1) BR112023025604A2 (enExample)
TW (1) TW202303899A (enExample)
WO (1) WO2022271376A1 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11830819B2 (en) 2021-06-24 2023-11-28 Qualcomm Incorporated Package comprising integrated devices and bridge coupling top sides of integrated devices
US12463156B2 (en) * 2021-11-10 2025-11-04 Intel Corporation Packaging architectures for sub-terahertz radio frequency devices
US12599007B2 (en) * 2021-12-23 2026-04-07 Intel Corporation Composite IC die package including an electro-thermo-mechanical die (ETMD) with through substrate vias
TWI835546B (zh) * 2023-02-03 2024-03-11 福懋科技股份有限公司 半導體封裝

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7838337B2 (en) 2008-12-01 2010-11-23 Stats Chippac, Ltd. Semiconductor device and method of forming an interposer package with through silicon vias
US20140131854A1 (en) 2012-11-13 2014-05-15 Lsi Corporation Multi-chip module connection by way of bridging blocks
US10192810B2 (en) * 2013-06-28 2019-01-29 Intel Corporation Underfill material flow control for reduced die-to-die spacing in semiconductor packages
US10797022B2 (en) * 2017-10-06 2020-10-06 Advanced Semiconductor Engineering, Inc. Semiconductor device package and method of manufacturing the same
US10991635B2 (en) 2019-07-20 2021-04-27 International Business Machines Corporation Multiple chip bridge connector
US11133263B2 (en) 2019-09-17 2021-09-28 Intel Corporation High-density interconnects for integrated circuit packages
US11600526B2 (en) 2020-01-22 2023-03-07 iCometrue Company Ltd. Chip package based on through-silicon-via connector and silicon interconnection bridge
US11315902B2 (en) * 2020-02-12 2022-04-26 International Business Machines Corporation High bandwidth multichip module
US12159840B2 (en) * 2020-06-23 2024-12-03 Intel Corporation Scalable and interoperable PHYLESS die-to-die IO solution
US11450612B2 (en) * 2020-07-09 2022-09-20 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor devices and methods of manufacturing the same
US11830819B2 (en) 2021-06-24 2023-11-28 Qualcomm Incorporated Package comprising integrated devices and bridge coupling top sides of integrated devices

Also Published As

Publication number Publication date
TW202303899A (zh) 2023-01-16
WO2022271376A1 (en) 2022-12-29
US11830819B2 (en) 2023-11-28
BR112023025604A2 (pt) 2024-02-20
JP2024523238A (ja) 2024-06-28
US20220415808A1 (en) 2022-12-29
EP4360131A1 (en) 2024-05-01
US12400966B2 (en) 2025-08-26
KR20240025525A (ko) 2024-02-27
US20240055356A1 (en) 2024-02-15

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