CN117397001A - 基板处理方法 - Google Patents

基板处理方法 Download PDF

Info

Publication number
CN117397001A
CN117397001A CN202280037723.1A CN202280037723A CN117397001A CN 117397001 A CN117397001 A CN 117397001A CN 202280037723 A CN202280037723 A CN 202280037723A CN 117397001 A CN117397001 A CN 117397001A
Authority
CN
China
Prior art keywords
substrate
layer
chips
absorption layer
processing method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202280037723.1A
Other languages
English (en)
Chinese (zh)
Inventor
松原义久
堤义弘
山下阳平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of CN117397001A publication Critical patent/CN117397001A/zh
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B43/00—Operations specially adapted for layered products and not otherwise provided for, e.g. repairing; Apparatus therefor
    • B32B43/006—Delaminating
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/36—Removing material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7412—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support the auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/744—Details of chemical or physical process used for separating the auxiliary support from a device or a wafer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/301—Marks applied to devices, e.g. for alignment or identification for alignment

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Plasma & Fusion (AREA)
  • Mechanical Engineering (AREA)
  • Laser Beam Processing (AREA)
  • Manufacturing & Machinery (AREA)
CN202280037723.1A 2021-06-03 2022-05-25 基板处理方法 Pending CN117397001A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2021093400 2021-06-03
JP2021-093400 2021-06-03
PCT/JP2022/021409 WO2022255189A1 (ja) 2021-06-03 2022-05-25 基板処理方法

Publications (1)

Publication Number Publication Date
CN117397001A true CN117397001A (zh) 2024-01-12

Family

ID=84323136

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202280037723.1A Pending CN117397001A (zh) 2021-06-03 2022-05-25 基板处理方法

Country Status (5)

Country Link
US (1) US20240250064A1 (https=)
JP (1) JP7636087B2 (https=)
KR (1) KR20240016994A (https=)
CN (1) CN117397001A (https=)
WO (1) WO2022255189A1 (https=)

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3809681B2 (ja) * 1996-08-27 2006-08-16 セイコーエプソン株式会社 剥離方法
US7534498B2 (en) * 2002-06-03 2009-05-19 3M Innovative Properties Company Laminate body, method, and apparatus for manufacturing ultrathin substrate using the laminate body
US7195813B2 (en) * 2004-05-21 2007-03-27 Eastman Kodak Company Mixed absorber layer for displays
JP6149277B2 (ja) * 2011-03-30 2017-06-21 ボンドテック株式会社 電子部品実装方法、電子部品実装システムおよび基板
US20150017434A1 (en) 2012-01-30 2015-01-15 3M Innovative Properties Company Apparatus, hybrid laminated body, method, and materials for temporary substrate support
JP6034625B2 (ja) 2012-09-03 2016-11-30 東京応化工業株式会社 剥離方法
EP4481811A3 (en) * 2016-12-23 2025-02-26 Board Of Regents, The University Of Texas System Heterogeneous integration of components onto compact devices using moiré based metrology and vacuum based pick-and-place
US10217637B1 (en) * 2017-09-20 2019-02-26 International Business Machines Corporation Chip handling and electronic component integration
CN110824599B (zh) * 2018-08-14 2021-09-03 白金科技股份有限公司 一种红外带通滤波器
WO2020111146A1 (ja) * 2018-11-29 2020-06-04 日立化成株式会社 半導体装置の製造方法及び仮固定材用積層フィルム
EP3995518A4 (en) * 2019-07-02 2022-09-07 Asahi Kasei Kabushiki Kaisha MICROWAVE FILM FOR BIOASSAY, LIGHT SENSITIVE RESIN COMPOSITION FOR THE PREPARATION OF MICROWAVE FILM FOR BIOASSAY AND METHOD OF PREPARATION OF MICROWAVE FILM FOR BIOASSAY
TWI874441B (zh) * 2019-10-29 2025-03-01 日商東京威力科創股份有限公司 附有晶片之基板的製造方法及基板處理裝置

Also Published As

Publication number Publication date
JPWO2022255189A1 (https=) 2022-12-08
US20240250064A1 (en) 2024-07-25
KR20240016994A (ko) 2024-02-06
JP7636087B2 (ja) 2025-02-26
WO2022255189A1 (ja) 2022-12-08

Similar Documents

Publication Publication Date Title
US20220319901A1 (en) Direct bonding and debonding of carrier
US10217791B2 (en) Method of manufacturing bonded substrate, bonded substrate, method of manufacturing solid-state imaging apparatus, solid-state imaging apparatus, and camera
CN104145330B (zh) 用于临时接合超薄晶片的方法和装置
CN114586135B (zh) 带芯片基板的制造方法和基板处理装置
US8551862B2 (en) Method of manufacturing laminated wafer by high temperature laminating method
CN102651379A (zh) 半导体装置及半导体装置的制造方法
TW202338958A (zh) 處理方法及處理系統
CN112289694A (zh) 晶圆键合方法
JP2011071193A (ja) 貼合せｓｏｉウェーハ及びその製造方法
CN117397001A (zh) 基板处理方法
KR20220143741A (ko) 반도체 소자의 제조 방법
US20240079403A1 (en) Method for manufacturing substrate with chips, and substrate processing device
CN118737958A (zh) 半导体器件及其制作方法
CN114975501A (zh) 晶圆键合方法以及背照式图像传感器的形成方法
CN119626973B (zh) 一种临时键合及解键合的方法、复合衬底的制备方法及晶圆的制造方法
TWI917180B (zh) 附有晶片之基板的製造方法
CN121398602A (zh) 用于晶圆键合的半导体结构及其改善晶圆键合对准的方法
JP2024129501A (ja) 検査方法
CN121494344A (zh) 一种玻璃基衬底加工方法及加工装置
Matthias et al. Wafer-Level-Packaging, 3D Integration and Wafer-Level Layer Transfer Processes Through Aligned Wafer Bonding
JPH07245250A (ja) 張り合わせ半導体基板の製造方法
JPH08115861A (ja) 張り合わせ半導体基板およびその製造方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination