CN117276410A - Passivated contact solar cell and preparation method thereof - Google Patents

Abstract

The embodiment of the application relates to the technical field of solar cells, and provides a passivation contact solar cell and a preparation method thereof, wherein the method comprises the following steps: forming a tunneling layer and an initial silicon layer which are sequentially stacked on the surface of a substrate, wherein the material of the initial silicon layer comprises a polycrystalline structure and an amorphous structure; placing the substrate with the tunneling layer and the initial silicon layer into a diffusion chamber; performing a first temperature raising process to raise the temperature of the diffusion chamber to a first preset temperature; annealing treatment is carried out in the diffusion chamber at a first preset temperature so as to convert the initial silicon layer into a polycrystalline silicon layer; and doping the polysilicon layer, and introducing source gas into the diffusion chamber in the doping process to convert the polysilicon layer into a doped polysilicon layer. The passivation contact solar cell and the preparation method thereof are at least beneficial to improving the performance of the solar cell.

Description

Passivated contact solar cell and preparation method thereof

Technical field

The embodiments of the present application relate to the technical field of solar cells, and in particular to a passivated contact solar cell and a preparation method thereof.

Background technique

Fossil energy has air pollution and limited reserves, while solar energy has the advantages of cleanness, pollution-free and rich resources. Therefore, solar energy is gradually becoming the core clean energy alternative to fossil energy. Since solar cells have good photoelectric conversion efficiency, solar cells have become The development focus of clean energy utilization.

In order to improve the efficiency of solar cells, a passivated contact structure can be formed on the front and/or back of the solar cell, and the field passivation and/or chemical passivation capabilities of the passivated contact structure can be used to improve the carrier tunneling capability of the solar cell. , reducing the recombination of carriers on the substrate surface. For example, tunnel oxide layer passivated contact solar cell (Tunnel OxidePassivated Contact solar cell, TOPCon), high temperature heterojunction cell (Heterojunction with Intrinsic Thin-layer, HJT) and back contact solar cell (Back Contact, BC) are all used. . However, defects are easily formed during the fabrication of passivated contact structures, resulting in reduced solar cell performance.

Contents of the invention

The embodiments of the present application provide a passivated contact solar cell and a preparation method thereof, which are at least beneficial to improving the performance of the solar cell.

According to some embodiments of the present application, on the one hand, the embodiments of the present application provide a method for preparing a passivated contact solar cell, including: forming a sequentially stacked tunnel layer and an initial silicon layer on the surface of a substrate, and the material of the initial silicon layer includes polycrystalline structure and amorphous structure; placing the substrate with the tunneling layer and the initial silicon layer formed into the diffusion chamber; performing a first temperature raising process to increase the temperature of the diffusion chamber to a first preset temperature; in the first At a preset temperature, an annealing process is performed in the diffusion chamber to convert the initial silicon layer into a polysilicon layer; the polysilicon layer is doped, and source gas is introduced into the diffusion chamber during the doping process to make the polysilicon layer Converted into a doped polysilicon layer.

In some embodiments, the annealing process includes: maintaining the temperature of the diffusion chamber at a first preset temperature within a first preset time, where the first preset time ranges from 10 min to 60 min.

In some embodiments, the first preset temperature ranges from 800°C to 1000°C.

In some embodiments, the heating rate of the first heating treatment is 3°C/min~10°C/min.

In some embodiments, a low pressure chemical vapor deposition process is used to form the initial silicon layer.

In some embodiments, the doping process includes: performing a cooling process to reduce the temperature of the diffusion chamber from a first preset temperature to a second preset temperature; and performing a deposition process to diffuse the diffusion chamber at the second preset temperature. The source gas is introduced into the chamber, and the temperature of the diffusion chamber is maintained at the second preset temperature within the second preset time; a push-off process is performed to increase the temperature of the diffusion chamber from the second preset temperature to a third preset temperature, and the temperature of the diffusion chamber is maintained at the third preset temperature within a third preset time.

In some embodiments, the third preset temperature is higher than the first preset temperature.

In some embodiments, after performing the push-knot process, the method further includes: performing a post-knot process to increase the temperature of the diffusion chamber from the third preset temperature to the fourth preset temperature, and perform a post-knot process at the fourth preset temperature. The temperature of the diffusion chamber is maintained at the fourth preset temperature during the time.

In some embodiments, the second preset temperature ranges from 750°C to 950°C; the second preset time ranges from 10min to 60min.

In some embodiments, after the first temperature raising process and before the annealing process, the method further includes: performing a leak detection process to detect whether the leak rate of the diffusion chamber is less than or equal to 5 mbar/min.

According to some embodiments of the present application, another embodiment of the present application provides a passivated contact solar cell, which is formed using any of the preparation methods of the passivated contact solar cell in the above embodiments, including: a substrate; a tunneling layer; The layer is located on the surface of the substrate; the doped polysilicon layer is located on the surface of the tunnel layer away from the substrate.

In some embodiments, in the doped polysilicon layer, the doping atom concentration is greater than or equal to 3E+20 atoms/cm ³ .

The technical solutions provided by the embodiments of this application have at least the following advantages:

In the method for preparing a passivated contact solar cell provided by the embodiment of the present application, after forming a tunneling layer and an initial silicon layer on a substrate, the substrate with the tunneling layer and the initial silicon layer is first placed into a diffusion chamber for the first step. The temperature is raised, and the annealing process is performed at a first preset temperature to convert the initial silicon layer into a polysilicon layer. In this way, the existing diffusion chamber required for the diffusion process can be used to anneal the initial silicon layer without adding new equipment or increasing process costs. After the annealing process, the doping process is carried out directly without changing the chamber, which avoids the problem of the crystallinity of the polysilicon layer changing during the process of cooling down, replacing the chamber and then raising the temperature, and at the same time improves the process efficiency. An annealing step is first performed to convert the mixed crystal phase structure of the initial crystalline silicon layer consisting of polycrystalline structure and amorphous structure into a uniform polycrystalline structure. The converted polycrystalline silicon layer has a higher crystallinity than the initial silicon layer. , then when the source gas is further introduced for doping treatment, the doped atoms will not easily gather in the polysilicon layer, thus avoiding the formation of more holes in the doped polysilicon and improving the stability of the passivated contact solar cell. and efficiency.

Description of the drawings

One or more embodiments are exemplified by the pictures in the corresponding drawings. These illustrative illustrations do not constitute a limitation on the embodiments. Unless otherwise stated, the pictures in the drawings do not constitute a limitation on proportions; in order to To more clearly illustrate the technical solutions in the embodiments of the present application or traditional technologies, the following will briefly introduce the drawings needed in the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. , for those of ordinary skill in the art, other drawings can also be obtained based on these drawings without exerting creative efforts.

Figure 1 is a schematic diagram of a passivation contact structure provided by an embodiment of the present application;

Figure 2 is a laser microscope image of an initial silicon layer and a doped polysilicon layer provided by an embodiment of the present application;

Figure 3 is a flow chart of a method for preparing a passivated contact solar cell according to an embodiment of the present application;

Figure 4 is a laser microscope image of doped polysilicon in two passivated contact solar cells according to an embodiment of the present application.

Detailed ways

FIG. 1 is a schematic diagram of a passivation contact structure provided by an embodiment of the present application.

Referring to Figure 1, the passivation contact structure is composed of a tunnel layer 101 and a doped polysilicon layer 102 located on the surface of the substrate 100. The tunnel layer 101 and the substrate 100 can neutralize the dangling bonds on the surface of the substrate 100 and perform excellent chemical passivation. ; Due to the Fermi level difference between the doped polysilicon layer 102 and the substrate 100, the energy band is bent on the surface of the substrate 100, which can more effectively block the passage of minority carriers (also known as minority carriers) without affecting the majority of carriers. The transmission of carriers (also called majority carriers) realizes the selective collection of carriers.

The usual method of forming a passivated contact structure is to first deposit the tunneling layer 101 and the initial silicon layer on the surface of the substrate 100, then dope the initial silicon layer, and finally activate it through annealing. During the annealing process, the initial silicon layer is The crystallinity of the layer changes, and the initial crystalline silicon layer is transformed from a mixed crystal phase structure composed of a polycrystalline structure and an amorphous structure into a uniform polycrystalline structure. In this way, the initial silicon layer is transformed into a doped polycrystalline silicon layer 102 .

FIG. 2 is a laser microscope image of an initial silicon layer and a doped polysilicon layer according to an embodiment of the present application. Among them, (A) in Figure 2 shows the initial silicon layer that has not been doped and annealed, and (B) in Figure 2 shows the doped polysilicon that has been doped and annealed.

Comparing (A) in Figure 2 and (B) in Figure 2, it is found that the initial silicon layer itself that has not been doped and annealed is relatively free of holes. After the initial silicon layer is converted into the doped polysilicon layer 102, the doped A large number of holes are formed on the surface of the polysilicon layer 102, which causes the cleaning liquid or etching liquid to contact the tunneling layer 101 through the holes during the subsequent cleaning or etching process, causing the tunneling layer 101 to be damaged and affect passivation. The effect of the contact structure, which in turn leads to compromised solar cell performance. This is because the initial silicon layer includes a polycrystalline structure and an amorphous structure. The inter-lattice gaps between the polycrystalline structures in the initial silicon layer are large. During the doping process, doping atoms are easy to form in the gaps. aggregation, thereby causing the doped polysilicon 103 formed after annealing to have more holes.

An embodiment of the present application provides a method for preparing a passivated contact solar cell, which is at least beneficial to improving the performance of the solar cell.

Each embodiment of the present application will be described in detail below with reference to the accompanying drawings. However, those of ordinary skill in the art can understand that in each embodiment of the present application, many technical details are provided to enable readers to better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical solution claimed in this application can also be implemented.

FIG. 3 is a flow chart of a method for preparing a passivated contact solar cell according to an embodiment of the present application.

Referring to Figure 3, the preparation method of passivated contact solar cells includes:

Step 11: Form a sequentially stacked tunnel layer and an initial silicon layer on the surface of the substrate. The material of the initial silicon layer includes a polycrystalline structure and an amorphous structure.

In some embodiments, the substrate may be an elemental semiconductor material. The elemental semiconductor material may be composed of a single element, such as silicon or germanium. Alternatively, elemental semiconductor materials can be monocrystalline, polycrystalline, amorphous, or microcrystalline (a state that has both monocrystalline and amorphous is called a microcrystalline state). For example, silicon can be monocrystalline silicon. , at least one of polycrystalline silicon, amorphous silicon or microcrystalline silicon.

In some embodiments, the material of the substrate may also be a compound semiconductor material. Common compound semiconductor materials include but are not limited to silicon germanium, silicon carbide, gallium arsenide, indium gallium, perovskite, cadmium telluride, copper indium selenide and other materials.

The substrate may also be a sapphire substrate, a silicon-on-insulator substrate, or a germanium-on-insulator substrate.

In some embodiments, the substrate may be an N-type semiconductor substrate or a P-type semiconductor substrate. The N-type semiconductor substrate is doped with N-type doping elements. The N-type doping elements can be phosphorus (P) elements, bismuth (Bi) elements, antimony (Sb) elements or arsenic (As) elements among Group V elements. Any one. The P-type semiconductor substrate is doped with P-type elements. The P-type doping element can be any group III element such as boron (B) element, aluminum (Al) element, gallium (Ga) element or indium (In) element. By.

In some embodiments, the substrate may have opposing front and back sides. If the passivated contact solar cell is a single-sided cell, the front side of the substrate can be used as the light-receiving surface to receive incident light, and the back side can be used as the backlight surface. If the passivated contact solar cell is a bifacial cell, both the front and back sides of the substrate can be used as light-receiving surfaces and can be used to receive incident light.

In some embodiments, a texturing process can be performed on at least one surface of the front or back surface of the substrate to form a textured surface on at least one surface of the front or back surface of the substrate. In this way, the front and back surfaces of the substrate can be enhanced to face incident light. The absorption and utilization of light. For example, the suede surface may be a pyramid-structured suede surface.

If the passivated contact solar cell is a single-sided cell, a textured surface can be formed on the light-receiving surface of the substrate, and the backlight surface of the substrate can be a polished surface, that is, the backlight surface of the substrate is flatter than the light-receiving surface. It should be noted that for a single-sided battery, a textured surface can also be formed on both the light-receiving surface and the backlight surface of the substrate.

If the solar cell is a bifacial cell, textured surfaces can be formed on both the front and back sides of the substrate.

In some embodiments, the material of the tunneling layer may include at least one of silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, or magnesium fluoride.

The tunneling layer is located on the surface of the substrate and can have a chemical passivation effect. Since there are interface state defects on the substrate surface, the tunneling layer can saturate the dangling bonds on the substrate surface, reduce the density of defect states on the substrate surface, and reduce the recombination centers on the substrate surface. To reduce the carrier recombination rate, the interface state density on the surface of the substrate is larger. The increase in the interface state density will promote the recombination of photogenerated carriers, increase the filling factor, short-circuit current and open-circuit voltage of the solar cell to improve the solar cell. photoelectric conversion efficiency.

In some embodiments, the tunneling layer may be formed using a chemical vapor deposition process, a physical vapor deposition process, an atomic layer deposition process, or the like.

In some embodiments, the initial silicon layer may be at least one of amorphous silicon or polysilicon.

In some embodiments, the process of forming the initial silicon layer may use chemical vapor deposition (CVD), physical vapor deposition (PVD), or atomic layer deposition (ALD).

In some embodiments, a low pressure chemical vapor deposition (LPCVD) process may be used to form the initial silicon layer.

In some embodiments, the deposition temperature used in the deposition process when forming the initial silicon layer can be 500°C~700°C. For example, the deposition temperature can be 500°C, 530°C, 560°C, 590°C, 610°C, 640°C, 670℃ or 700℃. The deposition temperature is in the range of 500°C to 700°C, which is beneficial to the initial silicon layer having higher electrical conductivity and carrier mobility.

Step 12: Place the substrate with the tunneling layer and the initial silicon layer formed into the diffusion chamber.

In some embodiments, after placing the substrate with the tunneling layer and the initial silicon layer formed into the diffusion chamber, the pressure in the diffusion chamber is reduced to a negative pressure of 50mbar~200mbar, such as 50mbar, 55mbar, 70mbar, 100mbar, 130mbar , 160mbar, 180mbar or 200mbar.

In some embodiments, after reducing the pressure in the diffusion chamber to a negative pressure of 50 mbar to 200 mbar, a leak detection process may be performed to detect whether the leak rate of the diffusion chamber is less than or equal to 3 mbar/min. For example, the leak rate may be 3 mbar/min. min, 2mbar/min, 1mbar/min or 0.5mbar/min. That is, before the diffusion chamber is heated, the diffusion chamber is leak-detected. The leak rate needs to be within an appropriate range before subsequent process steps can be carried out to ensure that the gas environment in the diffusion chamber is within a controllable range. , to facilitate the subsequent process.

If the leakage rate of the diffusion chamber is less than or equal to 3mbar/min, subsequent process steps can be performed; if the leakage rate of the diffusion chamber is greater than 3mbar/min, the substrate with the tunneling layer and the initial silicon layer needs to be removed to Perform maintenance on the diffusion chamber.

Step 13: Perform a first temperature raising process to raise the temperature of the diffusion chamber to a first preset temperature.

In some embodiments, during the first temperature raising process, the pressure in the diffusion chamber can be reduced to a negative pressure of 50mbar~200mbar, such as 50mbar, 55mbar, 70mbar, 100mbar, 130mbar, 160mbar, 180mbar or 200mbar.

In some embodiments, a leak detection process may be performed after the first temperature raising process and before the annealing process to detect whether the leak rate of the diffusion chamber is less than or equal to 5 mbar/min. For example, the leak rate may be 5 mbar/min or 4.3 mbar. /min, 3.5mbar/min, 2.4mbar/min, 1.6mbar/min or 0.8mbar/min. That is, after the first temperature-raising process is performed on the diffusion chamber, the leakage detection process is performed on the diffusion chamber. At this time, the environment in the diffusion chamber is closer to the actual situation during the subsequent process, and the leakage rate is more accurate and more precise. It is conducive to making corresponding judgments and operations in a timely manner.

If the leakage rate of the diffusion chamber is less than or equal to 5mbar/min, subsequent process steps can be performed; if the leakage rate of the diffusion chamber is greater than 5mbar/min, the substrate with the tunneling layer and the initial silicon layer needs to be removed to Maintenance of the diffusion chamber is carried out to prevent the poor working environment of the diffusion chamber from causing inability to proceed with subsequent processes or resulting in low product yield.

In some embodiments, the temperature rise rate of the first temperature rise treatment may be 3°C/min~10°C/min. For example, the temperature rise rate of the first temperature rise treatment may be 3°C/min, 4°C/min, 5°C/min, 6℃/min, 7℃/min, 8℃/min, 9℃/min or 10℃/min. If the heating rate of the first heating treatment is too fast, it is easy to cause uneven size distribution of the grain structure in the converted polysilicon layer; if the heating rate of the first heating treatment is too slow, it is easy to cause low process efficiency. Therefore, the first temperature raising treatment The heating rate needs to be adjusted within an appropriate range.

Step 14: Perform annealing treatment in the diffusion chamber at a first preset temperature to convert the initial silicon layer into a polysilicon layer. At the first preset temperature, the amorphous structure and polycrystalline structure in the initial silicon layer are reorganized to transform into a polycrystalline silicon layer composed of a denser polycrystalline structure.

If the initial silicon layer is made of polysilicon material, the temperature required to deposit the initial silicon layer is relatively high. In polycrystalline silicon materials, there are more polycrystalline structures than amorphous structures. The size of the polycrystalline structure is larger. The sizes of different grain structures vary greatly. There are many interfaces between grain structures, which can easily lead to a lower conductivity of the initial silicon layer. Low. By performing annealing treatment at the first preset temperature, the polycrystalline structure in the polysilicon material can be recombined to form a polycrystalline structure with small size differences in grain structure and uniform grain structure size distribution, and the amorphous structure can be transformed It has a polycrystalline structure to form a denser polysilicon layer.

If the initial silicon layer is made of amorphous silicon material, the temperature required to deposit the initial silicon layer is lower. In amorphous silicon materials, there are more amorphous structures than polycrystalline structures. The gaps between polycrystalline structures are large, which can easily cause the aggregation of dopant atoms. Doped polysilicon with holes can easily be formed during subsequent doping treatments. Therefore, at the first preset temperature, the initial silicon layer is first annealed to convert the amorphous structure in the amorphous silicon material into a polycrystalline structure to form a polycrystalline silicon layer with higher density.

In some embodiments, the annealing process includes: maintaining the temperature of the diffusion chamber at a first preset temperature within a first preset time, where the first preset time ranges from 10 min to 60 min, for example, the first preset time The set time can be 10min, 15min, 20min, 25min, 30min, 35min, 40min, 45min, 50min, 55min or 60min. If the first preset time is too short, the initial silicon layer cannot be fully converted into a polysilicon layer; if the first preset time is too long, it will easily lead to larger grain sizes in the multi-layer silicon layer and more interfaces between the corresponding grains. , resulting in lower conductivity of the polysilicon layer.

In some embodiments, the first preset temperature ranges from 800°C to 1000°C. For example, the first preset temperature may be 800°C, 830°C, 850°C, 880°C, 900°C, 920°C, 960°C, 990°C. ℃ or 1000℃. If the temperature is too low, the amorphous structure in the initial silicon layer will be converted into a polycrystalline structure at a slow rate or even cannot be converted. If the temperature is too high, the silicon structure in the initial silicon layer will be destroyed, affecting the electronic properties of the initial silicon layer. Therefore, , the first preset temperature needs to be within the appropriate range.

In some embodiments, the first preset temperature and the first preset time can be relatively adaptively adjusted. For example, if the first preset temperature is higher, the first preset time can be appropriately reduced; If the setting time is long, the first preset temperature can be appropriately lowered.

Step 15: Perform doping treatment on the polysilicon layer, and pass the source gas into the diffusion chamber during the doping treatment, so that the polysilicon layer is converted into a doped polysilicon layer.

The doped polysilicon layer can have a field passivation effect. A built-in electric field can be formed when the self-doped polysilicon layer points toward the substrate, allowing minority carriers to escape, thereby reducing the concentration of minority carriers and making the carriers at the substrate interface The flow recombination rate decreases, thereby increasing the open circuit voltage, short circuit current and filling factor of the solar cell, thereby improving the photoelectric conversion efficiency of the solar cell.

In some embodiments, if there are N-type doping elements in the substrate, the doping elements in the doped polysilicon layer are N-type doping elements; if there are P-type doping elements in the substrate, then the doping elements in the doped polysilicon layer are The doping element is a P-type doping element. That is, the type of doping elements in the doped polysilicon layer is the same as the type of doping elements in the substrate.

In some embodiments, if the doping element in the doped polysilicon is a P-type doping element, the source gas may include trimethyl borate, tripropyl borate, boron tribromide or anhydrous trimethyl borate, etc. The source gas decomposes boron oxide and reacts with silicon on the surface of the polysilicon layer to produce borosilicate glass, and then boron atoms diffuse into the polysilicon layer, thus forming a doped polysilicon layer doped with P-type elements; if the doping elements in the polysilicon are doped If it is an N-type doping element, the source gas may include phosphorus oxychloride. The source gas decomposes phosphorus pentoxide and reacts with the silicon on the surface of the polysilicon layer to produce phosphorus silicate glass. Then the phosphorus atoms diffuse into the polysilicon layer, thus forming doped glass. A polysilicon layer doped with N-type elements.

In some embodiments, the polysilicon layer may be doped at a first preset temperature. For example, the source gas is introduced into the diffusion chamber at a first preset temperature to cause the doping atoms to react with the silicon on the surface of the polysilicon layer and at the same time diffuse the doping atoms into the interior of the polysilicon layer, thus converting the polysilicon layer into doped polysilicon layer.

In some embodiments, the doping process may include: performing a cooling process to reduce the temperature of the diffusion chamber from a first preset temperature to a second preset temperature; and performing a deposition process to lower the temperature of the diffusion chamber to a second preset temperature. The source gas is introduced into the diffusion chamber, and the temperature of the diffusion chamber is maintained at the second preset temperature within the second preset time; a push-off process is performed to increase the temperature of the diffusion chamber from the second preset temperature. to the third preset temperature, and the temperature of the diffusion chamber is maintained at the third preset temperature within the third preset time.

That is to say, the temperature is first lowered and deposited so that a part of the thickness of the polysilicon layer reacts with the source gas first to form an initial doped polysilicon layer with a higher doping concentration, and then the temperature is increased to cause the initial doped polysilicon layer to The doped atoms in the polycrystalline silicon layer diffuse into the interior of the polysilicon layer, eventually converting the entire polysilicon layer into a doped polysilicon layer. In this way, the degree of reaction between the source gas and the polysilicon layer is controllable at a lower temperature, which is conducive to controlling the concentration and advancement depth of dopant atoms, and avoids uncontrolled diffusion of dopant atoms through the tunnel layer, causing field passivation effects. reduce the problem.

In some embodiments, the cooling process may be natural cooling, that is, the diffusion chamber is not heated, so that the temperature of the diffusion chamber is naturally cooled to the second preset temperature. In some embodiments, the cooling process may also use refrigeration equipment for cooling.

In some embodiments, the second preset temperature may range from 750°C to 950°C. For example, the second preset temperature may be 750°C, 780°C, 800°C, 830°C, 860°C, 890°C, 910°C, or 950℃. In some embodiments, the second preset time may be 10min~60min. For example, the second preset time may be 10min, 15min, 20min, 25min, 30min, 35min, 40min, 45min, 50min, 55min or 60min.

In some embodiments, the third preset temperature may be higher than the first preset temperature. After the annealing treatment, the initial silicon layer is converted into a polysilicon layer. The density and crystallinity of the polysilicon layer are higher than those of the initial silicon layer. In order to make it easier for doping atoms to diffuse into the higher-density polysilicon layer, you can set Higher push junction temperature.

In some embodiments, the third preset temperature may range from 800°C to 1000°C. For example, the third preset temperature may be 800°C, 830°C, 850°C, 880°C, 900°C, 920°C, 960°C, 990℃ or 1000℃.

In some embodiments, the third preset time may be 10min~60min. For example, the third preset time may be 10min, 15min, 20min, 25min, 30min, 35min, 40min, 45min, 50min, 55min or 60min.

In some embodiments, the third preset temperature may not be higher than the first preset temperature. By adjusting the third preset temperature and the third preset time, the doping atoms can be diffused to the surface in contact with the polysilicon layer and the tunnel layer.

In some embodiments, after performing the push-knot process, it may also include: performing a post-knot process to increase the temperature of the diffusion chamber from the third preset temperature to the fourth preset temperature, and perform the push-knot process at the fourth preset temperature. It is assumed that the temperature of the diffusion chamber is maintained at the fourth preset temperature during the time period.

That is to say, through multiple push-junction processes, the doping atoms can be diffused to the surface in contact with the polysilicon layer and the tunnel layer, and the doping atom concentration in the finally formed doped polysilicon layer is within a required range. In this way, the depth of the doped atoms can be gradually pushed into the polysilicon layer by pushing the junction multiple times, and the depth of each push is within a controllable range, thereby preventing the doped atoms from penetrating the tunneling layer due to too deep a push. The problem.

In some embodiments, the fourth preset temperature may range from 800°C to 1000°C. For example, the fourth preset temperature may be 800°C, 830°C, 850°C, 880°C, 900°C, 920°C, 960°C, 990℃ or 1000℃.

In some embodiments, the fourth preset time may be 10min~60min. For example, the fourth preset time may be 10min, 15min, 20min, 25min, 30min, 35min, 40min, 45min, 50min, 55min or 60min.

In the method for preparing a passivated contact solar cell provided by the embodiment of the present application, after forming a tunneling layer and an initial silicon layer on a substrate, the substrate with the tunneling layer and the initial silicon layer is first placed into a diffusion chamber for the first step. The temperature is raised, and the annealing process is performed at a first preset temperature to convert the initial silicon layer into a polysilicon layer. In this way, the existing diffusion chamber required for the diffusion process can be used to anneal the initial silicon layer without adding new equipment or increasing process costs. After the annealing process, the doping process is carried out directly without changing the chamber, which avoids the problem of the crystallinity of the polysilicon layer changing during the process of cooling down, replacing the chamber and then raising the temperature, and at the same time improves the process efficiency. An annealing step is first performed to convert the mixed crystal phase structure of the initial crystalline silicon layer consisting of polycrystalline structure and amorphous structure into a uniform polycrystalline structure. The converted polycrystalline silicon layer has a higher crystallinity than the initial silicon layer. , then when the source gas is further introduced for doping treatment, the doped atoms will not easily gather in the polysilicon layer, thus avoiding the formation of more holes in the doped polysilicon and improving the stability of the passivated contact solar cell. and efficiency.

Another embodiment of the present application provides a passivated contact solar cell, which can be formed using the preparation method of the passivated contact solar cell provided in the above embodiment, so as to improve the performance of the passivated contact solar cell. It should be noted that for parts that are the same as or corresponding to the above-mentioned embodiments, reference may be made to the corresponding descriptions of the foregoing embodiments and will not be described in detail below.

The passivated contact solar cell includes: a substrate; a tunneling layer located on the surface of the substrate; and a doped polysilicon layer located on the surface of the tunneling layer away from the substrate.

The tunneling layer is located on the surface of the substrate and can have a chemical passivation effect. Since there are interface state defects on the substrate surface, the tunneling layer can saturate the dangling bonds on the substrate surface, reduce the density of defect states on the substrate surface, and reduce the recombination centers on the substrate surface. To reduce the carrier recombination rate, the interface state density on the surface of the substrate is larger. The increase in the interface state density will promote the recombination of photogenerated carriers, increase the filling factor, short-circuit current and open-circuit voltage of the solar cell to improve the solar cell. The photoelectric conversion efficiency; the doped polysilicon layer can have a field passivation effect. A built-in electric field can be formed in the direction of the self-doped polysilicon layer toward the substrate, allowing minority carriers to escape, thus reducing the concentration of minority carriers. The carrier recombination rate at the substrate interface decreases, thereby increasing the open circuit voltage, short circuit current and filling factor of the solar cell, thereby improving the photoelectric conversion efficiency of the solar cell.

In some embodiments, the passivated contact solar cell may be a tunnel oxide passivated contact solar cell, a high temperature heterojunction solar cell, or a back contact solar cell.

In some embodiments, the thickness of the tunneling layer may be 1 nm~3 nm in a direction perpendicular to the substrate surface, such as 1 nm, 1.2 nm, 1.5 nm, 1.8 nm, 2.0 nm, 2.3 nm, 2.6 nm, 2.8 nm Or 3nm.

In some embodiments, the thickness of the doped polysilicon layer may be 5 nm to 200 nm in a direction perpendicular to the substrate surface, such as 5 nm, 10 nm, 30 nm, 60 nm, 100 nm, 130 nm, 150 nm, 180 nm, 200 nm.

Figure 4 is a laser microscope image of doped polysilicon in two passivated contact solar cells according to an embodiment of the present application. Among them, the doped polysilicon shown in (C) in Figure 4 is formed by the initial silicon layer first being doped and then annealed. The doped polysilicon shown in (D) in Figure 4 is the initial silicon layer first. After annealing treatment, doping treatment and transformation are performed (ie, the preparation method of the passivated contact solar cell provided in the above embodiment).

The initial silicon layers used in Figure 4 are all amorphous silicon and are prepared and formed using the same process. According to the comparison between (C) in FIG. 4 and (D) in FIG. 4 , it can be found that there are almost no holes on the surface of the doped polysilicon layer formed by the preparation method of the passivated contact solar cell provided in the above embodiment. In addition, according to the battery performance test, the minority carrier lifetime of the passivated contact solar cell doped with polysilicon corresponding to (D) in Figure 4 is longer than the minority carrier lifetime of the doped polysilicon in the passivated contact solar cell corresponding to (C) of Figure 4 The service life is 1000us longer; the cell conversion efficiency of the passivated contact solar cell corresponding to (D) in Figure 4 is 0.2% higher than that of the passivated contact solar cell corresponding to (C) in Figure 4; ((D) in Figure 4 D) The open circuit voltage of the corresponding passivated contact solar cell is 3 mV higher than the open circuit voltage of the passivated contact solar cell corresponding to (C) in Figure 4; the fill factor of the passivated contact solar cell corresponding to (D) in Figure 4 The fill factor of the passivated contact solar cell corresponding to (C) in Figure 4 is increased by 0.1%.

It can be seen that the doped polysilicon layer formed by the preparation method of the passivated contact solar cell provided in the above embodiment can not only avoid the problem of holes, but also improve the performance of the passivated contact solar cell.

In some embodiments, in the doped polysilicon layer formed using the method for preparing a passivated contact solar cell provided in the above embodiments, the concentration of doping atoms in the doped polysilicon layer is greater than or equal to 3E+20atom/cm ³ , for example, 3E+ 20atom/cm ³ , 3.5E+20atom/cm ³ , 4E+20atom/cm ³ , 4.5E+20atom/cm ³ , 5E+20atom/cm ³ or 5.5E+20atom/cm ³ etc. The concentration of doping atoms may refer to the average concentration of multiple different locations in the doped polysilicon layer; or may refer to the unit volume concentration at any location in the doping polysilicon layer. In the doped polysilicon layer formed using the method for preparing a passivated contact solar cell provided in the above embodiment, the doping atom concentration at each position in the doped polysilicon layer is relatively uniform.

Those of ordinary skill in the art can understand that the above-mentioned embodiments are specific examples for implementing the present application, and in actual applications, various changes can be made in form and details without departing from the spirit and spirit of the present application. scope.

Claims (12)

1. A method for preparing a passivated contact solar cell, which is characterized by comprising: Form a sequentially stacked tunnel layer and an initial silicon layer on the surface of the substrate, where the material of the initial silicon layer includes a polycrystalline structure and an amorphous structure; Put the substrate on which the tunneling layer and the initial silicon layer are formed into a diffusion chamber; Perform a first temperature raising process to raise the temperature of the diffusion chamber to a first preset temperature; At the first preset temperature, an annealing process is performed in the diffusion chamber to convert the initial silicon layer into a polysilicon layer; The polysilicon layer is subjected to a doping process, and a source gas is introduced into the diffusion chamber during the doping process, so that the polysilicon layer is converted into a doped polysilicon layer. 2. The method for preparing a passivated contact solar cell according to claim 1, wherein the annealing treatment includes: maintaining the temperature of the diffusion chamber at the first preset time within a first preset time. temperature, wherein the first preset time ranges from 10min to 60min. 3. The method for preparing a passivated contact solar cell according to claim 1, wherein the first preset temperature ranges from 800°C to 1000°C. 4. The method for preparing a passivated contact solar cell according to claim 1, wherein the heating rate of the first heating treatment is 3°C/min~10°C/min. 5. The method for preparing a passivated contact solar cell according to claim 1, characterized in that a low-pressure chemical vapor deposition process is used to form the initial silicon layer. 6. The method for preparing a passivated contact solar cell according to claim 1, wherein the doping treatment includes: Perform a cooling process to reduce the temperature of the diffusion chamber from the first preset temperature to a second preset temperature; Perform a deposition process to pass the source gas into the diffusion chamber at the second preset temperature, and maintain the temperature of the diffusion chamber at the second preset time within a second preset time. Set temperature; A pushing process is performed to increase the temperature of the diffusion chamber from the second preset temperature to a third preset temperature, and maintain the temperature of the diffusion chamber at the third preset time. Third preset temperature. 7. The method for preparing a passivated contact solar cell according to claim 6, wherein the third preset temperature is higher than the first preset temperature. 8. The method for preparing a passivated contact solar cell according to claim 6, characterized in that, after performing the push-down process, it further includes: A back-pushing process is performed to increase the temperature of the diffusion chamber from the third preset temperature to a fourth preset temperature, and maintain the temperature of the diffusion chamber at the predetermined temperature within a fourth preset time. The fourth preset temperature. 9. The method for preparing a passivated contact solar cell according to claim 6, wherein the second preset temperature ranges from 750°C to 950°C; and the second preset time ranges from 10 min to 60 min. 10. The method for preparing a passivated contact solar cell according to claim 1, wherein after the first temperature raising process and before the annealing process, the method further includes: performing a leak detection process to detect the Whether the leakage rate of the diffusion chamber is less than or equal to 5mbar/min. 11. A passivated contact solar cell, characterized in that it is formed by the preparation method of a passivated contact solar cell according to any one of claims 1 to 10, including: base; A tunneling layer, the tunneling layer is located on the surface of the substrate; A doped polysilicon layer is located on a surface of the tunneling layer away from the substrate. 12. The passivated contact solar cell according to claim 11, wherein in the doped polysilicon layer, the doping atom concentration is greater than or equal to 3E+20 atoms/ ^cm3 .