CN117252002A - Gerber file-based BGA automatic identification method and device - Google Patents
Gerber file-based BGA automatic identification method and device Download PDFInfo
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- 229910000679 solder Inorganic materials 0.000 claims abstract description 82
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Abstract
The embodiment of the invention discloses a Gerber file-based BGA automatic identification method and device. The method comprises the following steps: acquiring element information of a top signal layer, a top solder mask layer, an inner signal layer, a drilling layer, a bottom signal layer and a bottom solder mask layer in a Gerber file; identifying a first BGA set of the top signal layer according to the element information of the top signal layer, the top solder mask layer, the inner signal layer and the drilling layer and preset identification parameters; identifying a second BGA set of the bottom signal layer according to the element information of the bottom signal layer, the bottom solder mask layer, the inner signal layer and the drilling layer and the preset identification parameters; and determining a target BGA set finally identified according to the first BGA set and the second BGA set. The technical scheme provided by the embodiment of the invention realizes the automatic identification of the BGA attribute and improves the identification accuracy and the identification efficiency.
Description
Technical Field
The embodiment of the invention relates to the technical field of PCB processing, in particular to a Gerber file-based BGA automatic identification method and device.
Background
Since the downstream SMT pick-up process of PCB processing has higher and higher requirements for BGA (Ball Grid Array) pads, there are relatively high control standards for shapes, sizes, relative coordinate errors, appearances, etc. of the pads, so it is necessary to treat them differently from other common component packages. In the graphics of the PCB, various graphic elements (such as Pad, line, arc, polygon, text and the like) are contained, and the read Gerber file element set does not contain the BGA attribute of the element, so that the BGA attribute of each element needs to be identified and assigned. The existing technology is not accurate enough in recognition and easy to misjudge, manual correction is needed, and the efficiency is quite low by manually recognizing the BGA.
Disclosure of Invention
The embodiment of the invention provides a Gerber file-based BGA automatic identification method and device, which are used for realizing automatic identification of BGA attributes, so that identification accuracy and identification efficiency are improved.
In a first aspect, an embodiment of the present invention provides a method for automatically identifying a BGA based on a Gerber file, where the method includes:
acquiring element information of a top signal layer, a top solder mask layer, an inner signal layer, a drilling layer, a bottom signal layer and a bottom solder mask layer in a Gerber file;
Identifying a first BGA set of the top signal layer according to the element information of the top signal layer, the top solder mask layer, the inner signal layer and the drilling layer and preset identification parameters;
identifying a second BGA set of the bottom signal layer according to the element information of the bottom signal layer, the bottom solder mask layer, the inner signal layer and the drilling layer and the preset identification parameters;
and determining a target BGA set finally identified according to the first BGA set and the second BGA set.
Optionally, the preset identification parameters include: the minimum number of arrays in the transverse direction, the minimum number of arrays in the longitudinal direction, the minimum diameter of identified pads, the maximum diameter of identified pads, the minimum center distance between pads, and the maximum center distance between pads.
Optionally, the identifying the first BGA set of the top signal layer according to the element information of the top signal layer, the top solder mask layer, the inner signal layer and the drilling layer and the preset identification parameter includes:
screening all elements in the top signal layer according to the element information of the top signal layer to obtain a first element set with element types of Pad types and element diameters larger than the minimum diameter of the identification Pad and smaller than the maximum diameter of the identification Pad;
Removing Pad elements intersecting with non-laser holes with non-VIA attributes in the first element set according to the element information of the drilling layer to obtain a second element set;
removing non-SMD Pad elements intersecting with the VIA holes in the second element set according to the element information of the inner layer signal layer and the drilling layer to obtain a third element set;
acquiring all elements of the top-layer solder mask layer according to the element information of the top-layer solder mask layer to obtain a fourth element set;
traversing the third element set, determining a fifth element set with an inclusion relation with the node element from the fourth element set according to the position of the node element when one node element is obtained through each traversal, and inserting a welding resistance element which is of a Pad type and contains the node element in the fifth element set into a first target element set;
and carrying out array recognition on the first target element set, and placing the recognized elements into the first BGA set.
Optionally, the performing array recognition on the first target element set, and placing the recognized element into the first BGA set includes:
dividing elements in the first target element set according to the sizes, and sorting the elements with the same size through coordinates to obtain a first coordinate axis direction sorting table and a second coordinate axis direction sorting table;
And aiming at each group of elements with the same size, according to the first coordinate axis direction sorting table and the second coordinate axis direction sorting table of the group of elements, if the number of the elements in the first coordinate axis direction is more than or equal to the array transverse minimum number, the number of the elements in the second coordinate axis direction is more than or equal to the array longitudinal minimum number, the element spacing in the first coordinate axis direction and the element spacing in the second coordinate axis direction are all between the minimum center distance between pads and the maximum center distance between pads, and the element spacing in the first coordinate axis direction and the element spacing in the second coordinate axis direction are all equal ratio spacing, putting the group of elements into the first BGA set.
Optionally, the identifying the second BGA set of the bottom signal layer according to the element information of the bottom signal layer, the bottom solder mask layer, the inner signal layer, the drilling layer, and the preset identification parameter includes:
screening all elements in the bottom signal layer according to the element information of the bottom signal layer to obtain a sixth element set with element types of Pad types and element diameters larger than the minimum diameter of the identification Pad and smaller than the maximum diameter of the identification Pad;
Removing Pad elements intersecting with non-laser holes with non-VIA attributes in the sixth element set according to the element information of the drilling layer to obtain a seventh element set;
removing non-SMD Pad elements intersecting with the VIA holes in the seventh element set according to the element information of the inner layer signal layer and the drilling layer to obtain an eighth element set;
acquiring all elements of the bottom layer solder mask layer according to the element information of the bottom layer solder mask layer to obtain a ninth element set;
traversing the eighth element set, determining a tenth element set with an inclusion relation with the node element from the ninth element set according to the position of the node element when one node element is obtained through each traversal, and inserting a welding resistance element which is of a Pad type and contains the node element in the tenth element set into a second target element set;
and carrying out array recognition on the second target element set, and placing the recognized elements into the second BGA set.
Optionally, the performing array recognition on the second target element set, and placing the recognized element into the second BGA set includes:
dividing elements in the second target element set according to the sizes, and sorting the elements with the same size through coordinates to obtain a third coordinate axis direction sorting table and a fourth coordinate axis direction sorting table;
And for each group of elements with the same size, according to the third coordinate axis direction sorting table and the fourth coordinate axis direction sorting table of the group of elements, if the number of elements in the third coordinate axis direction is more than or equal to the transverse minimum number of the array, the number of elements in the fourth coordinate axis direction is more than or equal to the longitudinal minimum number of the array, the element spacing in the third coordinate axis direction and the element spacing in the fourth coordinate axis direction are all between the minimum center distance between pads and the maximum center distance between pads, and the element spacing in the third coordinate axis direction and the element spacing in the fourth coordinate axis direction are all equal ratio spacing, placing the group of elements into the second BGA set.
Optionally, the minimum number of the arrays is 3, the minimum diameter of the identification Pad is 6 mils, the maximum diameter of the identification Pad is 40 mils, the minimum center distance between the pads is 12 mils, and the maximum center distance between the pads is 60 mils.
In a second aspect, an embodiment of the present invention further provides a BGA automatic identification device based on a Gerber file, where the device includes:
the element information acquisition module is used for acquiring element information of a top signal layer, a top solder mask layer, an inner signal layer, a drilling layer, a bottom signal layer and a bottom solder mask layer in the Gerber file;
The top signal layer BGA identification module is used for identifying a first BGA set of the top signal layer according to the element information of the top signal layer, the top solder mask layer, the inner signal layer and the drilling layer and preset identification parameters;
the bottom signal layer BGA identification module is used for identifying a second BGA set of the bottom signal layer according to the element information of the bottom signal layer, the bottom solder mask layer, the inner signal layer and the drilling layer and the preset identification parameters;
and the target BGA set determining module is used for determining a target BGA set finally identified according to the first BGA set and the second BGA set.
In a third aspect, an embodiment of the present invention further provides a computer apparatus, including:
one or more processors;
a memory for storing one or more programs;
the one or more programs, when executed by the one or more processors, cause the one or more processors to implement the Gerber file-based BGA automatic identification method provided by any embodiment of the present invention.
In a fourth aspect, an embodiment of the present invention further provides a computer readable storage medium, where a computer program is stored, where the program when executed by a processor implements the automatic BGA identification method based on the Gerber file provided in any embodiment of the present invention.
The embodiment of the invention provides a BGA automatic identification method based on a Gerber file, which comprises the steps of firstly acquiring element information of a top signal layer, a top solder mask layer, an inner signal layer, a drilling layer, a bottom signal layer and a bottom solder mask layer in the Gerber file, then identifying a first BGA set of the top signal layer according to the element information of the top signal layer, the top solder mask layer, the inner signal layer and the drilling layer and preset identification parameters, and identifying a second BGA set of the bottom signal layer according to the element information of the bottom signal layer, the bottom solder mask layer, the inner signal layer and the drilling layer and the preset identification parameters, so as to determine a final identified target BGA set according to the first BGA set and the second BGA set. The automatic BGA identification method based on the Gerber file provided by the embodiment of the invention realizes the automatic identification of the BGA attribute and improves the identification accuracy and the identification efficiency.
Drawings
FIG. 1 is a flowchart of a Gerber file-based automatic BGA identification method according to an embodiment of the present invention;
FIG. 2 is a flowchart illustrating a first BGA aggregation process for identifying a top signal layer according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a BGA automatic identification device based on a Gerber file according to a second embodiment of the present invention;
Fig. 4 is a schematic structural diagram of a computer device according to a third embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present invention are shown in the drawings.
Before discussing exemplary embodiments in more detail, it should be mentioned that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although a flowchart depicts steps as a sequential process, many of the steps may be implemented in parallel, concurrently, or with other steps. Furthermore, the order of the steps may be rearranged. The process may be terminated when its operations are completed, but may have additional steps not included in the figures. The processes may correspond to methods, functions, procedures, subroutines, and the like.
Example 1
Fig. 1 is a flowchart of a method for automatically identifying BGAs based on Gerber files according to an embodiment of the present invention. The embodiment can be applied to the situation of identifying the BGA type in the PCB field, such as BGA identification of network endpoints, and the like, and the method can be executed by the automatic BGA identification device based on the Gerber file, which can be realized by hardware and/or software and can be generally integrated in computer equipment. As shown in fig. 1, the method specifically comprises the following steps:
S11, acquiring element information of a top signal layer, a top solder mask layer, an inner signal layer, a drilling layer, a bottom signal layer and a bottom solder mask layer in the Gerber file.
S12, identifying the first BGA set of the top signal layer according to the element information of the top signal layer, the top solder mask layer, the inner signal layer and the drilling layer and preset identification parameters.
S13, identifying a second BGA set of the bottom signal layer according to the element information of the bottom signal layer, the bottom solder mask layer, the inner signal layer and the drilling layer and the preset identification parameters.
S14, determining a target BGA set finally identified according to the first BGA set and the second BGA set.
Wherein the layers represent graphic files constituting a PCB (printed circuit board), and the elements represent basic graphic units on the PCB, such as Pad, line, polygon, text, etc., wherein Pad is an imaging of an Aperture shape (such as circle, ellipse, rectangle, etc.) at a coordinate, and Aperture refers to a graphic template for defining openings or slots of a printed circuit pattern during the process of manufacturing the PCB. The top signal layer, also known as the part layer, is mainly used for placing components and parts, and for double-layer boards and multi-layer boards, can be used for arranging wires or copper coating. The bottom signal layer is also called a welding layer and is mainly used for wiring and welding, and the double-layer board and the multi-layer board can be used for placing components. Solder masks (Solder Mask), which include top and bottom layers of Solder masks, are also known as green layers, are non-routing layers of circuit boards. The inner signal layer may include a patch layer (Paste Mask), which is a non-wiring layer, and may be used to make a steel mesh, with holes in the steel mesh corresponding to pads of the SMD device on the circuit board. The drilling layer is used for illustrating the size attribute of drilling, and the size, position and attribute of drilling can be shown in a graph mode through a hole diagram, wherein a VIA (VIA) is a common hole drilled at a collection of wires which need to be communicated in each layer for communicating a circuit (copper conductive circuit used for connecting an electronic element) between each layer in a multi-layer PCB design, and a VIA or a blind hole in a disc is a VIA hole on a bonding pad.
After the Gerber file to be identified is loaded, the element information of the top signal layer, the top solder mask layer, the inner signal layer, the drilling layer, the bottom signal layer and the bottom solder mask layer in the Gerber file can be read for standby. And then, on one hand, the top signal layer and the top solder mask layer can be combined and analyzed, and are matched with other layers (such as an inner signal layer and a drilling layer) for auxiliary identification, and a first BGA set identified by the top signal layer is obtained through element information of each layer. On the other hand, the bottom signal layer and the bottom solder mask layer can be combined and analyzed, and other layers (such as an inner signal layer and a drilling layer) are matched for auxiliary identification, and a second BGA set identified by the bottom signal layer is obtained through element information of each layer. And finally, collecting all the first BGA sets of the identified top signal layer and the second BGA sets of the identified bottom signal layer to obtain the target BGA set finally identified. In the identification process, the preset identification parameters can be referred to for comparison to determine whether the BGA attribute condition is met, wherein the preset identification parameters can be kept as default values, or set values input by a user can be received through an interactive interface before identification, so that the data parameter initialization is carried out on the preset identification parameters again by using the set values, and the identification range is defined in a self-defined mode. After the identification is finished, the identification result can be displayed to the user through the interactive interface, specifically, the BGA pattern in the target BGA set can be identified through a rectangular frame (such as a white rectangular frame), meanwhile, the circuit layer can be displayed in red, the top-layer solder mask layer (or the bottom-layer solder mask layer) is displayed in green, and the pattern of overlapping the top-layer solder mask layer with the top-layer signal layer (or the bottom-layer solder mask layer with the bottom-layer signal layer) is represented by using yellow dots, and the like.
Wherein, optionally, the preset identification parameters include: the BGA attributes of Pad type elements in various graphic elements can be specifically identified by using the preset identification parameters. Further alternatively, the array is 3 at a lateral minimum, the array is 3 at a longitudinal minimum, the identification Pad is 6 mils (mils) in minimum diameter, the identification Pad is 40 mils in maximum diameter, the minimum center-to-center distance between pads is 12 mils, and the maximum center-to-center distance between pads is 60 mils and can be stored as a default value.
Further optionally, the identifying the first BGA set of the top signal layer according to the element information of the top signal layer, the top solder mask layer, the inner signal layer and the drilling layer and a preset identification parameter includes: screening all elements in the top signal layer according to the element information of the top signal layer to obtain a first element set with element types of Pad types and element diameters larger than the minimum diameter of the identification Pad and smaller than the maximum diameter of the identification Pad; removing Pad elements intersecting with non-laser holes with non-VIA attributes in the first element set according to the element information of the drilling layer to obtain a second element set; removing non-SMD Pad elements intersecting with the VIA holes in the second element set according to the element information of the inner layer signal layer and the drilling layer to obtain a third element set; acquiring all elements of the top-layer solder mask layer according to the element information of the top-layer solder mask layer to obtain a fourth element set; traversing the third element set, determining a fifth element set with an inclusion relation with the node element from the fourth element set according to the position of the node element when one node element is obtained through each traversal, and inserting a welding resistance element which is of a Pad type and contains the node element in the fifth element set into a first target element set; and carrying out array recognition on the first target element set, and placing the recognized elements into the first BGA set.
Specifically, as shown in fig. 2, all elements of the top signal layer may be obtained according to the element information of the top signal layer, and screening is performed under the following conditions: the element type is a Pad type and the element diameter is greater than the minimum diameter of the identified Pad and less than the maximum diameter of the identified Pad, such that a first set of elements may be obtained. And judging according to element information (such as hole positions) of the drilling layer to remove Pad elements intersecting with non-laser holes with non-VIA attribute in the first element set, so as to obtain a second element set. And judging according to the element information of the inner layer signal layer and the drilling layer to remove non-SMD Pad elements intersecting with the VIA holes in the second element set, thereby obtaining a third element set TopSignalActions. On the other hand, all elements of the top-layer solder mask can be obtained according to the element information of the top-layer solder mask, and a fourth element set TopMaskActions is obtained. And then traversing the third element set to obtain a node element SignalAction, and traversing the fourth element set according to the position of the node element, thereby obtaining a fifth element set PosMaskActions with an inclusion relation with the node element from the fourth element set. Then, traversing the fifth element set to obtain a mask action, and judging whether the element type of the mask element is the Pad type. If the type of the Pad is not the Pad type, directly continuing to traverse the next solder resist element of the fifth element set to judge, and simultaneously, if the traversing of the fifth element set is completed, continuing to traverse the next node element of the third element set to process. If the current element is of the Pad type, judging whether the current element contains a corresponding node element, if the current element does not contain the corresponding node element, directly continuing to traverse the next current element of the fifth element set to judge, and if the fifth element set is traversed, continuing to traverse the next node element of the third element set to process, if the current element is contained, inserting the current element into the first target element set PadActons for standby, then continuing to traverse the next current element of the fifth element set to judge, and if the fifth element set is traversed, continuing to traverse the next node element of the third element set to process. When the third element set is traversed, a final first target element set can be obtained, so that array identification can be performed on the first target element set, and the identified elements are placed into the first BGA set.
Further optionally, the performing array recognition on the first target element set, and placing the recognized element into the first BGA set includes: dividing elements in the first target element set according to the sizes, and sorting the elements with the same size through coordinates to obtain a first coordinate axis direction sorting table and a second coordinate axis direction sorting table; and aiming at each group of elements with the same size, according to the first coordinate axis direction sorting table and the second coordinate axis direction sorting table of the group of elements, if the number of the elements in the first coordinate axis direction is more than or equal to the array transverse minimum number, the number of the elements in the second coordinate axis direction is more than or equal to the array longitudinal minimum number, the element spacing in the first coordinate axis direction and the element spacing in the second coordinate axis direction are all between the minimum center distance between pads and the maximum center distance between pads, and the element spacing in the first coordinate axis direction and the element spacing in the second coordinate axis direction are all equal ratio spacing, putting the group of elements into the first BGA set.
Specifically, first, pad elements with the same size in the first target element set may be ordered by coordinates (X, Y), so as to obtain a first coordinate axis direction (X) ordered list and a second coordinate axis direction (Y) ordered list corresponding to each group of elements, where the coordinate axes may be set according to the arrangement direction of the Pad element array. Then, for a certain group of elements with the same size, whether the number of the elements in the first coordinate axis direction is larger than or equal to the array transverse minimum number can be judged according to the first coordinate axis direction sorting table of the group of elements, if not, the group of elements can be discarded, the next group of elements can be continuously traversed, if yes, whether the number of the elements in the second coordinate axis direction is larger than or equal to the array longitudinal minimum number can be continuously judged according to the second coordinate axis direction sorting table of the group of elements, if not, the group of elements can be discarded, the next group of elements can be continuously traversed, if yes, whether the element distances (the center distance between Pad and Pad) in the first coordinate axis direction and the second coordinate axis direction are both between the Pad minimum center distance and the Pad maximum center distance can be continuously judged, if not, the group of elements can be continuously judged, if not, the element distances in the first coordinate axis direction and the second coordinate axis direction are both equal to each other, and if not, the group of elements can be continuously traversed, and if not, the BGA group of elements can be continuously traversed.
On the basis of the above technical solution, optionally, the identifying the second BGA set of the bottom signal layer according to the element information of the bottom signal layer, the bottom solder mask layer, the inner signal layer, the drilling layer, and the preset identification parameter includes: screening all elements in the bottom signal layer according to the element information of the bottom signal layer to obtain a sixth element set with element types of Pad types and element diameters larger than the minimum diameter of the identification Pad and smaller than the maximum diameter of the identification Pad; removing Pad elements intersecting with non-laser holes with non-VIA attributes in the sixth element set according to the element information of the drilling layer to obtain a seventh element set; removing non-SMD Pad elements intersecting with the VIA holes in the seventh element set according to the element information of the inner layer signal layer and the drilling layer to obtain an eighth element set; acquiring all elements of the bottom layer solder mask layer according to the element information of the bottom layer solder mask layer to obtain a ninth element set; traversing the eighth element set, determining a tenth element set with an inclusion relation with the node element from the ninth element set according to the position of the node element when one node element is obtained through each traversal, and inserting a welding resistance element which is of a Pad type and contains the node element in the tenth element set into a second target element set; and carrying out array recognition on the second target element set, and placing the recognized elements into the second BGA set. Specifically, the BGA identification process of the bottom signal layer is similar to that of the top signal layer, and only relevant data used in the BGA identification process of the top signal layer need to be replaced correspondingly, for example, element information of the top signal layer and element information of the top solder mask layer are replaced correspondingly by the element information of the bottom signal layer and the element information of the bottom solder mask layer, and finally, a second BGA set of the bottom signal layer is obtained through identification.
Further optionally, the performing array recognition on the second target element set, and placing the recognized element into the second BGA set includes: dividing elements in the second target element set according to the sizes, and sorting the elements with the same size through coordinates to obtain a third coordinate axis direction sorting table and a fourth coordinate axis direction sorting table; and for each group of elements with the same size, according to the third coordinate axis direction sorting table and the fourth coordinate axis direction sorting table of the group of elements, if the number of elements in the third coordinate axis direction is more than or equal to the transverse minimum number of the array, the number of elements in the fourth coordinate axis direction is more than or equal to the longitudinal minimum number of the array, the element spacing in the third coordinate axis direction and the element spacing in the fourth coordinate axis direction are all between the minimum center distance between pads and the maximum center distance between pads, and the element spacing in the third coordinate axis direction and the element spacing in the fourth coordinate axis direction are all equal ratio spacing, placing the group of elements into the second BGA set. Specifically, the array recognition process for the second target element set is similar to the array recognition process for the first target element set, and will not be described here again, wherein the third coordinate axis direction may be the same as the first coordinate axis direction (X), and the fourth coordinate axis direction may be the same as the second coordinate axis direction (Y).
According to the technical scheme provided by the embodiment of the invention, element information of a top signal layer, a top solder mask layer, an inner signal layer, a drilling layer, a bottom signal layer and a bottom solder mask layer in a Gerber file is firstly obtained, then a first BGA set of the top signal layer is identified according to the element information of the top signal layer, the top solder mask layer, the inner signal layer and the drilling layer and preset identification parameters, and a second BGA set of the bottom signal layer is identified according to the element information of the bottom signal layer, the bottom solder mask layer, the inner signal layer and the drilling layer and preset identification parameters, so that a final identified target BGA set is determined according to the first BGA set and the second BGA set. Therefore, the automatic identification of the BGA attribute is realized, and the identification accuracy and the identification efficiency are improved.
Example two
Fig. 3 is a schematic structural diagram of a BGA automatic identification device based on a Gerber file according to a second embodiment of the present invention, where the device may be implemented in hardware and/or software, and may be generally integrated in a computer device, for executing the BGA automatic identification method based on a Gerber file according to any embodiment of the present invention. As shown in fig. 3, the apparatus includes:
the element information obtaining module 31 is configured to obtain element information of a top signal layer, a top solder mask layer, an inner signal layer, a drilling layer, a bottom signal layer, and a bottom solder mask layer in the Gerber file;
A top signal layer BGA identification module 32, configured to identify a first BGA set of the top signal layer according to element information of the top signal layer, the top solder mask layer, the inner signal layer, and the drilling layer, and preset identification parameters;
a bottom signal layer BGA identification module 33, configured to identify a second BGA set of the bottom signal layer according to element information of the bottom signal layer, the bottom solder mask layer, the inner signal layer, and the drilling layer, and the preset identification parameter;
a target BGA set determination module 34 for determining a final identified target BGA set from the first and second BGA sets.
According to the technical scheme provided by the embodiment of the invention, element information of a top signal layer, a top solder mask layer, an inner signal layer, a drilling layer, a bottom signal layer and a bottom solder mask layer in a Gerber file is firstly obtained, then a first BGA set of the top signal layer is identified according to the element information of the top signal layer, the top solder mask layer, the inner signal layer and the drilling layer and preset identification parameters, and a second BGA set of the bottom signal layer is identified according to the element information of the bottom signal layer, the bottom solder mask layer, the inner signal layer and the drilling layer and preset identification parameters, so that a final identified target BGA set is determined according to the first BGA set and the second BGA set. Therefore, the automatic identification of the BGA attribute is realized, and the identification accuracy and the identification efficiency are improved.
On the basis of the above technical solution, optionally, the preset identification parameters include: the minimum number of arrays in the transverse direction, the minimum number of arrays in the longitudinal direction, the minimum diameter of identified pads, the maximum diameter of identified pads, the minimum center distance between pads, and the maximum center distance between pads.
Based on the above technical solution, optionally, the top signal layer BGA identification module 32 includes:
the first element set determining unit is used for screening all elements in the top signal layer according to the element information of the top signal layer to obtain a first element set with element types of Pad types and element diameters larger than the minimum diameter of the identification Pad and smaller than the maximum diameter of the identification Pad;
the second element set determining unit is used for removing Pad elements intersecting with non-laser holes with non-VIA attributes in the first element set according to the element information of the drilling layer to obtain a second element set;
a third element set determining unit, configured to remove non-SMD Pad elements intersecting with VIA holes in the second element set according to element information of the inner layer signal layer and the drilling layer, to obtain a third element set;
a fourth element set determining unit, configured to obtain all elements of the top solder mask layer according to element information of the top solder mask layer, to obtain a fourth element set;
The first target element set construction unit is used for traversing the third element set, determining a fifth element set with an inclusion relation with the node element from the fourth element set according to the position of the node element when one node element is obtained through each traversing, and inserting a welding resistance element which is of a Pad type and contains the node element in the fifth element set into the first target element set;
and the first array recognition unit is used for carrying out array recognition on the first target element set and placing the recognized elements into the first BGA set.
On the basis of the above technical solution, optionally, the first array recognition unit includes:
the first element sorting subunit is used for dividing the elements in the first target element set according to the sizes, and sorting the elements with the same size through coordinates to obtain a first coordinate axis direction sorting table and a second coordinate axis direction sorting table;
and the first element judgment subunit is configured to, for each group of elements with the same size, place the group of elements into the first BGA set according to the first coordinate axis direction sorting table and the second coordinate axis direction sorting table, if the number of elements in the first coordinate axis direction is greater than or equal to the array transverse minimum number, the number of elements in the second coordinate axis direction is greater than or equal to the array longitudinal minimum number, the element spacing in the first coordinate axis direction and the element spacing in the second coordinate axis direction are both between the minimum center distance between the pads and the maximum center distance between the pads, and the element spacing in the first coordinate axis direction and the element spacing in the second coordinate axis direction are both equal ratio spacing.
Based on the above technical solution, optionally, the BGA identification module 33 of the bottom signal layer includes:
a sixth element set determining unit, configured to screen all elements in the bottom layer signal layer according to element information of the bottom layer signal layer, so as to obtain a sixth element set with element types being Pad types, and element diameters being greater than the minimum diameter of the identified Pad and less than the maximum diameter of the identified Pad;
a seventh element set determining unit, configured to remove, according to element information of the drilling layer, pad elements intersecting with non-laser holes with non-VIA attributes in the sixth element set, to obtain a seventh element set;
an eighth element set determining unit, configured to remove non-SMD Pad elements intersecting with the VIA hole in the seventh element set according to element information of the inner layer signal layer and the drilling layer, to obtain an eighth element set;
a ninth element set determining unit, configured to obtain all elements of the bottom layer solder mask layer according to element information of the bottom layer solder mask layer, to obtain a ninth element set;
a second target element set construction unit, configured to traverse the eighth element set, determine, according to a position of a node element, a tenth element set having a containment relationship with the node element from the ninth element set, and insert a solder resist element having a Pad type element type and containing the node element in the tenth element set into the second target element set when one node element is obtained by each traversal;
And the second array recognition unit is used for carrying out array recognition on the second target element set and placing the recognized elements into the second BGA set.
On the basis of the above technical solution, optionally, the second array identification unit includes:
the second element sorting subunit is used for dividing the elements in the second target element set according to the size, and sorting the elements with the same size through coordinates to obtain a third coordinate axis direction sorting table and a fourth coordinate axis direction sorting table;
and the second element judgment subunit is configured to, for each group of elements with the same size, place the group of elements into the second BGA set according to the third coordinate axis direction sorting table and the fourth coordinate axis direction sorting table of the group of elements, if the number of elements in the third coordinate axis direction is greater than or equal to the array transverse minimum number, the number of elements in the fourth coordinate axis direction is greater than or equal to the array longitudinal minimum number, the element spacing in the third coordinate axis direction and the element spacing in the fourth coordinate axis direction are both between the minimum center distance between the pads and the maximum center distance between the pads, and the element spacing in the third coordinate axis direction and the element spacing in the fourth coordinate axis direction are both equal ratio spacing.
Based on the technical scheme, optionally, the number of the transverse minimum arrays is 3, the number of the longitudinal minimum arrays is 3, the minimum diameter of the identification Pad is 6 mils, the maximum diameter of the identification Pad is 40 mils, the minimum center distance between the pads is 12 mils, and the maximum center distance between the pads is 60 mils.
The automatic BGA recognition device based on the Gerber file provided by the embodiment of the invention can execute the automatic BGA recognition method based on the Gerber file provided by any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the execution method.
It should be noted that, in the above embodiment of the BGA automatic identification device based on the Gerber file, each unit and module included are only divided according to the functional logic, but not limited to the above division, as long as the corresponding functions can be implemented; in addition, the specific names of the functional units are also only for distinguishing from each other, and are not used to limit the protection scope of the present invention.
Example III
Fig. 4 is a schematic structural diagram of a computer device provided in a third embodiment of the present invention, and shows a block diagram of an exemplary computer device suitable for implementing an embodiment of the present invention. The computer device shown in fig. 4 is only an example and should not be construed as limiting the functionality and scope of use of embodiments of the invention. As shown in fig. 4, the computer apparatus includes a processor 41, a memory 42, an input device 43, and an output device 44; the number of processors 41 in the computer device may be one or more, in fig. 4, one processor 41 is taken as an example, and the processors 41, the memory 42, the input device 43 and the output device 44 in the computer device may be connected by a bus or other means, in fig. 4, by a bus connection is taken as an example.
The memory 42 is used as a computer readable storage medium, and may be used to store a software program, a computer executable program, and modules, such as program instructions/modules corresponding to the Gerber file-based BGA automatic identification method in the embodiment of the present invention (for example, the element information acquisition module 31, the top signal layer BGA identification module 32, the bottom signal layer BGA identification module 33, and the target BGA set determination module 34 in the Gerber file-based BGA automatic identification device). The processor 41 executes various functional applications of the computer device and data processing by running software programs, instructions and modules stored in the memory 42, i.e., implements the above-described Gerber file-based BGA automatic identification method.
The memory 42 may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, at least one application program required for functions; the storage data area may store data created according to the use of the computer device, etc. In addition, memory 42 may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid-state storage device. In some examples, memory 42 may further comprise memory located remotely from processor 41, which may be connected to the computer device via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The input means 43 may be used to obtain the desired Gerber file, and to generate key signal inputs related to user settings and function controls of the computer device, etc. The output device 44 may be used to present the final recognition result to the user, etc.
Example IV
A fourth embodiment of the present invention also provides a storage medium containing computer-executable instructions, which when executed by a computer processor, are for performing a Gerber file-based BGA automatic identification method, the method comprising:
acquiring element information of a top signal layer, a top solder mask layer, an inner signal layer, a drilling layer, a bottom signal layer and a bottom solder mask layer in a Gerber file;
identifying a first BGA set of the top signal layer according to the element information of the top signal layer, the top solder mask layer, the inner signal layer and the drilling layer and preset identification parameters;
identifying a second BGA set of the bottom signal layer according to the element information of the bottom signal layer, the bottom solder mask layer, the inner signal layer and the drilling layer and the preset identification parameters;
and determining a target BGA set finally identified according to the first BGA set and the second BGA set.
The storage medium may be any of various types of memory devices or storage devices. The term "storage medium" is intended to include: mounting media such as CD-ROM, floppy disk or tape devices; computer system memory or random access memory such as DRAM, DDR RAM, SRAM, EDO RAM, lanbus (Rambus) RAM, etc.; nonvolatile memory such as flash memory, magnetic media (e.g., hard disk or optical storage); registers or other similar types of memory elements, etc. The storage medium may also include other types of memory or combinations thereof. In addition, the storage medium may be located in a computer system in which the program is executed, or may be located in a different second computer system connected to the computer system through a network (such as the internet). The second computer system may provide program instructions to the computer for execution. The term "storage medium" may include two or more storage media that may reside in different locations (e.g., in different computer systems connected by a network). The storage medium may store program instructions (e.g., embodied as a computer program) executable by one or more processors.
Of course, the storage medium containing the computer executable instructions provided in the embodiments of the present invention is not limited to the above-described method operations, and may also perform the related operations in the Gerber file-based BGA automatic identification method provided in any embodiment of the present invention.
The computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, either in baseband or as part of a carrier wave. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination of the foregoing. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.
Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
From the above description of embodiments, it will be clear to a person skilled in the art that the present invention may be implemented by means of software and necessary general purpose hardware, but of course also by means of hardware, although in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art in the form of a software product, which may be stored in a computer readable storage medium, such as a floppy disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a FLASH Memory (FLASH), a hard disk or an optical disk of a computer, etc., and include several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method according to the embodiments of the present invention.
Note that the above is only a preferred embodiment of the present invention and the technical principle applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, while the invention has been described in connection with the above embodiments, the invention is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the invention, which is set forth in the following claims.
Claims (10)
1. A Gerber file-based BGA automatic identification method is characterized by comprising the following steps:
acquiring element information of a top signal layer, a top solder mask layer, an inner signal layer, a drilling layer, a bottom signal layer and a bottom solder mask layer in a Gerber file;
identifying a first BGA set of the top signal layer according to the element information of the top signal layer, the top solder mask layer, the inner signal layer and the drilling layer and preset identification parameters;
identifying a second BGA set of the bottom signal layer according to the element information of the bottom signal layer, the bottom solder mask layer, the inner signal layer and the drilling layer and the preset identification parameters;
And determining a target BGA set finally identified according to the first BGA set and the second BGA set.
2. The Gerber file-based BGA automatic identification method of claim 1, wherein the preset identification parameters include: the minimum number of arrays in the transverse direction, the minimum number of arrays in the longitudinal direction, the minimum diameter of identified pads, the maximum diameter of identified pads, the minimum center distance between pads, and the maximum center distance between pads.
3. The method for automatically identifying BGA based on Gerber file according to claim 2, wherein identifying the first BGA set of the top signal layer according to the element information of the top signal layer, the top solder mask layer, the inner signal layer and the drill hole layer and the preset identification parameter comprises:
screening all elements in the top signal layer according to the element information of the top signal layer to obtain a first element set with element types of Pad types and element diameters larger than the minimum diameter of the identification Pad and smaller than the maximum diameter of the identification Pad;
removing Pad elements intersecting with non-laser holes with non-VIA attributes in the first element set according to the element information of the drilling layer to obtain a second element set;
Removing non-SMD Pad elements intersecting with the VIA holes in the second element set according to the element information of the inner layer signal layer and the drilling layer to obtain a third element set;
acquiring all elements of the top-layer solder mask layer according to the element information of the top-layer solder mask layer to obtain a fourth element set;
traversing the third element set, determining a fifth element set with an inclusion relation with the node element from the fourth element set according to the position of the node element when one node element is obtained through each traversal, and inserting a welding resistance element which is of a Pad type and contains the node element in the fifth element set into a first target element set;
and carrying out array recognition on the first target element set, and placing the recognized elements into the first BGA set.
4. The Gerber file-based BGA automatic identification method of claim 3, wherein the performing array identification on the first target element set and placing the identified elements into the first BGA set includes:
dividing elements in the first target element set according to the sizes, and sorting the elements with the same size through coordinates to obtain a first coordinate axis direction sorting table and a second coordinate axis direction sorting table;
And aiming at each group of elements with the same size, according to the first coordinate axis direction sorting table and the second coordinate axis direction sorting table of the group of elements, if the number of the elements in the first coordinate axis direction is more than or equal to the array transverse minimum number, the number of the elements in the second coordinate axis direction is more than or equal to the array longitudinal minimum number, the element spacing in the first coordinate axis direction and the element spacing in the second coordinate axis direction are all between the minimum center distance between pads and the maximum center distance between pads, and the element spacing in the first coordinate axis direction and the element spacing in the second coordinate axis direction are all equal ratio spacing, putting the group of elements into the first BGA set.
5. The method for automatically identifying a BGA based on a Gerber file according to claim 2, wherein the identifying the second BGA set of the underlying signal layer according to the element information of the underlying signal layer, the underlying solder mask layer, the inner signal layer and the drill hole layer and the preset identification parameter comprises:
screening all elements in the bottom signal layer according to the element information of the bottom signal layer to obtain a sixth element set with element types of Pad types and element diameters larger than the minimum diameter of the identification Pad and smaller than the maximum diameter of the identification Pad;
Removing Pad elements intersecting with non-laser holes with non-VIA attributes in the sixth element set according to the element information of the drilling layer to obtain a seventh element set;
removing non-SMD Pad elements intersecting with the VIA holes in the seventh element set according to the element information of the inner layer signal layer and the drilling layer to obtain an eighth element set;
acquiring all elements of the bottom layer solder mask layer according to the element information of the bottom layer solder mask layer to obtain a ninth element set;
traversing the eighth element set, determining a tenth element set with an inclusion relation with the node element from the ninth element set according to the position of the node element when one node element is obtained through each traversal, and inserting a welding resistance element which is of a Pad type and contains the node element in the tenth element set into a second target element set;
and carrying out array recognition on the second target element set, and placing the recognized elements into the second BGA set.
6. The Gerber file-based BGA automatic identification method of claim 5, wherein the performing array identification on the second target element set and placing the identified elements into the second BGA set includes:
Dividing elements in the second target element set according to the sizes, and sorting the elements with the same size through coordinates to obtain a third coordinate axis direction sorting table and a fourth coordinate axis direction sorting table;
and for each group of elements with the same size, according to the third coordinate axis direction sorting table and the fourth coordinate axis direction sorting table of the group of elements, if the number of elements in the third coordinate axis direction is more than or equal to the transverse minimum number of the array, the number of elements in the fourth coordinate axis direction is more than or equal to the longitudinal minimum number of the array, the element spacing in the third coordinate axis direction and the element spacing in the fourth coordinate axis direction are all between the minimum center distance between pads and the maximum center distance between pads, and the element spacing in the third coordinate axis direction and the element spacing in the fourth coordinate axis direction are all equal ratio spacing, placing the group of elements into the second BGA set.
7. The Gerber file based BGA automatic identification method of claim 2, wherein the minimum number of arrays is 3 in a lateral direction, the minimum number of arrays is 3 in a longitudinal direction, the minimum diameter of the identification Pad is 6 mils, the maximum diameter of the identification Pad is 40 mils, the minimum center-to-center distance between pads is 12 mils, and the maximum center-to-center distance between pads is 60 mils.
8. A Gerber file-based BGA automatic identification apparatus comprising:
the element information acquisition module is used for acquiring element information of a top signal layer, a top solder mask layer, an inner signal layer, a drilling layer, a bottom signal layer and a bottom solder mask layer in the Gerber file;
the top signal layer BGA identification module is used for identifying a first BGA set of the top signal layer according to the element information of the top signal layer, the top solder mask layer, the inner signal layer and the drilling layer and preset identification parameters;
the bottom signal layer BGA identification module is used for identifying a second BGA set of the bottom signal layer according to the element information of the bottom signal layer, the bottom solder mask layer, the inner signal layer and the drilling layer and the preset identification parameters;
and the target BGA set determining module is used for determining a target BGA set finally identified according to the first BGA set and the second BGA set.
9. A computer device, comprising:
one or more processors;
a memory for storing one or more programs;
the one or more programs, when executed by the one or more processors, cause the one or more processors to implement the Gerber file-based BGA automatic identification method of any one of claims 1-7.
10. A computer-readable storage medium having stored thereon a computer program, which when executed by a processor implements the Gerber file-based BGA automatic identification method according to any one of claims 1 to 7.
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| CN202311196663.0A CN117252002A (en) | 2023-09-15 | 2023-09-15 | Gerber file-based BGA automatic identification method and device |
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| CN202311196663.0A CN117252002A (en) | 2023-09-15 | 2023-09-15 | Gerber file-based BGA automatic identification method and device |
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