CN105792532B - A kind of tear system of selection and PCB - Google Patents

A kind of tear system of selection and PCB Download PDF

Info

Publication number
CN105792532B
CN105792532B CN201610301319.7A CN201610301319A CN105792532B CN 105792532 B CN105792532 B CN 105792532B CN 201610301319 A CN201610301319 A CN 201610301319A CN 105792532 B CN105792532 B CN 105792532B
Authority
CN
China
Prior art keywords
tear
cabling
drop shape
impedance
target
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201610301319.7A
Other languages
Chinese (zh)
Other versions
CN105792532A (en
Inventor
李永翠
武宁
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Inspur Electronic Information Industry Co Ltd
Original Assignee
Inspur Electronic Information Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Inspur Electronic Information Industry Co Ltd filed Critical Inspur Electronic Information Industry Co Ltd
Priority to CN201610301319.7A priority Critical patent/CN105792532B/en
Publication of CN105792532A publication Critical patent/CN105792532A/en
Application granted granted Critical
Publication of CN105792532B publication Critical patent/CN105792532B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0002Apparatus or processes for manufacturing printed circuits for manufacturing artworks for printed circuits
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/20Design optimisation, verification or simulation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • H05K1/025Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0005Apparatus or processes for manufacturing printed circuits for designing circuits by computer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/07Electric details
    • H05K2201/0776Resistance and impedance
    • H05K2201/0784Uniform resistance, i.e. equalizing the resistance of a number of conductors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Structure Of Printed Boards (AREA)
  • Testing Electric Properties And Detecting Electric Faults (AREA)

Abstract

The present invention provides a kind of tear system of selection and PCB, including:Determine the impedance of the cabling of required arrangement on PCB layout layer;At least two shapes of the tear of arrangement needed for obtaining;According to the impedance of cabling, respectively for each shape tear into line link impedance emulation;By in simulation result by the link impedance target tear-drop shape of corresponding tear-drop shape alternatively when most smooth;The corresponding tear of target tear-drop shape is arranged on the cabling of PCB layout layer.According to such scheme, by at least two shapes for getting tear, emulation according to the impedance of cabling to the tear of each shape into line link impedance, in order to ensure the less appearance resonance point of link impedance, the target tear-drop shape of corresponding tear-drop shape alternatively when link impedance should be selected most smooth, to be arranged using the corresponding tear of target tear-drop shape, so as to reduce influence of the tear to the impedance continuity of cabling.

Description

A kind of tear system of selection and PCB
Technical field
The present invention relates to technical field of integrated circuits, more particularly to a kind of tear system of selection and PCB (Printed Circuit Board, printed circuit board).
Background technology
With the arrival of cloud computing era, server quickly grows emergence, in the motherboard design of server, signal Speed is higher and higher, and high speed signal is also constantly lifting the demand of signal integrity.
In server master board design, in order to make pad firmer, pad and conducting wire is separated when preventing mechanical making sheet, Often a transition region is arranged with copper film, be referred to as tear between the pads and wires.
Since the shape of tear is varied, tear of different shapes is arranged between the pads and wires, it is to cabling The influence of impedance continuity is different, therefore, how to select the tear of suitable shape, becomes urgent problem.
The content of the invention
An embodiment of the present invention provides a kind of tear system of selection and PCB, to select the tear of suitable shape.
In a first aspect, an embodiment of the present invention provides a kind of tear system of selection, including:
Determine the impedance of the cabling of required arrangement on PCB layout layer;
At least two shapes of the tear of arrangement needed for obtaining;
According to the impedance of the cabling, respectively for each shape tear into line link impedance emulation;
By in simulation result by the link impedance target tear-drop shape of corresponding tear-drop shape alternatively when most smooth;
The corresponding tear of the target tear-drop shape is arranged on the cabling of PCB layout layer.
Preferably, at least two shapes of the tear include:It is square and circular.
Preferably, selection the target tear-drop shape for it is square when, it is described by the target tear-drop shape correspond to Tear be arranged on the cabling of PCB layout layer before, further comprise:
Calculate the length and width of square tear;Performed according to the length and width described by the target tear-drop shape pair The tear answered is arranged on the cabling of PCB layout layer;
The length of square tear is calculated by equation below:
L=o+s+e+a
Wherein, L is used for the length for characterizing square tear, and o is used for the unilateral size for characterizing solder mask windowing, and s is used to characterize Welding resistance aligning accuracy, e are used for the etch quantity for characterizing outer-layer circuit, and a is used to characterize safe clearance;
The width of square tear is calculated by equation below:
W=e+u+m
Wherein, W is used for the width for characterizing square tear, and e is used for the etch quantity for characterizing outer-layer circuit, and u is used to characterize microetch Amount, m are used to characterize junction line width minimum value.
Preferably, selection the target tear-drop shape for circle when, it is described by the target tear-drop shape correspond to Tear be arranged on the cabling of PCB layout layer before, further comprise:
Calculate the diameter of circular tear;Performed according to the diameter described by the corresponding tear arrangement of the target tear-drop shape On the cabling of PCB layout layer;
The diameter of circular tear is calculated by equation below:
R=[e+u+m, o+s+e+a]
Wherein, o is used for the unilateral size for characterizing solder mask windowing, and s is used to characterize welding resistance aligning accuracy, and e is used to characterize outer The etch quantity of sandwich circuit, a are used to characterize safe clearance;U is used to characterize microetch amount, and m is used to characterize junction line width minimum value.
Preferably, a values are 2mil-3mil;M values are 4mil.
Preferably,
When the impedance of the cabling is 100ohm, the target tear-drop shape is circle;
Preferably,
When the impedance of the cabling is 90ohm, the target tear-drop shape is square.
Second aspect, the embodiment of the present invention additionally provide a kind of PCB, using any of the above-described tear selecting party The tear of the tear-drop shape arrangement of method selection.
An embodiment of the present invention provides a kind of tear system of selection and PCB, by getting at least two shapes of tear, Emulation according to the impedance of cabling to the tear of each shape into line link impedance, in order to ensure that the less of link impedance goes out Existing resonance point, it should the target tear-drop shape of corresponding tear-drop shape alternatively when selecting link impedance most smooth, to utilize The corresponding tear of target tear-drop shape is arranged, so as to reduce influence of the tear to the impedance continuity of cabling.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing There is attached drawing needed in technology description to be briefly described, it should be apparent that, drawings in the following description are the present invention Some embodiments, for those of ordinary skill in the art, without creative efforts, can also basis These attached drawings obtain other attached drawings.
Fig. 1 is a kind of method flow diagram provided by one embodiment of the present invention;
Fig. 2 is another method flow diagram provided by one embodiment of the present invention;
Fig. 3 is the emulation signal that the cabling provided by one embodiment of the present invention to 100ohm carries out different tear-drop shapes Figure;
Fig. 4 is the emulation schematic diagram that the cabling provided by one embodiment of the present invention to 90ohm carries out different tear-drop shapes;
Fig. 5 is the schematic diagram of the square tear of arrangement provided by one embodiment of the present invention;
Fig. 6 is the schematic diagram of the circular tear of arrangement provided by one embodiment of the present invention.
Embodiment
To make the purpose, technical scheme and advantage of the embodiment of the present invention clearer, below in conjunction with the embodiment of the present invention In attached drawing, the technical solution in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is Part of the embodiment of the present invention, instead of all the embodiments, based on the embodiments of the present invention, those of ordinary skill in the art The all other embodiments obtained on the premise of creative work is not made, belong to the scope of protection of the invention.
As shown in Figure 1, an embodiment of the present invention provides a kind of tear system of selection, this method may comprise steps of:
Step 101:Determine the impedance of the cabling of required arrangement on PCB layout layer;
Step 102:At least two shapes of the tear of arrangement needed for obtaining;
Step 103:According to the impedance of the cabling, respectively for tear the imitating into line link impedance of each shape Very;
Step 104:By in simulation result by the link impedance target tear of corresponding tear-drop shape alternatively when most smooth Drip shape;
Step 105:The corresponding tear of the target tear-drop shape is arranged on the cabling of PCB layout layer.
According to such scheme, by getting at least two shapes of tear, according to the impedance of cabling to each shape Tear into line link impedance emulation, in order to ensure the less appearance resonance point of link impedance, it should select link impedance The target tear-drop shape of corresponding tear-drop shape alternatively when most smooth, with using the corresponding tear of target tear-drop shape into Row arrangement, so as to reduce influence of the tear to the impedance continuity of cabling.
In an embodiment of the invention, the shape of tear can include at least two, wherein, which can With including:It is square and circular.
In an embodiment of the invention, the size for tear is also required to meet that certain condition just can be with otherwise Size can not be realized when smaller its it is original avoid contact with the function of disconnecting, size is larger, other components may be caused Influence.Therefore,
In an embodiment of the invention, selection the target tear-drop shape for it is square when, described by the mesh Before the corresponding tear of mark tear-drop shape is arranged on the cabling of PCB layout layer, further comprise:
Calculate the length and width of square tear;Performed according to the length and width described by the target tear-drop shape pair The tear answered is arranged on the cabling of PCB layout layer;
The length of square tear is calculated by equation below:
L=o+s+e+a
Wherein, L is used for the length for characterizing square tear, and o is used for the unilateral size for characterizing solder mask windowing, and s is used to characterize Welding resistance aligning accuracy, e are used for the etch quantity for characterizing outer-layer circuit, and a is used to characterize safe clearance;
The width of square tear is calculated by equation below:
W=e+u+m
Wherein, W is used for the width for characterizing square tear, and e is used for the etch quantity for characterizing outer-layer circuit, and u is used to characterize microetch Amount, m are used to characterize junction line width minimum value.
In an embodiment of the invention, selection the target tear-drop shape for circle when, described by the mesh Before the corresponding tear of mark tear-drop shape is arranged on the cabling of PCB layout layer, further comprise:
Calculate the diameter of circular tear;Performed according to the diameter described by the corresponding tear arrangement of the target tear-drop shape On the cabling of PCB layout layer;
The diameter of circular tear is calculated by equation below:
R=[e+u+m, o+s+e+a]
Wherein, o is used for the unilateral size for characterizing solder mask windowing, and s is used to characterize welding resistance aligning accuracy, and e is used to characterize outer The etch quantity of sandwich circuit, a are used to characterize safe clearance;U is used to characterize microetch amount, and m is used to characterize junction line width minimum value.
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with the accompanying drawings and specific embodiment is to this Invention is described in further detail.
As shown in Fig. 2, an embodiment of the present invention provides a kind of tear system of selection, this method may comprise steps of:
Step 201:Determine the impedance of the cabling of required arrangement on PCB layout layer, 100ohm and 90ohm.
Since the impedance of cabling is different, the shape of the tear of possible required selection is different, therefore, can be with 100ohm impedances Cabling and the cablings of 90ohm impedances illustrate respectively.
In an embodiment of the invention, in order to ensure accurately selecting, it is necessary to ensure in cabling for the tear of suitable shape Impedance is different and is carried out in the case of other conditions all same.For example, after line impedence is determined away, determine to be mended on cabling The position of tear is identical.
Tear is the drop load degree of taking over of pad and conducting wire either between conducting wire and guide hole.Set tear purpose be When circuit board is collided be subject to huge external force, when avoiding the circuit board from being collided be subject to huge external force, conducting wire and pad or conducting wire Disconnected with the contact point of guide hole, also PCB circuit board can be made to seem more beautiful.And the position of tear can connected up according to cabling Wiring on layer determines.
Step 202:Two kinds of shapes of the tear of arrangement needed for obtaining:It is square and circular.
In the present embodiment, the shape of tear can also include polygon, irregular shape etc., wherein, for square and circle The tear of shape can be more convenient and beautiful when mending tear on circuit boards, therefore, is illustrated exemplified by square and is circular.
Step 203:According to the cabling of different impedances, respectively for square tear and circular tear into the imitative of line link impedance Very.
In the present embodiment, when being emulated, link impedance that can be at the same time to no tear cabling emulates, with true Surely there is tear and influence during without tear to link impedance.
It can be needed to do following emulation according to above-mentioned cabling and tear-drop shape below:
1st, the link impedance for carrying out no tear, square tear and circular tear respectively to the cabling that impedance is 100ohm is imitated Very.
2nd, the link impedance for carrying out no tear, square tear and circular tear respectively to the cabling that impedance is 90ohm emulates.
For above-mentioned emulation 1, simulation result please refers to Fig.3, and can be known according to the simulation result:
When no tear designs, its link impedance there are larger resonance point, therefore, have tear design relative to adacrya Drop design, the influence to link impedance are smaller;
Understood for the design of square tear and circular tear design, when the impedance of cabling is 100ohm, circular tear phase For square tear, the influence to link impedance is smaller.
For above-mentioned emulation 1, following result is drawn:When the impedance of cabling is 100ohm, the target tear-drop shape of selection For circle.
For above-mentioned emulation 2, simulation result please refers to Fig.4, and can be known according to the simulation result:
When no tear designs, its link impedance there are larger resonance point, therefore, have tear design relative to adacrya Drop design, the influence to link impedance are smaller;
Understand that, when the impedance of cabling is 90ohm, square tear is opposite for the design of square tear and circular tear design It is smaller in circular tear, the influence to link impedance.
For above-mentioned emulation 2, following result is drawn:When the impedance of cabling is 90ohm, the target tear-drop shape of selection for It is square.
Step 204:By the simulation result link impedance target tear of corresponding tear-drop shape alternatively when most smooth Shape, when target tear-drop shape is square, performs step 205;When target tear-drop shape is circular, step 207 is performed.
It is also required to meet that certain condition just can be can not realize that its is former when otherwise size is smaller for the size of tear Have and avoid contact with a function of disconnecting, size is larger, other components may be impacted.Therefore, it is necessary to tear Size needs to be defined.
Step 205:Calculate the length and width of square tear.
In the present embodiment, the length and width of square tear can be calculated in the following way:
The length of square tear is calculated by equation below:
L=o+s+e+a (1)
Wherein, L is used for the length for characterizing square tear, and o is used for the unilateral size for characterizing solder mask windowing, and s is used to characterize Welding resistance aligning accuracy, e are used for the etch quantity for characterizing outer-layer circuit, and a is used to characterize safe clearance;
The width of square tear is calculated by equation below:
W=e+u+m (1)
Wherein, W is used for the width for characterizing square tear, and e is used for the etch quantity for characterizing outer-layer circuit, and u is used to characterize microetch Amount, m are used to characterize junction line width minimum value.
Wherein, a values can be 2mil-3mil;M values can be 4mil.
Step 206:According to the length and width, square tear is arranged on the cabling of PCB layout layer, terminated.
Fig. 5 is refer to, the schematic diagram being arranged in for square tear on cabling and via.
Step 207:Calculate the diameter of circular tear.
In the present embodiment, the diameter of circular tear can be calculated in the following way:
The diameter of circular tear is calculated by equation below:
R=[e+u+m, o+s+e+a] (3)
Wherein, o is used for the unilateral size for characterizing solder mask windowing, and s is used to characterize welding resistance aligning accuracy, and e is used to characterize outer The etch quantity of sandwich circuit, a are used to characterize safe clearance;U is used to characterize microetch amount, and m is used to characterize junction line width minimum value.
Wherein, a values can be 2mil-3mil;M values can be 4mil.
Step 208:According to the diameter, circular tear is arranged on the cabling of PCB layout layer, terminated.
Fig. 6 is refer to, the schematic diagram being arranged in for circular tear on cabling and via.
The embodiment of the present invention additionally provides a kind of PCB, including:Utilize any tear selecting party in above-described embodiment The tear of the tear-drop shape arrangement of method selection.
In conclusion each embodiment of the present invention can at least realize following beneficial effect:
1st, in embodiments of the present invention, by getting at least two shapes of tear, according to the impedance of cabling to each The tear of shape is planted into the emulation of line link impedance, in order to ensure the less appearance resonance point of link impedance, it should select chain The target tear-drop shape of corresponding tear-drop shape alternatively when roadlock resists most smooth, with corresponding using the target tear-drop shape Tear is arranged, so as to reduce influence of the tear to the impedance continuity of cabling.
2nd, in embodiments of the present invention, by calculating its size for tear of different shapes, meet its size certain Condition, prevent it is undersized can not realize its it is original avoid contact with the function of disconnecting, it is oversized that other components are caused The problem of influence.
The contents such as the information exchange between each unit, implementation procedure in above device, due to implementing with the method for the present invention Example is based on same design, and particular content can be found in the narration in the method for the present invention embodiment, and details are not described herein again.
It should be noted that herein, such as first and second etc relational terms are used merely to an entity Or operation is distinguished with another entity or operation, is existed without necessarily requiring or implying between these entities or operation Any actual relationship or order.Moreover, term " comprising ", "comprising" or its any other variant be intended to it is non- It is exclusive to include, so that process, method, article or equipment including a series of elements not only include those key elements, But also including other elements that are not explicitly listed, or further include solid by this process, method, article or equipment Some key elements.In the absence of more restrictions, the key element limited by sentence " including one ", is not arranged Except in the process, method, article or apparatus that includes the element also in the presence of other identical factor.
One of ordinary skill in the art will appreciate that:Realizing all or part of step of above method embodiment can pass through The relevant hardware of programmed instruction is completed, and foregoing program can be stored in computer-readable storage medium, the program Upon execution, the step of execution includes above method embodiment;And foregoing storage medium includes:ROM, RAM, magnetic disc or light Disk etc. is various can be with the medium of store program codes.
It is last it should be noted that:The foregoing is merely presently preferred embodiments of the present invention, is merely to illustrate skill of the invention Art scheme, is not intended to limit the scope of the present invention.Any modification for being made within the spirit and principles of the invention, Equivalent substitution, improvement etc., are all contained in protection scope of the present invention.

Claims (9)

  1. A kind of 1. tear system of selection, it is characterised in that including:
    Determine the impedance of the cabling of required arrangement on PCB layout layer;
    At least two shapes of the tear of arrangement needed for obtaining;
    According to the impedance of the cabling, respectively for each shape tear into line link impedance emulation;
    By in simulation result by the link impedance target tear-drop shape of corresponding tear-drop shape alternatively when most smooth;
    The corresponding tear of the target tear-drop shape is arranged on the cabling of PCB layout layer.
  2. 2. according to the method described in claim 1, it is characterized in that, at least two shapes of the tear include:Square and circle Shape.
  3. 3. according to the method described in claim 2, it is characterized in that, selection the target tear-drop shape for it is square when, It is described the corresponding tear of the target tear-drop shape is arranged on the cabling of PCB layout layer before, further comprise:
    Calculate the length and width of square tear;Performed according to the length and width described that the target tear-drop shape is corresponding Tear is arranged on the cabling of PCB layout layer;
    The length of square tear is calculated by equation below:
    L=o+s+e+a
    Wherein, L is used for the length for characterizing square tear, and o is used for the unilateral size for characterizing solder mask windowing, and s is used to characterize welding resistance Aligning accuracy, e are used for the etch quantity for characterizing outer-layer circuit, and a is used to characterize safe clearance;
    The width of square tear is calculated by equation below:
    W=e+u+m
    Wherein, W is used for the width for characterizing square tear, and e is used for the etch quantity for characterizing outer-layer circuit, and u is used to characterize microetch amount, m For characterizing junction line width minimum value.
  4. 4. according to the method described in claim 2, it is characterized in that, selection the target tear-drop shape for circle when, It is described the corresponding tear of the target tear-drop shape is arranged on the cabling of PCB layout layer before, further comprise:
    Calculate the diameter of circular tear;The corresponding tear of the target tear-drop shape is arranged according to diameter execution is described On the cabling of PCB layout layer;
    The diameter of circular tear is calculated by equation below:
    R=[e+u+m, o+s+e+a]
    Wherein, o is used for the unilateral size for characterizing solder mask windowing, and s is used to characterize welding resistance aligning accuracy, and e is used to characterize outer layer line The etch quantity on road, a are used to characterize safe clearance;U is used to characterize microetch amount, and m is used to characterize junction line width minimum value.
  5. 5. according to the method described in claim 3, it is characterized in that, a values are 2mil-3mil;M values are 4mil.
  6. 6. according to the method described in claim 4, it is characterized in that, a values are 2mil-3mil;M values are 4mil.
  7. 7. according to any method in claim 1-6, it is characterised in that
    When the impedance of the cabling is 100ohm, the target tear-drop shape is circle.
  8. 8. according to any method in claim 1-6, it is characterised in that
    When the impedance of the cabling is 90ohm, the target tear-drop shape is square.
  9. 9. a kind of PCB, it is characterised in that selected using any tear system of selection in the claims 1-7 Tear-drop shape arrangement tear.
CN201610301319.7A 2016-05-06 2016-05-06 A kind of tear system of selection and PCB Active CN105792532B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610301319.7A CN105792532B (en) 2016-05-06 2016-05-06 A kind of tear system of selection and PCB

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610301319.7A CN105792532B (en) 2016-05-06 2016-05-06 A kind of tear system of selection and PCB

Publications (2)

Publication Number Publication Date
CN105792532A CN105792532A (en) 2016-07-20
CN105792532B true CN105792532B (en) 2018-05-08

Family

ID=56401745

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610301319.7A Active CN105792532B (en) 2016-05-06 2016-05-06 A kind of tear system of selection and PCB

Country Status (1)

Country Link
CN (1) CN105792532B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107493655B (en) * 2017-08-28 2019-05-14 郑州云海信息技术有限公司 It is a kind of to solve the method and system that route easily fuses at DIP device solder joint
CN117371073A (en) * 2023-10-07 2024-01-09 上海弘快科技有限公司 Method for realizing chip packaging design tear drop

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102510676A (en) * 2011-10-20 2012-06-20 东莞生益电子有限公司 Method for adding teardrop in printed circuit board (PCB) during computer aided manufacturing (CAM)
CN102982199A (en) * 2012-11-02 2013-03-20 中国兵器科学研究院 Simulation method and device of optical lens
CN104994685A (en) * 2015-07-13 2015-10-21 竞陆电子(昆山)有限公司 PCB bonding pad/line connection structure

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102510676A (en) * 2011-10-20 2012-06-20 东莞生益电子有限公司 Method for adding teardrop in printed circuit board (PCB) during computer aided manufacturing (CAM)
CN102982199A (en) * 2012-11-02 2013-03-20 中国兵器科学研究院 Simulation method and device of optical lens
CN104994685A (en) * 2015-07-13 2015-10-21 竞陆电子(昆山)有限公司 PCB bonding pad/line connection structure

Also Published As

Publication number Publication date
CN105792532A (en) 2016-07-20

Similar Documents

Publication Publication Date Title
US8806421B1 (en) System and method for designing via of printed circuit board
CN102958291B (en) Printed circuit board and manufacture method thereof
Mitzner Complete PCB design using OrCAD Capture and PCB editor
CN106535470B (en) A kind of PCB layout method, line width determining device and PCB based on SMA interfaces
CN109241681A (en) Simulation optimization method, system, computer storage medium and the equipment of Reflow Soldering
CN105792532B (en) A kind of tear system of selection and PCB
CN102855337A (en) Automated wiring inspection system and automated wiring inspection method
CN105975703A (en) To-be-laid route forming method, device and PCB
CN101782931B (en) Processing method and system of constraint areas of circuit board wiring
CN105451437B (en) A kind of manufacturing method and printed circuit board of printed circuit board welding resistance consent structure
CN112235949A (en) Method, device and equipment for digging differential via hole in printed circuit board design
US20140310674A1 (en) System and method for checking signal transmission line
US8839182B2 (en) System and method for checking signal transmission line
CN114218886B (en) Method and device for realizing patterned bonding pad, electronic equipment and storage medium
CN107066764A (en) A kind of copper foil roughness design method suitable for high-speed line model extraction
CN116542210A (en) Semi-automatic wiring method, system, device and storage medium for EDA software
CN104797079A (en) Method for reducing impedance mismatching on package and PCB (printed circuit board)
TWI459874B (en) A method for circuit layout and a device using the same
CN102497732A (en) PCB (printed circuit board) spliced plate
CN106777718A (en) A kind of PCB gerber files processing method and processing system
TW200540611A (en) System and method for verifying delay of a motherboard layout
CN109618486A (en) Adding method, system and the relevant apparatus of test point in a kind of high-speed line
CN111291527A (en) Differential line spacing checking method, device, equipment and storage medium
CN104797078A (en) Method for reducing impedance mismatching degree under condition of discontinuous returning path
CN204305237U (en) A kind of intelligent card of set-top box testing arrangement

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant