CN117098314A - High-speed differential via design method, printed circuit board, device and storage medium - Google Patents
High-speed differential via design method, printed circuit board, device and storage medium Download PDFInfo
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0005—Apparatus or processes for manufacturing printed circuits for designing circuits by computer
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
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- G06F30/392—Floor-planning or layout, e.g. partitioning or placement
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- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
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- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
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- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2115/00—Details relating to the type of the circuit
- G06F2115/12—Printed circuit boards [PCB] or multi-chip modules [MCM]
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Abstract
The application provides a high-speed differential via design method, a printed circuit board, equipment and a storage medium, wherein the method comprises the following steps: constructing a three-dimensional model of the high-speed signal differential via hole; determining initial signal transmission characteristics of the high-speed differential via based on the initial parameters; the initial parameters comprise initial differential via parameters, initial reflow ground hole parameters, initial pad parameters, initial anti-pad parameters and initial fan-out structure parameters; determining a parameter adjustment strategy based on the initial signal transmission characteristics, and adjusting initial parameters based on the parameter adjustment strategy to obtain optimized parameters; the optimization parameters comprise at least one of optimizing differential via parameters, optimizing reflow ground hole parameters, optimizing pad parameters, optimizing anti-pad parameters and optimizing fan-out structure parameters; and determining a design scheme of the high-speed signal differential via based on the optimization parameters. The application improves the parameter comprehensiveness and parameter adjustment range for designing the high-speed differential via hole, thereby improving the signal transmission performance of the high-speed differential via hole.
Description
Technical Field
The application relates to the technical field of communication engineering, in particular to a high-speed differential via design method, a printed circuit board, equipment and a storage medium.
Background
In the design of a high-speed printed circuit board (Printed Circuit Board, PCB), since a differential structure has many advantages in terms of anti-interference capability, EMI suppression, timing alignment, and other signal integrity compared to a single-ended structure, a differential structure is often applied in the design of a high-speed PCB, and a differential via is also widely applied to a differential structure connecting different layers, although the differential via facilitates interconnection, discontinuity of the differential via also seriously affects signal integrity, and its existence causes problems such as impedance discontinuity and loss increase, so it is very important to study characteristics of the differential via.
Currently, analysis and research on differential via characteristics is focused mainly on via structure optimization. The pad, anti-pad diameter, reflow ground hole and the like associated with the differential via are often manufactured according to parameters given by manufacturers, so that the optimization range of the high-speed differential via is limited, and further the technical problem of poor signal transmission performance of the high-speed differential via is caused.
Accordingly, there is a need to provide a high-speed differential via design method, a printed circuit board, a device, and a storage medium, which improve the signal transmission performance to the high-speed differential via.
Disclosure of Invention
In view of the foregoing, it is necessary to provide a method, a printed circuit board, a device and a storage medium for designing a high-speed differential via, so as to solve the technical problems in the prior art that the analysis and research on the characteristics of the differential via are concentrated on the optimization of the via structure, resulting in the limited optimization range of the high-speed differential via, and further resulting in poor signal transmission performance of the high-speed differential via.
In one aspect, the present application provides a method for designing a high-speed differential via, including:
constructing a three-dimensional model of the high-speed signal differential via hole; the three-dimensional model comprises at least one pair of differential via holes, at least one pair of reflow ground holes, a bonding pad and an anti-bonding pad corresponding to the differential via holes and a fan-out structure;
acquiring preset initial parameters, and determining initial signal transmission characteristics of the high-speed differential via holes based on the initial parameters; the initial parameters comprise initial differential via parameters, initial reflow ground hole parameters, initial pad parameters, initial anti-pad parameters and initial fan-out structure parameters;
determining a parameter adjustment strategy based on the initial signal transmission characteristics, and adjusting the initial parameters based on the parameter adjustment strategy to obtain optimized parameters; the optimization parameters comprise at least one of optimizing differential via parameters, optimizing reflow ground hole parameters, optimizing bonding pad parameters, optimizing anti-bonding pad parameters and optimizing fan-out structure parameters;
and determining the design scheme of the high-speed signal differential via hole based on the optimization parameters.
In some possible implementations, the parameter adjustment policy includes a parameter adjustment order, a parameter adjustment range, and a parameter adjustment step size.
In some possible implementations, the parameter tuning order is a sequential order of an initial pad parameter, an initial differential via parameter, an initial anti-pad parameter, an initial reflow ground hole parameter, and an initial fan-out structure parameter.
In some possible implementations, the adjusting the initial parameters based on the parameter adjustment policy to obtain optimized parameters includes:
determining a pad adjustment parameter, a differential via adjustment parameter, an anti-pad adjustment parameter, a reflow ground hole adjustment parameter and a fan-out structure adjustment parameter based on the parameter adjustment range and the parameter adjustment step length;
determining a first adjustment signal transmission characteristic based on the pad adjustment parameter and the three-dimensional model, judging whether the first adjustment signal transmission characteristic meets the requirement, and if so, determining that the pad adjustment parameter is the optimization parameter;
if the first adjustment signal transmission characteristic does not meet the requirement, determining a second adjustment signal transmission characteristic based on the pad adjustment parameter, the differential via adjustment parameter and the three-dimensional model, and judging whether the second adjustment signal transmission characteristic meets the requirement, if the second adjustment signal transmission characteristic meets the requirement, the pad adjustment parameter and the differential via adjustment parameter are the optimization parameters;
if the second adjustment signal transmission characteristic does not meet the requirement, determining a third adjustment signal transmission characteristic based on the pad adjustment parameter, the differential via adjustment parameter, the anti-pad adjustment parameter and the three-dimensional model, and judging whether the third adjustment signal transmission characteristic meets the requirement, if so, the pad adjustment parameter, the differential via adjustment parameter and the anti-pad adjustment parameter are the optimization parameters;
if the third adjustment signal transmission characteristic does not meet the requirement, determining a fourth adjustment signal transmission characteristic based on the pad adjustment parameter, the differential via adjustment parameter, the anti-pad adjustment parameter, the reflow ground hole adjustment parameter and the three-dimensional model, and judging whether the fourth adjustment signal transmission characteristic meets the requirement, if the fourth adjustment signal transmission characteristic meets the requirement, the pad adjustment parameter, the differential via adjustment parameter, the anti-pad adjustment parameter and the reflow ground hole adjustment parameter are the optimization parameters;
and if the fourth adjustment signal transmission characteristic does not meet the requirement, the pad adjustment parameter, the differential via adjustment parameter, the anti-pad adjustment parameter, the reflow ground hole adjustment parameter and the fan-out structure adjustment parameter are the optimization parameters.
In some possible implementations, the parameter adjustment ranges include a pad parameter adjustment range, a differential via parameter adjustment range, an anti-pad parameter adjustment range, a reflow via parameter adjustment range, and a fan-out structure parameter adjustment range; the parameter adjustment step length comprises a pad parameter adjustment step length, a differential via parameter adjustment step length, an anti-pad parameter adjustment step length, a reflow ground hole parameter adjustment step length and a fan-out structure parameter adjustment step length; the determining a pad adjustment parameter, a differential via adjustment parameter, an anti-pad adjustment parameter, a reflow via adjustment parameter, and a fan-out structure adjustment parameter based on the parameter adjustment range and the parameter adjustment step size includes:
determining the pad adjustment parameters based on the pad parameter adjustment range and the pad parameter adjustment step size;
determining the differential via adjustment parameters based on the differential via parameter adjustment range and the differential via parameter adjustment step length;
determining the anti-pad adjustment parameters based on the anti-pad parameter adjustment range and the anti-pad parameter adjustment step size;
determining the return ground hole adjustment parameters based on the return ground hole parameter adjustment range and the return ground hole parameter adjustment step size;
and determining the fan-out structure adjustment parameters based on the fan-out structure parameter adjustment range and the fan-out structure parameter adjustment step length.
In some possible implementations, the initial differential via parameters include differential via pitch, the initial reflow ground via parameters include a via pitch between the reflow ground via and the differential ground via, the initial pad parameters include a pad diameter, the initial anti-pad parameters include an anti-pad diameter, and the initial fan-out structure parameters include a linewidth of a microstrip line or stripline within the anti-pad.
In some possible implementations, the high-speed differential via design method further includes:
and determining an evaluation parameter of the three-dimensional model based on the optimization parameter, and determining whether the design scheme meets design requirements based on the evaluation parameter.
In another aspect, the present application further provides a printed circuit board, including at least two high-speed differential vias, where the high-speed differential vias are determined according to the high-speed differential via design method in any one of the possible implementation manners described above.
On the other hand, the application also provides high-speed differential via design equipment, which comprises a memory and a processor, wherein,
the memory is used for storing programs;
the processor is coupled to the memory and is configured to execute the program stored in the memory to implement the steps in the high-speed differential via design method described in any one of the possible implementations.
In another aspect, the present application further provides a computer readable storage medium, configured to store a computer readable program or instructions, where the program or instructions, when executed by a processor, implement the steps in the method for designing a high-speed differential via according to any one of the possible implementations described above.
The beneficial effects of the implementation mode are that: the application provides a design method of a high-speed differential via hole, which comprises constructing a three-dimensional model of the high-speed differential via hole, wherein the three-dimensional model comprises at least one pair of reflow ground holes, a bonding pad corresponding to the differential via hole, an anti-bonding pad and a fan-out structure, determining initial signal transmission characteristics based on initial differential via hole parameters, initial reflow ground hole parameters, initial bonding pad parameters, initial anti-bonding pad parameters and initial fan-out structure parameters, and adjusting the initial parameters based on the initial signal transmission characteristics to obtain optimized parameters, wherein the optimized parameters comprise at least one of optimized differential via hole parameters, optimized reflow ground hole parameters, optimized bonding pad parameters, optimized anti-bonding pad parameters and optimized fan-out structure parameters, namely: when the high-speed differential via hole is designed, not only the structural parameters of the differential via hole are considered, but also the parameters of the reflow ground hole, the bonding pad, the anti-bonding pad and the fan-out structure are considered, so that the parameter comprehensiveness and the parameter adjustment range for designing the high-speed differential via hole are improved, and the signal transmission performance of the high-speed differential via hole is further improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following description will briefly explain the drawings needed in the description of the embodiments, and it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a method for designing a high-speed differential via according to an embodiment of the present application;
FIG. 2 is a flowchart illustrating an embodiment of obtaining the optimization parameters in S103 of FIG. 1 according to the present application;
fig. 3 is a schematic structural diagram of an embodiment of the high-speed differential via design apparatus provided in the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. It will be apparent that the described embodiments are only some, but not all, embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
It should be understood that the schematic drawings are not drawn to scale. A flowchart, as used in this disclosure, illustrates operations implemented according to some embodiments of the present application. It should be appreciated that the operations of the flow diagrams may be implemented out of order and that steps without logical context may be performed in reverse order or concurrently. Moreover, one or more other operations may be added to or removed from the flow diagrams by those skilled in the art under the direction of the present disclosure. Some of the block diagrams shown in the figures are functional entities and do not necessarily correspond to physically or logically separate entities. These functional entities may be implemented in software or in one or more hardware modules or integrated circuits or in different networks and/or processor systems and/or microcontroller systems.
References to "first," "second," etc. in the embodiments of the present application are for descriptive purposes only and are not to be construed as indicating or implying a relative importance or the number of technical features indicated. Thus, a technical feature defining "first", "second" may include at least one such feature, either explicitly or implicitly.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
The application provides a high-speed differential via design method, a printed circuit board, a device and a storage medium, which are respectively described below.
Fig. 1 is a flow chart of an embodiment of a method for designing a high-speed differential via according to the present application, as shown in fig. 1, the method for designing a high-speed differential via includes:
s101, constructing a three-dimensional model of a high-speed signal differential via hole; the three-dimensional model comprises at least one pair of differential via holes, at least one pair of reflow ground holes, a bonding pad and an anti-bonding pad corresponding to the differential via holes and a fan-out structure;
s102, acquiring preset initial parameters, and determining initial signal transmission characteristics of the high-speed differential via holes based on the initial parameters; the initial parameters comprise initial differential via parameters, initial reflow ground hole parameters, initial pad parameters, initial anti-pad parameters and initial fan-out structure parameters;
s103, determining a parameter adjustment strategy based on the initial signal transmission characteristics, and adjusting initial parameters based on the parameter adjustment strategy to obtain optimized parameters; the optimization parameters comprise at least one of optimizing differential via parameters, optimizing reflow ground hole parameters, optimizing pad parameters, optimizing anti-pad parameters and optimizing fan-out structure parameters;
s104, determining a design scheme of the high-speed signal differential via hole based on the optimization parameters.
Compared with the prior art, the high-speed differential via design method provided by the embodiment of the application firstly constructs a three-dimensional model of the high-speed differential via, and the three-dimensional model comprises at least one pair of reflow ground vias, bonding pads and anti-bonding pads corresponding to the differential via and a fan-out structure besides the differential via, secondly, determines initial signal transmission characteristics based on initial differential via parameters, initial reflow ground via parameters, initial bonding pad parameters, initial anti-bonding pad parameters and initial fan-out structure parameters, adjusts the initial parameters based on the initial signal transmission characteristics to obtain optimized parameters, wherein the optimized parameters comprise at least one of optimized differential via parameters, optimized reflow ground via parameters, optimized bonding pad parameters, optimized anti-bonding pad parameters and optimized fan-out structure parameters, namely: when the high-speed differential via hole is designed, not only the structural parameters of the differential via hole are considered, but also the parameters of the reflow ground hole, the bonding pad, the anti-bonding pad and the fan-out structure are considered, so that the parameter comprehensiveness and the parameter adjustment range for designing the high-speed differential via hole are improved, and the signal transmission performance of the high-speed differential via hole is further improved.
The step S101 specifically includes: and constructing a three-dimensional model of the high-speed differential via hole in simulation software. The simulation software may be HFSS.
It should be noted that: since the determination of the initial signal transmission characteristics based on the three-dimensional model in the simulation software also requires components such as a signal source, a receiver, and a termination resistor, the three-dimensional model may include components such as a signal source, a receiver, and a termination resistor in addition to the configuration in step S101. During simulation, the working state of an actual circuit is simulated by setting proper boundary conditions and excitation sources.
In some embodiments of the application, the initial signal transmission characteristics include, but are not limited to, time domain reflectometer (Time Domain Reflectometry, TDR) impedance, S-parameters, differential insertion loss within the spectrum bandwidth, differential reflection coefficients within the spectrum bandwidth, and the like.
The reference range of the signal transmission characteristics is as follows: the TDR impedance satisfies 100+/-2 omega, the differential insertion loss in the spectrum bandwidth is less than 3dB, and the differential reflection coefficient in the spectrum bandwidth is less than-20 dB.
It should be understood that: the specific process of determining the parameter adjustment strategy based on the initial signal transmission characteristics in step S103 is as follows: and acquiring a signal transmission characteristic reference range, judging whether a transmission characteristic value of the initial signal transmission characteristic is in the signal transmission characteristic reference range, if so, not adjusting the initial parameter, and if not, determining a parameter adjustment strategy.
It should be noted that: since the influence of different initial parameters on the signal transmission characteristics is different, the parameter adjustment strategy can be determined according to the characteristic values of the signal transmission characteristics.
In some embodiments of the present application, the determining the parameter adjustment strategy based on the initial signal transmission characteristics in step S103 may further be specifically: the parameter adjustment policy is generated based on the parameter adjustment policy generation model. The parameter adjustment strategy generation model can be a deep learning model, and the initial signal transmission characteristic is input into the deep learning model, so that the parameter adjustment strategy can be obtained, and the efficiency of generating the parameter adjustment strategy is improved.
The model structures of the Deep learning model include, but are not limited to, a Deep neural network model (Deep Neural Networks, DNN), a recurrent neural network model (Recurrent Neural Networks, RNN), a convolutional network model (Convolutional Neural Networks, CNN), a Deep generation model (Deep Generative Models, DGM), a generation type countermeasure network (Generative Adversarial Networks, GAN), a Long/short term memory network model (Long/short term memory, LSTM), a support vector machine (Support vector machines, SVM), a Deep cross model (Deep cross), and the like.
In some embodiments of the present application, the parameter adjustment strategy includes a parameter adjustment sequence, a parameter adjustment range, and a parameter adjustment step size.
According to the embodiment of the application, the parameter adjustment strategy is set to comprise the parameter adjustment sequence, so that the sequence can be provided for subsequent adjustment of the initial parameters, the technical problem of low adjustment speed caused by manual adjustment according to experience is avoided, and the adjustment efficiency of the initial parameters is improved, thereby improving the generation efficiency of the design scheme. Further, by setting the reference adjustment strategy comprising the parameter adjustment range and the parameter adjustment step length, the unreasonable technical problem of manual adjustment is further avoided, the adjustment accuracy of the initial parameters is improved, and the rationality and accuracy of the design scheme are further improved.
In one embodiment of the present application, the parameter tuning order is the sequential order of the initial pad parameters, the initial differential via parameters, the initial anti-pad parameters, the initial reflow ground hole parameters, and the initial fan-out structure parameters.
In some embodiments of the present application, as shown in fig. 2, the adjusting initial parameters based on the parameter adjustment policy in step S103 to obtain optimized parameters includes:
s201, determining a pad adjustment parameter, a differential via adjustment parameter, an anti-pad adjustment parameter, a reflow ground hole adjustment parameter and a fan-out structure adjustment parameter based on a parameter adjustment range and a parameter adjustment step length;
s202, determining first adjustment signal transmission characteristics based on the pad adjustment parameters and the three-dimensional model, judging whether the first adjustment signal transmission characteristics meet requirements, and if so, taking the pad adjustment parameters as optimization parameters;
s203, if the transmission characteristics of the first adjustment signals are not in accordance with the requirements, determining the transmission characteristics of the second adjustment signals based on the pad adjustment parameters, the differential via adjustment parameters and the three-dimensional model, and judging whether the transmission characteristics of the second adjustment signals are in accordance with the requirements, if the transmission characteristics of the second adjustment signals are in accordance with the requirements, the pad adjustment parameters and the differential via adjustment parameters are optimized parameters;
s204, if the second adjustment signal transmission characteristic does not meet the requirement, determining third adjustment signal transmission characteristics based on the pad adjustment parameter, the differential via adjustment parameter, the anti-pad adjustment parameter and the three-dimensional model, and judging whether the third adjustment signal transmission characteristics meet the requirement, and if the third adjustment signal transmission characteristics meet the requirement, the pad adjustment parameter, the differential via adjustment parameter and the anti-pad adjustment parameter are optimization parameters;
s205, if the third adjustment signal transmission characteristic does not meet the requirement, determining fourth adjustment signal transmission characteristic based on the pad adjustment parameter, the differential via adjustment parameter, the anti-pad adjustment parameter, the reflow ground hole adjustment parameter and the three-dimensional model, and judging whether the fourth adjustment signal transmission characteristic meets the requirement, and if the fourth adjustment signal transmission characteristic meets the requirement, the pad adjustment parameter, the differential via adjustment parameter, the anti-pad adjustment parameter and the reflow ground hole adjustment parameter are optimized parameters;
s206, if the fourth adjustment signal transmission characteristic does not meet the requirement, the pad adjustment parameter, the differential via adjustment parameter, the anti-pad adjustment parameter, the reflow hole adjustment parameter and the fan-out structure adjustment parameter are optimized parameters.
According to the embodiment of the application, the initial parameters are sequentially adjusted according to the parameter adjustment sequence, and when the requirement is not met after the adjustment of the first initial parameter, the second parameter is adjusted on the basis of the first adjustment parameter, so that the logic of the initial parameter adjustment is improved, and the determination efficiency and accuracy of the optimized parameter are further improved.
In some embodiments of the application, the parameter tuning ranges include a pad parameter tuning range, a differential via parameter tuning range, an anti-pad parameter tuning range, a reflow via parameter tuning range, and a fan-out structure parameter tuning range; the parameter adjustment step length comprises a pad parameter adjustment step length, a differential via parameter adjustment step length, an anti-pad parameter adjustment step length, a reflow ground hole parameter adjustment step length and a fan-out structure parameter adjustment step length; step S201 includes:
determining a pad adjustment parameter based on the pad parameter adjustment range and the pad parameter adjustment step size; determining differential via adjustment parameters based on the differential via parameter adjustment range and the differential via parameter adjustment step length; determining an anti-pad adjustment parameter based on the anti-pad parameter adjustment range and the anti-pad parameter adjustment step size; determining a return ground hole adjustment parameter based on the return ground hole parameter adjustment range and the return ground hole parameter adjustment step size; and determining fan-out structure adjustment parameters based on the fan-out structure parameter adjustment range and the fan-out structure parameter adjustment step length.
The initial differential via parameters comprise differential via spacing, the initial reflow ground via parameters comprise hole spacing between the reflow ground via and the differential ground via, the initial pad parameters comprise pad diameter, the initial anti-pad parameters comprise anti-pad diameter, and the initial fan-out structure parameters comprise linewidths of microstrip lines or strip lines in the anti-pad.
It should be noted that: the initial parameters may include, in addition to the above parameters, other line lengths and layouts of microstrip lines or striplines in anti-pads, apertures of differential vias, apertures of reflow ground vias, thicknesses of pads, thicknesses of anti-pads, and the like, which are not described in detail herein.
In a specific embodiment of the present application, the pad parameter adjustment range is a pad diameter adjustment range, the pad diameter range is 12mil to 24mil, and the pad parameter adjustment step size is 1mil. The differential via parameter adjustment range is a differential via pitch adjustment range, the differential via pitch adjustment range is 20 mil-40 mil, and the differential via parameter adjustment step length is 1mil. The anti-pad parameter adjustment range is an anti-pad diameter adjustment range, the anti-pad diameter adjustment range is 28 mil-36 mil, and the anti-pad adjustment step size is 1mil. The adjustment range of the reflow hole parameter is the adjustment range of the hole spacing between the reflow hole and the differential hole, the adjustment range of the hole spacing is 28mil to 40mil, and the adjustment step length of the reflow hole parameter is 1mil. The fan-out structure parameter adjustment range is the line width adjustment range of the microstrip line or the strip line in the anti-bonding pad, the line width adjustment range is the differential line diameter + -3 mil, and the fan-out structure parameter adjustment step length is 0.5mil.
To further ensure the accuracy and effectiveness of the determined design of the high-speed differential via, in some embodiments of the present application, the high-speed differential via design method further includes:
and determining an evaluation parameter of the three-dimensional model based on the optimization parameter, and determining whether the design scheme meets the design requirement based on the evaluation parameter.
The embodiment of the application judges whether the design scheme meets the design requirement or not through the evaluation parameters, and can further ensure the reliability and the effectiveness of the design scheme.
In particular embodiments of the present application, the evaluation parameters include, but are not limited to, parameters such as amplitude, phase, and delay of the signal.
In summary, the high-speed differential via design method provided by the embodiment of the application can accurately simulate the actual transmission process of signals by modeling and simulating the high-speed signal differential via by using HFSS software, so as to find and solve the possible signal integrity problem. Meanwhile, through optimal design and performance evaluation, the transmission quality and system performance of high-speed signals can be improved, so that the reliability and stability of the whole system are improved. In addition, the technical scheme of the application has repeatability and expandability, and can be widely applied to different types of circuit designs and product research and development.
The embodiment of the application also provides a printed circuit board comprising at least two high-speed differential via holes, wherein the high-speed differential via holes are determined according to the high-speed differential via hole design method in any one of the embodiments.
As shown in fig. 3, the present application also provides a high-speed differential via design apparatus 300 accordingly. The high-speed differential via design apparatus 300 includes a processor 301, a memory 302, and a display 303. Fig. 3 shows only a portion of the components of the high-speed differential via design apparatus 300, but it should be understood that not all of the illustrated components need be implemented, and that more or fewer components may alternatively be implemented.
The memory 302 may be an internal storage unit of the high-speed differential via design apparatus 300 in some embodiments, such as a hard disk or a memory of the high-speed differential via design apparatus 300. The memory 302 may also be an external memory device of the high-speed differential via design device 300 in other embodiments, such as a plug-in hard disk, smart Media Card (SMC), secure Digital (SD) Card, flash Card (Flash Card) or the like, which is provided on the high-speed differential via design device 300.
Further, the memory 302 may also include both internal storage units and external storage devices of the high-speed differential via design apparatus 300. The memory 302 is used for storing application software and various types of data for installing the high-speed differential via design apparatus 300.
The processor 301 may in some embodiments be a central processing unit (Central Processing Unit, CPU), microprocessor or other data processing chip for executing program code or processing data stored in the memory 302, such as the high-speed differential via design method of the present application.
The display 303 may be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, an OLED (Organic Light-Emitting Diode) touch, or the like in some embodiments. The display 303 is used to display information at the high speed differential via design apparatus 300 and to display a visual user interface. The components 301-303 of the high-speed differential via design apparatus 300 communicate with each other over a system bus.
In some embodiments of the present application, when the processor 301 executes the high-speed differential via design program in the memory 302, the following steps may be implemented:
constructing a three-dimensional model of the high-speed signal differential via hole; the three-dimensional model comprises at least one pair of differential via holes, at least one pair of reflow ground holes, a bonding pad and an anti-bonding pad corresponding to the differential via holes and a fan-out structure;
acquiring preset initial parameters, and determining initial signal transmission characteristics of the high-speed differential via holes based on the initial parameters; the initial parameters comprise initial differential via parameters, initial reflow ground hole parameters, initial pad parameters, initial anti-pad parameters and initial fan-out structure parameters;
determining a parameter adjustment strategy based on the initial signal transmission characteristics, and adjusting initial parameters based on the parameter adjustment strategy to obtain optimized parameters; the optimization parameters comprise at least one of optimizing differential via parameters, optimizing reflow ground hole parameters, optimizing pad parameters, optimizing anti-pad parameters and optimizing fan-out structure parameters;
and determining a design scheme of the high-speed signal differential via based on the optimization parameters.
It should be understood that: the processor 301 may perform other functions in addition to the above functions when executing the high speed differential via design program in the memory 302, see in particular the description of the corresponding method embodiments above.
Further, the type of the high-speed differential via design apparatus 300 is not particularly limited, and the high-speed differential via design apparatus 300 may be a portable high-speed differential via design apparatus such as a mobile phone, a tablet computer, a personal digital assistant (personal digital assistant, PDA), a wearable device, a laptop computer (laptop), etc. Exemplary embodiments of portable high-speed differential via design devices include, but are not limited to, portable high-speed differential via design devices that carry IOS, android, microsoft or other operating systems. The portable high-speed differential via design device described above may also be other portable high-speed differential via design devices, such as a laptop computer (laptop) or the like having a touch-sensitive surface (e.g., a touch panel). It should also be appreciated that in other embodiments of the present application, the high-speed differential via design device 300 may be a desktop computer having a touch-sensitive surface (e.g., a touch panel) instead of a portable high-speed differential via design device.
Correspondingly, the embodiment of the application also provides a computer readable storage medium, and the computer readable storage medium is used for storing a computer readable program or instruction, and when the program or instruction is executed by a processor, the steps or functions of the high-speed differential via design method provided by the above method embodiments can be realized.
Those skilled in the art will appreciate that all or part of the flow of the methods of the embodiments described above may be accomplished by way of a computer program stored in a computer readable storage medium to instruct related hardware (e.g., a processor, a controller, etc.). The computer readable storage medium is a magnetic disk, an optical disk, a read-only memory or a random access memory.
The high-speed differential via design method, the printed circuit board, the device and the storage medium provided by the application are described in detail, and specific examples are applied to illustrate the principle and the implementation of the application, and the description of the above examples is only used for helping to understand the method and the core idea of the application; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in light of the ideas of the present application, the present description should not be construed as limiting the present application.
Claims (10)
1. A method of high speed differential via design, comprising:
constructing a three-dimensional model of the high-speed signal differential via hole; the three-dimensional model comprises at least one pair of differential via holes, at least one pair of reflow ground holes, a bonding pad and an anti-bonding pad corresponding to the differential via holes and a fan-out structure;
acquiring preset initial parameters, and determining initial signal transmission characteristics of the high-speed differential via holes based on the initial parameters; the initial parameters comprise initial differential via parameters, initial reflow ground hole parameters, initial pad parameters, initial anti-pad parameters and initial fan-out structure parameters;
determining a parameter adjustment strategy based on the initial signal transmission characteristics, and adjusting the initial parameters based on the parameter adjustment strategy to obtain optimized parameters; the optimization parameters comprise at least one of optimizing differential via parameters, optimizing reflow ground hole parameters, optimizing bonding pad parameters, optimizing anti-bonding pad parameters and optimizing fan-out structure parameters;
and determining the design scheme of the high-speed signal differential via hole based on the optimization parameters.
2. The method of claim 1, wherein the parameter adjustment strategy comprises a parameter adjustment sequence, a parameter adjustment range, and a parameter adjustment step size.
3. The method of claim 2, wherein the parameter tuning order is a sequential order of the initial pad parameters, the initial differential via parameters, the initial anti-pad parameters, the initial reflow ground via parameters, and the initial fan-out structure parameters.
4. The method of claim 2, wherein the adjusting the initial parameters based on the parameter adjustment strategy to obtain optimized parameters comprises:
determining a pad adjustment parameter, a differential via adjustment parameter, an anti-pad adjustment parameter, a reflow ground hole adjustment parameter and a fan-out structure adjustment parameter based on the parameter adjustment range and the parameter adjustment step length;
determining a first adjustment signal transmission characteristic based on the pad adjustment parameter and the three-dimensional model, judging whether the first adjustment signal transmission characteristic meets the requirement, and if so, determining that the pad adjustment parameter is the optimization parameter;
if the first adjustment signal transmission characteristic does not meet the requirement, determining a second adjustment signal transmission characteristic based on the pad adjustment parameter, the differential via adjustment parameter and the three-dimensional model, and judging whether the second adjustment signal transmission characteristic meets the requirement, if the second adjustment signal transmission characteristic meets the requirement, the pad adjustment parameter and the differential via adjustment parameter are the optimization parameters;
if the second adjustment signal transmission characteristic does not meet the requirement, determining a third adjustment signal transmission characteristic based on the pad adjustment parameter, the differential via adjustment parameter, the anti-pad adjustment parameter and the three-dimensional model, and judging whether the third adjustment signal transmission characteristic meets the requirement, if so, the pad adjustment parameter, the differential via adjustment parameter and the anti-pad adjustment parameter are the optimization parameters;
if the third adjustment signal transmission characteristic does not meet the requirement, determining a fourth adjustment signal transmission characteristic based on the pad adjustment parameter, the differential via adjustment parameter, the anti-pad adjustment parameter, the reflow ground hole adjustment parameter and the three-dimensional model, and judging whether the fourth adjustment signal transmission characteristic meets the requirement, if the fourth adjustment signal transmission characteristic meets the requirement, the pad adjustment parameter, the differential via adjustment parameter, the anti-pad adjustment parameter and the reflow ground hole adjustment parameter are the optimization parameters;
and if the fourth adjustment signal transmission characteristic does not meet the requirement, the pad adjustment parameter, the differential via adjustment parameter, the anti-pad adjustment parameter, the reflow ground hole adjustment parameter and the fan-out structure adjustment parameter are the optimization parameters.
5. The method of claim 4, wherein the parameter tuning range includes a pad parameter tuning range, a differential via parameter tuning range, an anti-pad parameter tuning range, a reflow via parameter tuning range, and a fan-out structure parameter tuning range; the parameter adjustment step length comprises a pad parameter adjustment step length, a differential via parameter adjustment step length, an anti-pad parameter adjustment step length, a reflow ground hole parameter adjustment step length and a fan-out structure parameter adjustment step length; the determining a pad adjustment parameter, a differential via adjustment parameter, an anti-pad adjustment parameter, a reflow via adjustment parameter, and a fan-out structure adjustment parameter based on the parameter adjustment range and the parameter adjustment step size includes:
determining the pad adjustment parameters based on the pad parameter adjustment range and the pad parameter adjustment step size;
determining the differential via adjustment parameters based on the differential via parameter adjustment range and the differential via parameter adjustment step length;
determining the anti-pad adjustment parameters based on the anti-pad parameter adjustment range and the anti-pad parameter adjustment step size;
determining the return ground hole adjustment parameters based on the return ground hole parameter adjustment range and the return ground hole parameter adjustment step size;
and determining the fan-out structure adjustment parameters based on the fan-out structure parameter adjustment range and the fan-out structure parameter adjustment step length.
6. The method of claim 1, wherein the initial differential via parameters comprise differential via pitch, the initial reflow ground via parameters comprise hole pitch between the reflow ground via and the differential ground via, the initial pad parameters comprise pad diameter, the initial anti-pad parameters comprise anti-pad diameter, and the initial fan-out structure parameters comprise linewidths of microstrip or striplines within the anti-pad.
7. The method of high-speed differential via design of claim 1, further comprising:
and determining an evaluation parameter of the three-dimensional model based on the optimization parameter, and determining whether the design scheme meets design requirements based on the evaluation parameter.
8. A printed circuit board comprising at least two high speed differential vias, the high speed differential vias being defined according to the high speed differential via design method of any of claims 1-7.
9. A high-speed differential via design apparatus, comprising a memory and a processor, wherein,
the memory is used for storing programs;
the processor, coupled to the memory, is configured to execute the program stored in the memory to implement the steps in the high-speed differential via design method of any one of the above claims 1 to 7.
10. A computer-readable storage medium storing a computer-readable program or instructions that, when executed by a processor, is capable of implementing the steps in the high-speed differential via design method of any one of the preceding claims 1 to 7.
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| CN202311212332.1A CN117098314A (en) | 2023-09-19 | 2023-09-19 | High-speed differential via design method, printed circuit board, device and storage medium |
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