CN116736652B - Process method for exposure alignment in multilayer high-density packaging - Google Patents
Process method for exposure alignment in multilayer high-density packaging Download PDFInfo
- Publication number
- CN116736652B CN116736652B CN202311009444.7A CN202311009444A CN116736652B CN 116736652 B CN116736652 B CN 116736652B CN 202311009444 A CN202311009444 A CN 202311009444A CN 116736652 B CN116736652 B CN 116736652B
- Authority
- CN
- China
- Prior art keywords
- layer
- alignment mark
- pattern
- patterns
- alignment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 67
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 20
- 238000001259 photo etching Methods 0.000 claims abstract description 51
- 229940095676 wafer product Drugs 0.000 claims abstract description 13
- 238000004519 manufacturing process Methods 0.000 claims abstract description 10
- 229920002120 photoresistant polymer Polymers 0.000 claims description 29
- 238000004026 adhesive bonding Methods 0.000 claims description 5
- 238000001459 lithography Methods 0.000 claims description 5
- 238000007689 inspection Methods 0.000 claims description 3
- 238000000059 patterning Methods 0.000 claims description 3
- 238000013461 design Methods 0.000 abstract description 11
- 238000005259 measurement Methods 0.000 abstract description 5
- 238000003909 pattern recognition Methods 0.000 abstract description 3
- 238000000576 coating method Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000000206 photolithography Methods 0.000 description 4
- 239000011248 coating agent Substances 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 238000011166 aliquoting Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000002372 labelling Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 238000012858 packaging process Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
- G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
- G03F9/7003—Alignment type or strategy, e.g. leveling, global alignment
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
- G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
- G03F9/7073—Alignment marks and their environment
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
- G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
- G03F9/7073—Alignment marks and their environment
- G03F9/7076—Mark details, e.g. phase grating mark, temporary mark
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
- G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
- G03F9/7073—Alignment marks and their environment
- G03F9/708—Mark formation
Abstract
The invention discloses a process method for exposure alignment in multilayer high-density packaging, which comprises the following steps: drawing an alignment mark graph on each layer of mask file in drawing software, and obtaining coordinate values of the alignment mark graph; manufacturing each layer of mask plate with an alignment mark pattern; forming a first layer of photoetching patterns with alignment mark patterns on a wafer product by using a first layer of mask; and subsequently starting from the second layer of photoetching patterns, the photoetching machine performs alignment with the alignment mark patterns formed by the last layer identified by the photoetching machine according to the coordinate values of the alignment mark patterns of the last layer obtained when the design is input into the photoetching machine, and completes accurate alignment of the layer with the last layer, and then completes a new layer of photoetching patterns by exposure until the multi-layer packaging is completed. The exposure alignment process method makes various designed alignment mark patterns on each PI layer or PR layer, can solve the problem of exposure offset error caused by measurement error and unclear pattern recognition, and improves exposure alignment precision.
Description
Technical Field
The invention relates to the technical field of semiconductor packaging, in particular to a process method for exposure alignment in multilayer high-density packaging.
Background
In the photoetching process of the semiconductor package, the conventional exposure method uses Mark patterns carried by the wafer for exposure positioning, but the method depends on the wafer and cannot be applied to the prior art in multi-layer high-density package.
In the photolithography process, a PI layer (Polyimide passivation layer) or a PR layer (Photoresist layer) is formed through conventional processes of Photoresist coating, exposure, development, and curing. In order to enable the PI layer opening and the PR layer opening to be accurately opened on the passivation opening without deviation of more than 2um, a conventional alignment mode adopts a special pattern made by a wafer factory of a wafer as a Mark and calculates coordinate values of the Mark, the coordinate values are calculated under a microscope, a certain measurement error exists, exposure deviation is easy to cause, and the photoetching alignment requirement cannot be met.
However, in the multilayer high density packaging process, the substrate surface wiring is complicated due to the multilayer rewiring layer (RDL) and the multilayer PI layer, and the surface relief changes greatly. The photoetching machine is easy to identify the special patterns of the wafer, and the exposure contraposition can not be realized, so that the feasibility of the whole photoetching process flow is greatly influenced.
Therefore, there is a need for an efficient, reliable, accurate exposure alignment method suitable for multi-layer high density package structures.
Disclosure of Invention
In order to solve the problems, the invention provides a process method for exposure alignment in multilayer high-density packaging, which is used for making various designed alignment mark patterns on each PI layer or PR layer, so that the problems of exposure offset errors caused by measurement errors and unclear pattern recognition can be solved, the exposure alignment precision is improved, and the exposure alignment efficiency is improved.
According to one aspect of the present invention, there is provided a process for exposure alignment in a multi-layer high density package, the process comprising the steps of:
s1: designing mask files and alignment mark patterns
Drawing each layer of mask file in drawing software, drawing at least four alignment mark patterns on each layer of mask file, wherein the alignment mark patterns are axisymmetric patterns, and acquiring coordinate values of geometric center points of the alignment mark patterns by taking center points of chip size frames as origin points;
s2: mask plate manufacturing
Manufacturing each layer of mask according to the designed mask file, wherein each manufactured layer of mask is provided with an alignment mark pattern;
s3: patterning a first layer of photoresist
Using the first layer mask plate prepared in the step S2 to form a first layer of photoetching pattern on a wafer product through gluing, exposing, developing and curing, and forming an alignment mark pattern on the first layer of photoetching pattern;
s4: manufacturing a second layer of photoetching pattern and a subsequent photoetching pattern
Inputting the coordinate value of the geometric center point of the alignment mark pattern of the upper layer obtained in the step S1 into a photoetching machine, identifying the alignment mark pattern formed by the upper layer of the wafer product by the photoetching machine, aligning the photoetching machine according to the coordinate value of the geometric center point of the alignment mark pattern of the upper layer and the position of the alignment mark pattern formed by the identified upper layer, namely finishing the accurate alignment of the layer which needs photoetching and the upper layer, then exposing to finish a new layer of photoetching pattern, and repeating the step if a multi-layer packaging structure exists until the packaging is finished;
s5: lithography inspection
And confirming whether the product is qualified after the photoetching process.
In some embodiments, the origin obtained in step S1 is the center point of the chip-size frame containing the outermost scribe lane.
In some embodiments, at least one alignment mark pattern is disposed on four sides of the chip size frame in each layer of mask file, and at least one group of alignment mark patterns in the alignment mark patterns on opposite sides in each layer of mask file have the same pattern and the same size.
In some embodiments, the alignment mark pattern of each set of opposing edges in each layer of reticle file is different from the alignment mark pattern of an adjacent set of opposing edges.
In some embodiments, four alignment mark patterns are set in each layer of mask file, the four alignment mark patterns are distributed on a group of opposite sides, and the patterns of the two alignment mark patterns on the cross symmetrical positions centered on the center point of the chip size frame are identical and the sizes are identical.
In some embodiments, for the case that the coordinate values of the center points of the alignment mark patterns in the mask files adjacent to each other are the same, the patterns of the corresponding alignment mark patterns are the same but the sizes are different, and the sizes of the alignment mark patterns in each layer of mask files from bottom to top are gradually increased.
In some embodiments, the distance between alignment mark patterns in different layers of mask files is at least more than 400 μm for the case that the coordinate values of the central points of the alignment mark patterns in the upper and lower adjacent mask files are different. In the exposure alignment process, similar patterns are prevented from appearing in the same search frame, and through experimental verification, different alignment mark patterns need to be spaced by more than 400um, so that erroneous judgment can be reduced to the greatest extent.
In some embodiments, the pattern of the alignment mark pattern is a T-shape, or two cross shapes with the same length, or two cross shapes with different lengths, or two L-shape, or H-shape, or i-shape, or y-shape, or groined shape, or king-shape, or a back-shape quarter-divided structure with a white center, or a pattern with a uniformly scattered line segment with a white center around.
In some embodiments, when the lithography is performed, the thickness of the photoresist of each layer of the lithography formed after curing is 5-10 μm, and the size of the opening of the alignment mark pattern formed is 70-140 μm.
Compared with the prior art, the invention has the beneficial effects that:
the invention provides a process method for exposure alignment in multi-layer high-density packaging, which comprises the steps of positioning an alignment Mark pattern (namely Mark pattern) in advance when a mask file is designed, making the alignment Mark pattern on a mask, transferring the pattern on the mask to a wafer product through a photoresist coating, exposure, development and solidification photoetching process, forming the alignment Mark pattern on each PI layer or PR layer, thus, when the current layer photoetching pattern is carried out, carrying out exposure alignment operation by utilizing the alignment Mark pattern on the previous PI layer or PR layer, clearly carrying out alignment Mark pattern identification, particularly, in the multi-layer high-density packaging structure, avoiding each layer exposure alignment from depending on a special pattern (namely Mark pattern) carried by a wafer per se, and clearly seeing each layer exposure pattern for the multi-layer high-density packaging, reducing exposure offset risk, measuring coordinate values of the alignment Mark in the mask file design, avoiding the trouble of measuring and calculating the Mark coordinates of the wafer per se under a microscope, greatly improving the precision of exposure alignment and efficiency;
at least one alignment mark pattern is arranged at the upper, lower, left and right positions of each layer of mask, so that the efficiency and the precision in exposure alignment can be improved, and if one layer is four alignment mark patterns, the four alignment mark patterns can be in the same pattern and the same size, and only the patterns and the sizes of two alignment mark patterns on opposite sides can be the same; the alignment mark patterns of the adjacent layers can be vertically aligned, or the alignment mark patterns of the adjacent layers are not positioned at the same position; for the alignment mark patterns of adjacent layers not positioned at the same position, the distance between the alignment mark patterns of different layers of mask files is strictly controlled to be at least more than 400 mu m, so that similar patterns can be prevented from being in the same search frame in the exposure alignment process, and misjudgment can be reduced to the greatest extent.
The alignment mark pattern used in the process method is an axisymmetric pattern, the center of the alignment mark pattern is conveniently identified by a photoetching machine, a new design is provided besides a conventional cross shape, such as a T-shaped pattern, an L-shaped pattern with the same length of two sides, an H-shaped pattern, an I-shaped pattern, a Chinese character 'ri' shaped pattern, a Chinese character 'wang' pattern, a Chinese character 'hui' pattern with a white center, a pattern with a uniformly scattered line segment from the white center to the periphery is provided, the design of the alignment mark pattern comprises a simple pattern, the design of the alignment mark pattern also comprises a complex pattern, the size of the simple pattern is 70-120, the size of the complex pattern is 120-140, a designer can select the shape and the size of the alignment mark pattern according to the design requirement of a chip, and when the number of layers is increased and the simple pattern is insufficient, the complex pattern can be selected to improve the accuracy of exposure alignment. The number of layers becomes larger, the complexity of the alignment mark patterns is gradually increased, and the lower the pattern similarity between different layers is, the better the exposure accuracy is.
Drawings
FIG. 1 is a simplified diagram of an alignment mark pattern provided by the present invention;
FIG. 2 is a complex diagram of an alignment mark pattern provided by the present invention;
FIG. 3 is a schematic diagram of coordinate value measurement of an alignment mark pattern;
FIG. 4 is a diagram showing a design distribution of alignment mark patterns of a mask file according to the present invention;
fig. 5 is an enlarged view of a portion a in fig. 4;
FIG. 6 is an enlarged view of portion B of FIG. 4;
FIG. 7 is an enlarged view of portion C of FIG. 4;
FIG. 8 is an enlarged view of portion D of FIG. 4;
fig. 9 is an enlarged view of the portion E in fig. 4;
fig. 10 is an enlarged view of the portion F in fig. 4;
fig. 11 is an enlarged view of a portion G in fig. 4;
fig. 12 is an enlarged view of the portion H in fig. 4.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the invention, as presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Photolithography is a very central step in semiconductor packaging, where the accuracy of the alignment of the exposure is critical.
The invention provides a process method for exposure alignment in multilayer high-density packaging, which comprises the following steps:
s1: designing mask files and alignment mark patterns
As shown in fig. 4 to 12, in CAD drawing software, each layer of reticle files is drawn, and at least four alignment mark patterns, which are axisymmetric patterns, are drawn on each layer of reticle files. It is necessary to secure four sides of the chip size frame, each of which is provided with at least one alignment mark pattern.
After the alignment mark graph is designed, a labeling tool in CAD drawing software is utilized to obtain the coordinate value of the alignment mark graph. As shown in fig. 3, when coordinate values are measured and obtained, the origin position of the coordinates is determined, the coordinate values of the geometric center point of the alignment mark pattern are measured and obtained by using a marking tool with the center point of the chip size frame including the outermost scribe lane as the origin, and the coordinates in the X direction and the Y direction are obtained. Each alignment mark figure in each layer of mask file has independent coordinate value.
S2: mask plate manufacturing
And manufacturing each layer of mask according to the mask file designed in the steps, wherein each manufactured layer of mask is provided with an alignment mark pattern.
S3: patterning a first layer of photoresist
And using the first layer mask plate to form a first layer of photoetching pattern on a wafer product through gluing, exposing, developing and curing, transferring the pattern designed on the first layer mask plate to the wafer product, and forming an alignment mark pattern on the first layer of photoetching pattern.
S4: manufacturing a second layer of photoetching pattern and a subsequent photoetching pattern
And subsequently, starting from the second layer of photoetching patterns, inputting the coordinate value of the geometric center point of the alignment mark pattern of the upper layer obtained in the design in the step S1 into a photoetching machine, identifying the alignment mark pattern formed on the upper layer of the wafer product by the photoetching machine, aligning the photoetching machine according to the inputted coordinate value of the geometric center point of the alignment mark pattern of the upper layer and the identified position of the alignment mark pattern formed on the upper layer, determining that the alignment is accurate, namely, completing the accurate alignment of the layer which needs to be subjected to photoetching and the upper layer, and then completing the new layer of photoetching patterns by utilizing the mask plate of the layer to carry out exposure. For multi-layer package structures, this step may be repeated until the package is completed.
S5: lithography inspection
Finally, after the photolithography is completed, it is necessary to confirm whether the product is qualified after the photolithography process.
In practical application, at least one group of alignment mark patterns in the alignment mark patterns on opposite sides of each layer of mask file have the same patterns and the same size. Such as: the upper alignment mark patterns, the lower alignment mark patterns, the left alignment mark patterns and the right alignment mark patterns form one group, and the left alignment mark patterns and the right alignment mark patterns form the other group. The patterns of the upper and lower sets of alignment mark patterns are the same and the size is the same, the patterns of the left and right sets of alignment mark patterns are the same and the size is the same, but the patterns of the upper and lower sets of alignment mark patterns are different from the patterns of the left and right sets of alignment mark patterns, as in fig. 4: the patterns of M3-1 and M3-2 are the same and the sizes are the same, and the patterns of M3-3 and M3-4 are the same and the sizes are the same. Or the patterns and the sizes of the four alignment marks are the same, such as PI6-1, PI6-2, PI6-3 and PI6-4 in FIG. 4; alternatively, the patterns of the upper and lower sets of alignment mark patterns are the same and the same in size, and the left alignment mark pattern, the right alignment mark pattern and the upper and lower sets of alignment mark patterns are different.
Four alignment mark patterns are arranged in each layer of mask file, the four alignment mark patterns are respectively distributed on a group of opposite sides, and the patterns of the two alignment mark patterns which are positioned on the cross symmetrical position with the center point of the chip size frame as the center are identical and the sizes are identical, as shown in fig. 4: m2-1 and M2-2, M2-3 and M2-4.
In the process method provided by the invention, overlay can be allowed, as M1-1 and PI1-1, M1-2 and PI1-2 in FIG. 4, aiming at the condition that the coordinate values of the central points of the alignment mark patterns in the mask files adjacent from top to bottom are the same, the patterns of the corresponding alignment mark patterns are the same but the sizes are different, and the sizes of the alignment mark patterns in each layer of mask files from bottom to top are gradually increased. In this way, an overlay can be achieved.
The process method provided by the invention can be used for avoiding an overlay process or an overlay alignment process, and the coordinate positions of the alignment mark patterns on the mask plates of the adjacent layers are different. Aiming at the condition that the coordinate values of the central points of the alignment mark patterns in the upper and lower adjacent mask files are different, the distance between the alignment mark patterns in different layers of mask files is at least more than 400 mu m, so that similar patterns can be prevented from appearing in the same search frame in the exposure alignment process, and erroneous judgment can be reduced to the greatest extent.
The pattern of the alignment mark pattern commonly used in the prior art is cross-shaped or linear, but in the process method of the invention, the alignment mark pattern for exposure needs to more accurately measure the coordinate value of the center point of the alignment mark pattern, so the process method of the invention does not use the linear alignment mark pattern.
The alignment mark patterns adopted in the process method provided by the invention are uniform and regular axisymmetric patterns. As shown in fig. 1 and 2, the pattern of the alignment mark pattern is formed by forming a pattern of a plurality of alignment mark patterns in a pattern of a plurality of alignment mark patterns, the LED lamp can also be in a cross shape or a T shape which are perpendicular to each other and have different lengths, or two L shapes or H shapes or I shapes or Chinese character 'ri' shapes or Chinese character 'jing' shapes or Chinese character 'wang' shapes or Chinese character 'hui' four-aliquoting structures with white centers or figures with uniformly scattered line segments from white centers to four sides. The pattern of uniformly scattering line segments from the center to the periphery is complex in structure, and the line segments can be straight lines or continuously bent line segments.
As shown in FIGS. 1 and 2, the alignment mark patterns of cross shape, T shape and L shape are simple patterns, the size of the simple patterns is 70-120 μm, and the size of some simple patterns can be 50 μm. H-shaped, chinese character ' ri ', chinese character ' jing ' shaped, I-shaped, king ' shaped, chinese character ' Hui ' shaped quarter-divided structure with white center, the figure of the uniformly scattered line segment around with white center is a complex figure, the size of the complex figure is 120-140 mu m, and the size of some complex figures is 200 mu m. When the number of layers of photoetching is increased and the simple patterns are insufficient, complex patterns can be selected to improve the accuracy of exposure alignment. Experiments show that the number of layers is increased, the pattern complexity of the alignment mark patterns is gradually increased, and the lower the alignment mark pattern similarity between different layers is, the better the exposure accuracy is.
When photoetching patterns are carried out, the technological processes of gluing, exposing, developing and curing are strictly controlled. When the photoresist is coated, the wafer is centered, the photoresist is firstly pre-wetted to enable the photoresist to be more uniform, then the photoresist is uniformly coated on the surface of the wafer through a spin coating method, low-speed rotation is adopted during photoresist dripping, high-speed rotation is adopted during photoresist throwing and photoresist homogenizing, after edge washing, soft baking is finally carried out to volatilize a solvent in the photoresist, and the adhesion between the photoresist and a substrate can be increased in a photoresist coating mode, and the internal stress of the photoresist layer in the photoresist coating process is alleviated.
After the photoresist is coated, a wafer product coated with photoresist is exposed through a mask plate with an alignment mark pattern by utilizing light with a certain wavelength emitted by a photoetching machine, coordinate values of the geometric center point of the alignment mark pattern are input into the photoetching machine, and the pattern is copied onto the wafer product by adopting an exposure alignment mode of Field by Field alignment. And for the negative photoresist, removing the unexposed part of the wafer by adopting an organic solvent or an alkaline developing solution to obtain a pattern opposite to the mask. And for positive photoresist, removing the exposed part on the wafer by adopting alkaline developing solution to obtain the pattern identical to the mask.
After exposure, curing is needed, in the curing process, nitrogen is firstly introduced to perform oxygen discharge, and when the oxygen content is lower than 20PPM, the curing equipment is heated to start the curing process. The process aims to volatilize the residual photoresist solvent completely and improve the adhesiveness between the photoresist and the surface of a wafer product and the corrosion resistance of the photoresist. The thickness of the photoresist of each layer of the photo-etching pattern formed after curing is 5-10 mu m, and the size of the opening of the formed alignment mark pattern is preferably 70-140 mu m.
The exposure alignment process method provided by the invention can be suitable for multilayer high-density packaging. The alignment Mark patterns (namely Mark patterns) are arranged in advance when the mask file is designed, the alignment Mark patterns are arranged on the mask, the patterns on the mask are transferred to a wafer product through gluing, exposure, developing and curing photoetching processes, and the alignment Mark patterns are formed on each PI layer or PR layer, so that when the current layer photoetching patterns are carried out, the exposure alignment operation can be carried out by utilizing the alignment Mark patterns on the previous PI layer or PR layer, the alignment Mark pattern identification can be clearly carried out, and particularly, the problem that each layer of exposure alignment depends on the special patterns (namely Mark patterns) carried by the wafer in the multilayer high-density packaging structure can be avoided. In the exposure alignment process method, the coordinate value of the alignment pattern Mark is measured when the mask file is designed, so that the trouble of measuring and calculating the Mark pattern coordinate of the wafer under a microscope is avoided, the exposure offset error caused by unclear measurement error and pattern recognition is avoided, and the precision and efficiency of exposure alignment are greatly improved.
At least one alignment mark pattern is arranged at the upper, lower, left and right positions of each layer of mask plate, so that the efficiency and the precision in exposure alignment can be improved. If one layer is four alignment mark patterns, the four alignment mark patterns can adopt the same pattern and size, or only the patterns and sizes of two alignment mark patterns on opposite sides can be the same. The alignment mark patterns of the adjacent layers can be vertically aligned, or the alignment mark patterns of the adjacent layers are not positioned at the same position.
The alignment mark pattern used in the process method is an axisymmetric pattern, so that the photoetching machine can conveniently identify the center of the alignment mark pattern. Besides the conventional cross shape, the invention also provides a novel design, such as a T-shaped pattern, an L-shaped pattern, an H-shaped pattern, an I-shaped pattern, a Chinese character 'ri' -shaped pattern, a Chinese character 'jing' -shaped pattern, a Chinese character 'wang' -shaped pattern, a Chinese character 'hui' -shaped quarter-shaped structure with a white center and a pattern of uniformly scattering line segments from the white center to the periphery. The design of the alignment mark pattern comprises simple patterns and complex patterns, the size of the patterns is 70-140 mu m, and a designer can select the shape and the size of the alignment mark pattern according to the chip design requirement so as to improve the accuracy of exposure alignment.
While only certain embodiments of the present invention have been described, it will be apparent to those skilled in the art that other modifications and improvements can be made without departing from the inventive concept of the present invention.
Claims (6)
1. The process method for exposure alignment in the multilayer high-density package is characterized by comprising the following steps of:
s1: designing mask files and alignment mark patterns
Drawing each layer of mask files in drawing software, drawing at least four alignment mark patterns on each layer of mask files, wherein the alignment mark patterns are axisymmetric patterns, taking the central point of a chip size frame containing the outermost circle of scribing channels as an origin, acquiring the coordinate value of the geometric central point of the alignment mark patterns, and aiming at the condition that the coordinate values of the central points of the alignment mark patterns in the upper and lower adjacent mask files are different, wherein the distance between the alignment mark patterns in different layers of mask files is at least more than 400 mu m;
s2: mask plate manufacturing
Manufacturing each layer of mask according to the designed mask file, wherein each manufactured layer of mask is provided with an alignment mark pattern;
s3: patterning a first layer of photoresist
Using the first layer mask plate prepared in the step S2 to form a first layer of photoetching pattern on a wafer product through gluing, exposing, developing and curing, and forming an alignment mark pattern on the first layer of photoetching pattern;
s4: manufacturing a second layer of photoetching pattern and a subsequent photoetching pattern
Inputting the coordinate value of the geometric center point of the alignment mark pattern of the upper layer obtained in the step S1 into a photoetching machine, identifying the alignment mark pattern formed by the upper layer of the wafer product by the photoetching machine, aligning the photoetching machine according to the coordinate value of the geometric center point of the alignment mark pattern of the upper layer and the position of the alignment mark pattern formed by the identified upper layer, namely finishing the accurate alignment of the layer which needs photoetching and the upper layer, then exposing to finish a new layer of photoetching pattern, and repeating the step if a multi-layer packaging structure exists until the packaging is finished;
s5: lithography inspection
And confirming whether the product is qualified after the photoetching process.
2. The process of exposure alignment in multi-layer high-density package of claim 1, wherein at least one alignment mark pattern is disposed on four sides of the chip size frame in each layer of mask file, and at least one group of alignment mark patterns in the alignment mark patterns on the opposite sides in each layer of mask file has the same pattern and the same size.
3. The process of exposing and aligning in a multi-layer high density package according to claim 2 wherein the alignment mark patterns of each set of opposite sides in each layer of reticle file are different from the alignment mark patterns of adjacent sets of opposite sides.
4. The process method for exposure alignment in multi-layer high-density packaging according to claim 1, wherein four alignment mark patterns are arranged in each layer of mask file, the four alignment mark patterns are respectively distributed on a group of opposite sides in pairs, and the patterns of the two alignment mark patterns which are positioned on the cross symmetrical position with the center point of the chip size frame as the center are identical and have the same size.
5. The process method for exposure alignment in multi-layer high-density packaging according to claim 1, wherein the pattern of the alignment mark pattern is a T-shape, or two cross shapes which are perpendicular to each other and have the same length, or two cross shapes which are perpendicular to each other and have different lengths, or two L-shapes which have the same side lengths, or H-shapes, or I shapes, or Chinese character shapes, or well shapes, or king shapes, or Chinese character shapes, or a quarter-turn structure with a white center, or a pattern with a uniformly scattered line segment with a white center to the periphery.
6. The process of exposure alignment in multi-layer high density package according to claim 1, wherein the photoresist thickness of each layer of the photoresist pattern formed after curing is 5-10 μm, and the opening size of the alignment mark pattern formed is 70-140 μm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311009444.7A CN116736652B (en) | 2023-08-11 | 2023-08-11 | Process method for exposure alignment in multilayer high-density packaging |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311009444.7A CN116736652B (en) | 2023-08-11 | 2023-08-11 | Process method for exposure alignment in multilayer high-density packaging |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN116736652A CN116736652A (en) | 2023-09-12 |
| CN116736652B true CN116736652B (en) | 2023-10-27 |
Family
ID=87918970
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202311009444.7A Active CN116736652B (en) | 2023-08-11 | 2023-08-11 | Process method for exposure alignment in multilayer high-density packaging |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116736652B (en) |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5532091A (en) * | 1994-03-09 | 1996-07-02 | Nikon Corporation | Aligning method |
| JP2006049805A (en) * | 2004-07-05 | 2006-02-16 | Seiko Epson Corp | Method of measuring pattern alignment accuracy, method of forming pattern, manufacturing method of semiconductor device, and electro-optical device |
| CN102866604A (en) * | 2012-09-17 | 2013-01-09 | 上海华力微电子有限公司 | Mask plate alignment mark arrangement method |
| CN105280538A (en) * | 2015-09-18 | 2016-01-27 | 江苏中科君芯科技有限公司 | IGBT back side manufacturing method capable of realizing refining photolithography of back side |
| CN105954985A (en) * | 2016-06-30 | 2016-09-21 | 上海华力微电子有限公司 | Method for measuring overlay precision of photoetching process, and mask plate |
| CN110531591A (en) * | 2019-08-30 | 2019-12-03 | 上海华力微电子有限公司 | Alignment precision modification method |
| CN111505910A (en) * | 2020-05-08 | 2020-08-07 | 长江存储科技有限责任公司 | Alignment method of overlay mark |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8638438B2 (en) * | 2011-08-17 | 2014-01-28 | International Business Machines Corporation | Self-calibrated alignment and overlay target and measurement |
-
2023
- 2023-08-11 CN CN202311009444.7A patent/CN116736652B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5532091A (en) * | 1994-03-09 | 1996-07-02 | Nikon Corporation | Aligning method |
| JP2006049805A (en) * | 2004-07-05 | 2006-02-16 | Seiko Epson Corp | Method of measuring pattern alignment accuracy, method of forming pattern, manufacturing method of semiconductor device, and electro-optical device |
| CN102866604A (en) * | 2012-09-17 | 2013-01-09 | 上海华力微电子有限公司 | Mask plate alignment mark arrangement method |
| CN105280538A (en) * | 2015-09-18 | 2016-01-27 | 江苏中科君芯科技有限公司 | IGBT back side manufacturing method capable of realizing refining photolithography of back side |
| CN105954985A (en) * | 2016-06-30 | 2016-09-21 | 上海华力微电子有限公司 | Method for measuring overlay precision of photoetching process, and mask plate |
| CN110531591A (en) * | 2019-08-30 | 2019-12-03 | 上海华力微电子有限公司 | Alignment precision modification method |
| CN111505910A (en) * | 2020-05-08 | 2020-08-07 | 长江存储科技有限责任公司 | Alignment method of overlay mark |
Also Published As
| Publication number | Publication date |
|---|---|
| CN116736652A (en) | 2023-09-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0061536A1 (en) | Method of manufacturing a semiconductor device having improved alignment marks and alignment marks for said method | |
| CN110824847B (en) | Etching method for improving overlay accuracy | |
| KR960014963B1 (en) | Manufacturing method of semiconductor device | |
| US5128283A (en) | Method of forming mask alignment marks | |
| KR20080006947A (en) | Method for manufacturing fine pattern of a semiconductor device | |
| CN115356898A (en) | Method for improving photoetching alignment precision | |
| CN116736652B (en) | Process method for exposure alignment in multilayer high-density packaging | |
| JPH09129551A (en) | Minute pattern alignment method of semiconductor element | |
| US20050026385A1 (en) | Method for manufacturing a semiconductor device and semiconductor device with overlay mark | |
| CN112034677A (en) | Overlay mark, overlay mark method and overlay measuring method | |
| CN105182681B (en) | A kind of mask plate and the method that a variety of depth structures are processed on same silicon wafer | |
| CN115729030A (en) | Mask plate with photoetching self-alignment precision measurement structure and photoetching method | |
| KR970010569B1 (en) | Fabrication method of semiconductor device | |
| KR100215897B1 (en) | Method of forming overlay pattern used in measuring alignment | |
| US6838217B1 (en) | Define overlay dummy pattern in mark shielding region to reduce wafer scale error caused by metal deposition | |
| US6962762B2 (en) | Exposure positioning in photolithography | |
| CN105404101A (en) | Developing-solution-nozzle checking template and method | |
| CN112882340B (en) | Photomask, monitoring wafer and method for monitoring wafer surface cleaning precision | |
| KR20050120072A (en) | Alignment mark in semiconductor device and method for aligning substrate using the same | |
| KR20050101587A (en) | Measurement method for overlay | |
| KR960014961B1 (en) | Manufacturing method of semiconductor device | |
| CN116931389B (en) | Line width measuring method | |
| CN117406546B (en) | Mask plate and pattern correction method thereof | |
| CN113721431A (en) | Wafer exposure method | |
| US6775920B2 (en) | Method of fabricating semiconductor device comprising superposition inspection step |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |