CN116344560A

CN116344560A - Photoelectric sensor, forming method thereof and electronic equipment

Info

Publication number: CN116344560A
Application number: CN202111581747.7A
Authority: CN
Inventors: 任惠; 阎大勇; 王志高
Original assignee: Semiconductor Manufacturing International Shanghai Corp; Semiconductor Manufacturing International Beijing Corp
Current assignee: Semiconductor Manufacturing International Shanghai Corp; Semiconductor Manufacturing International Beijing Corp
Priority date: 2021-12-22
Filing date: 2021-12-22
Publication date: 2023-06-27

Abstract

A photoelectric sensor, a forming method thereof, and an electronic device, the photoelectric sensor includes: the dielectric layer is positioned on the second surface of the pixel substrate and is positioned on the surface of the logic substrate; an interconnection layer located in the dielectric layer; the connecting structure is positioned in the dielectric layer below the orthographic projection of the pixel unit area of the pixel substrate and is respectively contacted with the interconnection layer in the dielectric layer and the pixel substrate; a first opening in the pixel substrate of the lead region exposing the top surface of the dielectric layer; a second opening in the dielectric layer below the first opening exposing a top surface of the interconnect layer; a pad layer located in the first opening and the second opening and contacting with the interconnection layer in the dielectric layer; a passivation layer filling the first opening and the second opening and located on the first surface, the passivation layer covering the pad layer and the conductive layer; and the metal grid penetrates through the passivation layer above the isolation structure and is in contact with the conductive layer. The embodiment of the invention optimizes the performance of the photoelectric sensor.

Description

Photoelectric sensor, forming method thereof and electronic equipment

Technical Field

The embodiment of the invention relates to the field of semiconductor manufacturing, in particular to a photoelectric sensor, a forming method thereof and electronic equipment.

Background

A photosensor is a device that converts an optical signal into an electrical signal. The working principle is based on the photoelectric effect, which means that when light irradiates on certain substances, electrons of the substances absorb photon energy and corresponding electric effect phenomenon occurs.

For example, CCD (Charge Coupled Device ) image sensors and CMOS image sensors, which are widely used in digital cameras and other electronic optical devices, convert an optical image into an electrical signal by using a photoelectric conversion function and output the digital image. ToF (Time of Flight) distance sensor, for example: DTOF (Direct Time of Flight ) sensor, records the time at which the light pulse is emitted and detected, converting the time difference into distance information. The technique can be used in various ranging scenarios such as autopilot, sweeping robot, VR (Virtual Reality)/AR (Augmented Reality) modeling, etc.

However, the performance of the current photoelectric sensor still needs to be improved.

Disclosure of Invention

The embodiment of the invention solves the problem of providing a photoelectric sensor, a forming method thereof and electronic equipment, and optimizes the performance of the photoelectric sensor.

To solve the above problems, an embodiment of the present invention provides a photoelectric sensor, including: the pixel substrate comprises a first surface and a second surface which are opposite to each other, the pixel substrate comprises a photosensitive area and a lead area surrounding the photosensitive area, and the photosensitive area comprises pixel unit areas which are arranged in an array; the isolation structure penetrates through the pixel substrate between the adjacent pixel unit areas and comprises a conductive layer, the top surface of the conductive layer is exposed out of the first surface, and the isolation structure is located in the photosensitive area; the dielectric layer is positioned on the second surface of the pixel substrate and is positioned on the surface of the logic substrate; the interconnection layer is positioned in the dielectric layer; the connecting structure is positioned in the dielectric layer below the orthographic projection of the pixel unit area of the pixel substrate and is respectively contacted with the interconnection layer in the dielectric layer and the pixel substrate; a first opening in the pixel substrate of the lead region exposing the top surface of the dielectric layer; a second opening in the dielectric layer below the first opening and exposing a top surface of the interconnect layer; a pad layer located in the first opening and the second opening and contacting with the interconnection layer in the dielectric layer; a passivation layer filling the first and second openings and on the first surface, the passivation layer covering the pad layer and the conductive layer; and the metal grid penetrates through the passivation layer above the isolation structure and is in contact with the conductive layer.

Correspondingly, the embodiment of the invention also provides a method for forming the photoelectric sensor, which comprises the following steps: providing a pixel substrate, wherein the pixel substrate comprises a first surface and a second surface which are opposite to each other, the pixel substrate comprises a photosensitive area and a lead area surrounding the photosensitive area, the photosensitive area comprises pixel unit areas which are arranged in an array, an isolation structure penetrating through the pixel substrate is formed between the pixel unit areas, the isolation structure comprises a conductive layer, and the top surface of the conductive layer is exposed out of the first surface; a dielectric layer is formed on the second surface, and an interconnection layer is formed in the dielectric layer; a connecting structure is further formed in the dielectric layer below the orthographic projection of the pixel unit area of the pixel substrate, and the connecting structure is respectively contacted with the interconnection layer in the dielectric layer and the pixel substrate; forming a first opening penetrating through the pixel substrate of the lead area and a second opening in the dielectric layer below the first opening, wherein the second opening exposes the top surface of the interconnection layer; forming a bonding pad layer in the first opening and the second opening, wherein the bonding pad layer is contacted with the interconnection layer; forming a passivation layer filling the first and second openings and on the first surface, the passivation layer covering the pad layer and the conductive layer; a metal mesh is formed through the passivation layer over the isolation structure and in contact with the conductive layer.

Compared with the prior art, the technical scheme of the embodiment of the invention has the following advantages:

in the photoelectric sensor provided by the embodiment of the invention, the connection structure is respectively contacted with the interconnection layer and the pixel substrate, the welding pad layer is contacted with the interconnection layer in the dielectric layer, and the metal grid penetrates through the passivation layer above the isolation structure and is contacted with the conductive layer, so that when the photoelectric sensor works, the metal grid can be easily electrically connected with the pixel substrate right above the connection structure, the electrical property of the conductive layer is led out, and the conductive layer of the isolation structure can be correspondingly connected with the negative potential by applying the negative potential to the welding pad layer, thereby being beneficial to adsorbing positive charges on the side wall of the isolation structure, correspondingly improving the interface state of the side wall of the isolation structure and reducing the dark current of a pixel unit; in addition, the embodiment of the invention can enable the conductive layer of the isolation structure to be connected with the negative potential by applying the negative potential to the bonding pad layer, so that the bonding pad layer electrically connected with the metal grid is not required to be additionally arranged on the passivation layer on the first surface, the high consistency of the bonding pad layer of the photoelectric sensor is correspondingly ensured, and the complexity of packaging test is further reduced.

In the method for forming the photoelectric sensor provided by the embodiment of the invention, the medium layer is also provided with the connection structure which is respectively contacted with the interconnection layer and the pixel substrate, and the metal grid which penetrates through the passivation layer above the isolation structure and is contacted with the conductive layer is formed; in addition, the embodiment of the invention can enable the conductive layer of the isolation structure to be connected with the negative potential by applying the negative potential to the bonding pad layer, so that the bonding pad layer electrically connected with the metal grid is not required to be additionally formed on the passivation layer on the first surface, the height consistency of the bonding pad layer of the photoelectric sensor is correspondingly ensured, and the complexity of the subsequent packaging process and test is further reduced.

Drawings

Fig. 1 to 6 are schematic structural views corresponding to steps in a method for forming a photoelectric sensor;

FIGS. 7 to 8 are schematic structural views of an embodiment of a photosensor according to the present invention;

fig. 9 to 18 are schematic structural views corresponding to each step in an embodiment of a method for forming a photoelectric sensor according to the present invention.

Detailed Description

As known from the background art, the performance of the current photoelectric sensor needs to be improved. The reason why the performance of a photoelectric sensor is to be improved is now analyzed in conjunction with a method of forming a photoelectric sensor.

Fig. 1 to 6 are schematic structural views corresponding to each step in a method for forming a photoelectric sensor.

Referring to fig. 1, a pixel substrate 10 is provided, including a first surface 11 and a second surface 12 opposite to each other, the pixel substrate 10 includes a photosensitive region 10P and a lead region 10N surrounding the photosensitive region 10P, the photosensitive region 10P includes pixel unit regions (not shown) arranged in an array, an isolation structure 13 is formed in the pixel substrate 10 between the pixel unit regions, and a top surface of the isolation structure 13 is exposed from the first surface 11; a dielectric layer 14 is formed on the second surface 12, and an interconnection layer 15 is formed in the dielectric layer 14 of the lead area 10N; a logic substrate is also bonded to the dielectric layer 14 of the second surface 12.

Referring to fig. 2, an opening 16 is formed through the pixel substrate 10 of the lead region 10N and the dielectric layer 14 over the interconnect layer 15, the opening 16 exposing a portion of the top of the interconnect layer 15 toward the first surface 11.

Referring to fig. 3, a pad layer 17 contacting the interconnect layer 15 is formed at the bottom of the opening 16.

Referring to fig. 4, a passivation layer 18 is formed filling the opening 16 and being located on the first surface 11, the passivation layer 18 covering the pad layer 17 and the top surface of the isolation structure 13.

Referring to fig. 5, a metal mesh 19 is formed on the passivation layer 18 on top of the isolation structure 13.

Referring to fig. 6, after forming the metal mesh 19, an interconnection trench 20 penetrating the passivation layer 18 above the pad layer 17 is formed, exposing the pad layer 17.

In the above-mentioned method for forming a photoelectric sensor, the step of forming an isolation structure generally includes: forming an isolation trench in the pixel substrate 10 between adjacent pixel cell areas; an isolation structure is formed within the isolation trench. The isolation trench is usually formed by an etching process, the isolation structure is formed in the isolation trench by a filling process, after the etching process and the filling process are performed, interface states are usually generated on the side wall of the isolation structure, the surface of the interface states can absorb negative charge electron layers in an inverted mode, and dark current of the pixel unit can be increased due to the existence of the interface states.

In order to prevent dark current caused by interface states, P-type ion implantation is typically performed on the pixel substrate before bonding of the pixel substrate to the logic substrate is achieved. By carrying out P-type ion implantation, the negative charge electron layer in the interface state can be neutralized to a certain extent, the problem of dark current caused by the interface state is correspondingly improved,

However, in the field of photosensors, the absorption thickness and optical path length of light are generally increased by increasing the thickness of the pixel substrate, thereby increasing photon detection efficiency and thus photon detection sensitivity.

With the gradual increase of the thickness of the pixel substrate, when the thickness of the pixel substrate is greater than the maximum depth of ion implantation, the side wall of the isolation structure cannot be completely surrounded by P-type ions, and when the photoelectric sensor works, the side wall of the isolation structure which is not surrounded by the P-type ions can increase the dark current of the pixel.

In addition, when the first surface is the back surface of the pixel substrate, since the front-stage device is already formed when ion implantation is performed, even if ion implantation can be performed, the implanted ions cannot be subjected to a high-temperature activation process, and the ion implantation cannot be activated to perform a corresponding function.

In order to solve the technical problems, the embodiment of the invention provides a photoelectric sensor, wherein a connecting structure is respectively contacted with an interconnection layer and a pixel substrate, a welding pad layer is contacted with the interconnection layer in a dielectric layer, and a metal grid penetrates through a passivation layer above an isolation structure and is contacted with a conductive layer, so that when the photoelectric sensor works, the metal grid can be easily electrically connected with the pixel substrate right above the connecting structure, the electrical property of the conductive layer is led out, and correspondingly, the conductive layer of the isolation structure can be connected with the negative potential by applying the negative potential to the welding pad layer, thereby being beneficial to adsorbing positive charges on the side wall of the isolation structure, correspondingly improving the interface state of the side wall of the isolation structure and reducing the dark current of a pixel unit; in addition, the embodiment of the invention can enable the conductive layer of the isolation structure to be connected with the negative potential by applying the negative potential to the bonding pad layer, so that the bonding pad layer electrically connected with the metal grid is not required to be additionally arranged on the passivation layer on the first surface, the high consistency of the bonding pad layer of the photoelectric sensor is correspondingly ensured, and the complexity of packaging test is further reduced.

In order that the above objects, features and advantages of embodiments of the invention may be readily understood, a more particular description of the invention will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings. Referring to fig. 7 and 8, fig. 7 is a cross-sectional view, and fig. 8 is a top view corresponding to fig. 7, showing a schematic structural diagram of an embodiment of a photoelectric sensor according to the present invention.

As an example, the present embodiment is described with a photoelectric sensor as a TOF (Time of Flight) sensor as an example. More specifically, the photosensor may be a DTOF (Direct Time of Flight ) sensor. In other embodiments, the photosensor may also be an iTOF (indirect Time of Flight ) sensor.

In other embodiments, the photosensor may also be a CCD (Charge Coupled Device ) image sensor, a CMOS image sensor, or other type of photosensor.

As shown in fig. 7 and 8, in the present embodiment, the photoelectric sensor includes: a pixel substrate 100 including a first surface 101 and a second surface 102 opposite to each other, the pixel substrate including a photosensitive region 100P and a lead region 100N surrounding the photosensitive region 100P, the photosensitive region 100P including pixel unit regions (not shown) arranged in an array; the isolation structure penetrates through the pixel substrate 100 between the adjacent pixel unit areas, the isolation structure comprises a conductive layer 110, the top surface of the conductive layer 110 is exposed out of the first surface 101, and the isolation structure is located in the photosensitive area 100P; a dielectric layer 120 on the second surface 102 of the pixel substrate 100, the dielectric layer 120 being on the logic substrate surface; an interconnect layer located in the dielectric layer 120; a connection structure 115 located in the dielectric layer 120 below the orthographic projection of the pixel unit area of the pixel substrate 100, where the connection structure 115 is respectively contacted with the interconnection layer in the dielectric layer 120 and the pixel substrate 100; a first opening 141 (shown in fig. 10) located in the pixel substrate 100 of the lead region 100N and exposing the top surface of the dielectric layer 120; a second opening 142 (shown in fig. 10) located within the dielectric layer 120 under the first opening 141 and exposing a top surface of the interconnect layer; a pad layer 150 located in the first and

second openings

141 and 142 and contacting the interconnect layer in the dielectric layer 120; a passivation layer 160 filling the first and

second openings

141 and 142 and on the first surface 101, the passivation layer 160 covering the pad layer 150 and the conductive layer 110; a metal mesh 210 penetrates the passivation layer 230 over the isolation structure and contacts the conductive layer 110.

The pixel substrate 100 is used to provide an operational platform for the formation of photosensors.

In this embodiment, the pixel base 100 includes a substrate (not shown). In particular, the material of the substrate may include one or more of silicon, germanium, silicon carbide, gallium arsenide, and indium gallium. As one example, the substrate is a silicon substrate. In other embodiments, the substrate may also be a silicon-on-insulator substrate or a germanium-on-insulator substrate, among other types of substrates.

In this embodiment, the first surface 101 is a back surface of the pixel substrate 100, and the second surface 102 is a front surface of the pixel substrate 100. Specifically, the pixel substrate 100 is a backside illuminated (Backside Illumination, BSI) pixel wafer, and the first surface 101 of the pixel substrate 100 is a light-receiving surface.

The pixel substrate 100 includes a photosensitive region 100P, and the photosensitive region 100P is configured to receive an optical signal and convert the optical signal into an electrical signal. In this embodiment, the photosensitive area 100P includes an array of pixel unit areas, in which pixel units (not shown) are formed, and the pixel units are configured to receive optical signals so as to convert the optical signals into electrical signals.

In the photosensitive area 100P, one of the pixel unit areas is used as a preset pixel unit area 100px. The pixel substrate 100 of the preset pixel unit area 100px is used for connecting with the connection structure 115 and the ground line 220, so as to realize the electrical connection between the connection structure 115 and the ground line 220.

The lead region 100N is used for wiring and forming leads to make electrical connection between the pixel cell or other device structure and external circuitry.

The isolation structure is used to reduce optical and electrical crosstalk between adjacent pixel cells. The isolation structure penetrates through the pixel substrate 100 to realize electrical isolation between the pixel substrates 100 of the adjacent pixel unit areas, thereby preventing leakage of electricity in the pixel substrate 100 of the adjacent pixel unit areas when the pixel substrate 100 is electrified through the pad layer 150, the second interconnection layer 112, the first interconnection layer 111 and the connection structure 115.

In this embodiment, the isolation structure is a deep trench isolation (Deep Trench Isolation, DTI) structure.

In this embodiment, the isolation structure includes the conductive layer 110, so that a voltage is applied to the conductive layer 110 to enable the conductive layer 110 to be connected to a negative potential, thereby adsorbing positive charges on the sidewall of the isolation structure, thereby being beneficial to improving the interface state of the sidewall of the isolation structure and reducing the dark current of the pixel unit.

The end of the conductive layer 110 is exposed on the first surface 101, so that the metal grid 210 can be located on the first surface 101 and contact with the conductive layer 110, and further, the electrical property of the conductive layer 110 is led out through the metal grid 210.

In this embodiment, the material of the conductive layer 110 is a metal material. The metal material has good conductivity, is usually an opaque material, and can also play a role in isolating light between adjacent pixel units.

In this embodiment, the material of the conductive layer 110 includes one or more of tungsten, aluminum, titanium nitride, tantalum nitride, and copper. As an embodiment, the material of the conductive layer 110 is tungsten, which is not easy to diffuse and has superior hole filling capability, so that the filling effect of the conductive layer 110 in the deep trench is improved, and the tungsten is a light-tight metal material, which can play a role in light isolation, and is beneficial to making the reduction effect of the isolation structure on the optical crosstalk between adjacent pixel units more remarkable.

In this embodiment, the isolation structure further includes: an insulating layer (not shown) is further formed between the conductive layer 110 and the pixel substrate 100, and between the conductive layer 110 and the dielectric layer 120. The insulating layer serves to insulate between the conductive layer 110 and the pixel substrate 100.

In this embodiment, the material of the insulating layer includes any one or more of silicon nitride, silicon oxide, aluminum oxide, titanium oxide, hafnium oxide, zirconium oxide, magnesium oxide, calcium oxide, yttrium oxide, tantalum oxide, strontium oxide, lanthanum oxide, and barium oxide.

In this embodiment, an insulating layer is also formed on the first surface 101 on the side of the conductive layer 110.

In this embodiment, the insulating layer includes a negatively charged dielectric layer (not shown), which has a more comprehensive negative charge than the conventional dielectric layer, and the negative charge can increase hole accumulation at the interface of the negatively charged dielectric layer, and can correspondingly collect holes at the bottom and the side wall of the isolation structure, so as to form a P-type protection structure, which is beneficial to improving the leakage problem of the side wall of the isolation structure.

More specifically, the material of the negatively charged dielectric layer comprises a high-k dielectric material. As an example, the high-k dielectric material includes any one or more of aluminum oxide, titanium oxide, hafnium oxide, zirconium oxide, magnesium oxide, calcium oxide, yttrium oxide, tantalum oxide, strontium oxide, lanthanum oxide, and barium oxide.

An interconnection layer is formed in the dielectric layer 120, and the dielectric layer 120 is used for realizing isolation between the interconnection layers.

The material of the dielectric layer 120 is a dielectric material, for example: one or more of silicon oxide, silicon nitride, silicon oxynitride, low-k dielectric material, and ultra-low-k dielectric material.

The interconnect layer is used to make electrical connection between the pixel cells and also between the pixel cells and an external circuit or other interconnect structure. In particular, the interconnect layer includes one or more layers of interconnect lines.

The material of the interconnect layer is a metal, for example: copper, aluminum, tungsten, cobalt, nickel, titanium, tantalum, titanium nitride, and tantalum nitride.

In this embodiment, the interconnection layer in the dielectric layer 120 of the photosensitive region 100P and the interconnection layer in the dielectric layer of the lead region 100N are electrically connected to each other, so as to realize electrical connection between the pixel unit and the pad layer 150.

Specifically, in the present embodiment, the interconnect layers include a first interconnect layer 111 located within the dielectric layer 100P of the photosensitive region 100P, and a second interconnect layer 112 located in the dielectric layer 120 of the lead region 100N, the second interconnect layer 112 being electrically connected to the first interconnect layer 111.

The first and second interconnection layers 111 and 112 serve to make electrical connection between the pixel unit and the pad layer 150, thereby making electrical connection between the pixel unit and an external circuit.

The connection structure 115 is in contact with the first interconnection layer 111 and with the pixel substrate 100 at a position of orthographic projection of the pixel unit area of the pixel substrate 100, thereby achieving electrical connection between the pixel substrate 100 and the interconnection layer 111.

Specifically, the connection structure 115 is located in the dielectric layer 120 of the preset pixel unit area 100px, and the connection structure 115 is respectively in contact with the first interconnection layer 111 and the pixel substrate 100, so as to implement electrical connection between the pixel substrate 100 of the preset pixel unit area 100px and the first interconnection layer 111.

It should be noted that, in this embodiment, the interconnection layer further includes: a third interconnect layer 113 in the dielectric layer 120 of the photosensitive region 100P and the wiring region 100N, the third interconnect layer 113 being located on a side of the first interconnect layer 111 away from the second surface 102 and on a side of the second interconnect layer 112 away from the second surface; and a first conductive plug 121 between the first interconnect layer 111 and the third interconnect layer 113, and a second conductive plug 122 between the second interconnect layer 112 and the third interconnect layer 113, the first conductive plug 121 for making an electrical connection between the first interconnect layer 111 and the third interconnect layer 113, the second conductive plug 122 for making an electrical connection between the second interconnect layer 112 and the third interconnect layer 113.

The electrical connection between the first interconnect layer 111 and the second interconnect layer 112 is achieved by the third interconnect layer 113, and the first conductive plug 121 and the second conductive plug 122.

The materials of the third interconnection layer 113, and the first and second

conductive plugs

121 and 122 are metals, for example: copper, aluminum, tungsten, cobalt, nickel, titanium, tantalum, titanium nitride, and tantalum nitride.

In this embodiment, the connection structure 115 penetrates the dielectric layer 120 between the first interconnection layer 111 and the pixel substrate 100 of the preset pixel unit area 100px, and contacts with the first interconnection layer 111 and the pixel substrate 100, respectively, so as to realize electrical connection between the first interconnection layer 111 and the pixel substrate 100 of the preset pixel unit area 100 px.

In this embodiment, the connection structure 115 is formed in a back-end-of-line process. In this embodiment, the material of the connection structure 115 is the same as that of the first conductive plug 121 and the second conductive plug 122, for example: copper, aluminum, tungsten, cobalt, nickel, titanium, tantalum, titanium nitride, and tantalum nitride.

In this embodiment, the photoelectric sensor further includes: the logic substrate 200 is bonded to the dielectric layer 120 of the second surface 102 of the pixel substrate 100.

The Logic substrate 200 serves as a Logic Wafer (Logic Wafer) for analyzing the electrical signals provided by the pixel substrate 100. Specifically, a logic device for analyzing and processing the electrical signal supplied from the pixel substrate 100 is formed in the logic substrate 200.

By disposing the pixel region (i.e., the photosensitive region 100P) and the logic region on different substrates, and bonding the pixel substrate 100 and the logic substrate 200 together, the pixel area is advantageously increased, the path of light reaching the photoelectric element is also advantageously shortened, the scattering of light is reduced, the light is more focused, the photosensitive capability of the photoelectric sensor in a weak light environment is further improved, and system noise and crosstalk are reduced.

As an embodiment, the bonding between the logic substrate 200 and the dielectric layer 120 of the second surface 102 of the pixel substrate 100 is achieved by Hybrid bonding (Hybrid bonding).

The first and

second openings

141 and 142 serve to provide a spatial location for forming the pad layer 150, and the second opening 142 exposes a top surface of the interconnect layer so that the pad layer 150 located within the first and

second openings

141 and 142 can be connected to the interconnect layer, thereby achieving electrical connection between the pad layer 150 and the interconnect layer.

Specifically, the second opening 142 exposes a top surface of the second interconnect layer 112 so that the pad layer 150 can contact the second interconnect layer 112, thereby making electrical connection between the pad layer 150 and the second interconnect layer 112.

In this embodiment, the first opening 141 and the second opening 142 are connected to each other to form an opening 140 (refer to fig. 10). The opening 140 penetrates the pixel substrate 100 of the lead region 100N and the dielectric layer 120 above the second interconnect layer 112, and the opening 140 exposes a portion of the top of the second interconnect layer 112 facing the first surface 101.

The bond pad layer 150 is in contact with the interconnect layer for making electrical connection between the interconnect layer and an external circuit or other interconnect structure.

In this embodiment, the pad layer 150 is located at the bottom of the opening 140 and contacts the second interconnect layer 112, and the pad layer 150 is used for accessing a negative potential.

In this embodiment, when the photoelectric sensor works, the metal grid 210 can be easily electrically connected with the pixel substrate 100 directly above the connection structure, so that the electrical property of the conductive layer 110 is led out, and correspondingly, the conductive layer 110 of the isolation structure can be connected to the negative potential by applying the negative potential to the pad layer 150, so that positive charges are adsorbed on the side wall of the isolation structure, the interface state of the side wall of the isolation structure is improved, and the dark current of the pixel unit is reduced.

In this embodiment, the pad layer 150 is located at the bottom of the opening 140 and contacts the second interconnect layer 112, and the pad layer 150 is used for accessing a negative potential. Specifically, when the photoelectric sensor operates, the conductive layer 110 of the isolation structure can be connected to a negative potential by applying the negative potential to the pad layer 150 through the pad layer 150, the second interconnect layer 112, the first interconnect layer 111, the connection structure 115, the pixel substrate 100, and the ground line, which are sequentially connected.

In addition, in this embodiment, by applying a negative potential to the pad layer 150, the conductive layer 110 of the isolation structure is connected to the negative potential, so that the pad layer electrically connected to the metal grid does not need to be additionally formed on the first surface, and accordingly, the height consistency of the pad layer 150 of the photoelectric sensor is ensured, and further, the complexity of the subsequent packaging process and testing is reduced.

In addition, compared with the mode of improving the interface state of the side wall of the isolation structure by carrying out P-type ion doping on the pixel substrate, the embodiment is also beneficial to avoiding being limited by the ion doping depth, and the absorption thickness and the optical path of light are increased by increasing the thickness of the pixel substrate 100 correspondingly, so that the photon detection efficiency of a photosensitive area is improved, and the photon detection sensitivity performance of the photoelectric sensor is improved.

In summary, this embodiment optimizes the performance of the photosensor.

The material of pad layer 150 is a conductive material. In this embodiment, the material of the pad layer 150 includes one or more of aluminum, titanium, gold, and tin-doped indium oxide. As an example, the material of the pad layer 150 is aluminum. Aluminum has good conductivity, and aluminum is a material that is easily etched, so that the first pad layer 150 is easily formed in a patterned manner.

The pad layer 150 is located in the opening 140, and the top surface of the pad layer 150 is lower than the first surface 101.

The passivation layer 160 fills the first and

second openings

141 and 142 to provide a flat surface for the formation process of the photo sensor. The passivation layer 160 also protects the pad layer 150 from the process.

A passivation layer 160 fills the opening 120 and is located on the first surface 101, the passivation layer 160 covering the pad layer 150 and the conductive layer 110.

In this embodiment, the material of the passivation layer 160 is an insulating material, and the material of the passivation layer 160 includes one or more of silicon oxide, silicon oxynitride, and silicon nitride. As an embodiment, the passivation layer 160 is made of silicon oxide.

The metal mesh 210 corresponds to the position and shape of the isolation structure, and the area surrounded by the metal mesh 210 corresponds to each pixel cell area, thereby preventing optical crosstalk between adjacent pixel cells.

Specifically, the metal mesh 210 is a mesh-like structure, and the metal mesh 210 is located on the first surface 101 of the pixel substrate 100, that is, the metal mesh 210 is located on the back surface of the pixel substrate 100, and the metal mesh 210 is a back metal mesh.

The metal mesh 210 penetrates the passivation layer 160 over the isolation structure and is in contact with the conductive layer 110, so that the metal mesh 210 serves to make an electrical connection between the conductive layer 110 and the ground line 220.

In this embodiment, the metal mesh 210 is in contact with a portion of the top surface of the conductive layer 110, or the metal mesh 210 is in contact with the top surface of all of the conductive layer 110. Wherein, since the conductive layers 110 in the respective isolation structures are connected, even if the metal mesh 210 is in contact with only a portion of the top surface of the conductive layer 110, electrical connection between the entire conductive layer 110 and an external circuit can be achieved through the metal mesh 210.

In this embodiment, the material of the metal mesh 210 is a metal material, and the material of the metal mesh 210 includes one or both of aluminum and tungsten. As an example, the material of the metal mesh 210 is aluminum. Aluminum is a material which is easy to etch, so that a patterning process for forming the metal grid 210 is convenient to carry out, the aluminum is good in conductivity, the electric connection performance of the metal grid 210 is improved, and in addition, aluminum is an opaque material, so that the effect of reducing optical crosstalk between adjacent pixel units by the metal grid 210 is guaranteed.

In this embodiment, the photoelectric sensor further includes: and a ground line 220 penetrating the passivation layer 160 directly above the connection structure, the ground line 220 being in contact with the pixel substrate 100 and connected to the metal grid 210. Specifically, the ground line 220 penetrates the passivation layer 160 of the predetermined pixel unit area 100 px.

The ground line 220 is used to make electrical connection between the metal mesh 210 and the pixel substrate 100.

Also, during the formation of the metal mesh 210, more charges are generally generated, and the ground line 230 is in contact with the pixel substrate 100 for discharging charges through the pixel substrate 100 during the formation of the metal mesh 210, preventing charges from accumulating on the first surface 101 of the pixel substrate 100, thereby preventing arcing during the formation of the metal mesh 210.

In this embodiment, the material of the grounding wire 220 is a metal material. As an example, the material of the ground line 220 includes one or more of aluminum, titanium, gold, and tin-doped indium oxide.

In this embodiment, the material of the grounding wire 220 is the same as that of the metal mesh 210.

More specifically, in the present embodiment, the grounding wire 220 and the metal grid 210 are integrally formed, so that not only is the process flow simplified, but also the electrical connection performance between the grounding wire 220 and the metal grid 210 is improved.

Referring to fig. 8 in combination, as an embodiment, the ground line 220 is a ring structure surrounding a plurality of pixel unit areas, so as to increase the area of the ground line 220 and correspondingly reduce the resistance of the ground line 220. The shape of the ground line 220 is not limited thereto. In other embodiments, the shape of the ground wire may also be other shapes, such as: the ground wire may have a strip-like structure.

In this embodiment, the photoelectric sensor further includes: a protective layer 250 is positioned on the top surface and the side walls of the ground line 220 and the top surface and the side walls of the metal grid 210, and the protective layer 250 is also positioned on the passivation layer 160.

The protection layer 250 is used for protecting the metal mesh 210 and the ground line 220.

In this embodiment, the material of the protection layer 250 is silicon oxide. In other embodiments, the material of the protective layer may also be silicon nitride or silicon oxynitride.

In this embodiment, the photoelectric sensor further includes: the interconnect trench 240 penetrates the passivation layer 160 over the pad layer 150 and exposes the pad layer 150.

The interconnect trench 240 exposes the pad layer 150 to enable electrical connection between the pad layer 150 and an external circuit, such as: and the packaging and testing processes are facilitated.

In this embodiment, the interconnect trench 240 penetrates the passivation layer 160 and the protection layer 250 on top of the pad layer 250.

In order to solve the technical problem, the invention also provides a method for forming the photoelectric sensor. Fig. 9 to 18 are schematic structural views corresponding to each step in an embodiment of a method for forming a photoelectric sensor according to the present invention.

The method of forming the photoelectric sensor of the present embodiment will be described in detail below with reference to the accompanying drawings.

Referring to fig. 9, a pixel substrate 100 is provided, including a first surface 101 and a second surface 102 opposite to each other, the pixel substrate 100 includes a photosensitive region 100P and a lead region 100N surrounding the photosensitive region 100P, the photosensitive region 100P includes pixel unit regions (not labeled) arranged in an array, an isolation structure penetrating the pixel substrate 100 is formed between the pixel unit regions, the isolation structure includes a conductive layer 110, and a top surface of the conductive layer 110 is exposed from the first surface 101; a dielectric layer 120 is formed on the second surface 102, and an interconnection layer is formed in the dielectric layer 120; a connection structure 115 is further formed in the dielectric layer 120 under the orthographic projection of the pixel unit area of the pixel substrate 100, and the connection structure 115 is respectively contacted with the interconnection layer in the dielectric layer and the pixel substrate 100.

The pixel substrate 100 is used to provide an operation platform for subsequent processing.

One of the pixel unit areas is used as a preset pixel unit area 100px, and the pixel substrate 100 of the preset pixel unit area 100px is used to connect with the connection structure 115 and a subsequent ground line.

The isolation structure is used to reduce optical and electrical crosstalk between adjacent pixel cells. The isolation structure penetrates through the pixel substrate 100 to realize electrical isolation between the pixel substrates 100 of the adjacent pixel unit areas, so that when the pixel substrate 100 is electrified through the pad layer, the second interconnection layer 112, the first interconnection layer 111 and the connection structure 115, electric leakage can be prevented from occurring in the pixel substrate 100 of the adjacent pixel unit areas.

In this embodiment, the isolation structure includes the conductive layer 110, so that a voltage is applied to the conductive layer 110 subsequently, thereby adsorbing positive charges on the sidewall of the isolation structure, thereby being beneficial to improving the interface state of the sidewall of the isolation structure and reducing dark current of the pixel unit.

The end of the conductive layer 110 is exposed on the first surface 101, so that a metal grid contacting with the conductive layer 110 can be formed on the first surface 101 later, and the electrical property of the conductive layer 110 can be led out through the metal grid.

In this embodiment, an insulating layer (not shown) is further formed between the conductive layer 110 and the pixel substrate 100, and between the conductive layer 110 and the dielectric layer 120. The insulating layer serves to insulate between the conductive layer 110 and the pixel substrate 100.

In this embodiment, the interconnect layer in the dielectric layer 120 of the photosensitive region 100P and the interconnect layer in the dielectric layer of the lead region 100N are electrically connected to each other, thereby achieving electrical connection between the pixel unit and the pad layer 150.

The first interconnect layer 111 and the second interconnect layer 112 are used to make electrical connection between the pixel unit and the subsequent pad layer, thereby making electrical connection between the pixel unit and an external circuit.

The materials of the first interconnect layer 111 and the second interconnect layer 112 are metals, for example: copper, aluminum, tungsten, cobalt, nickel, titanium, tantalum, titanium nitride, and tantalum nitride.

The connection structure 115 is in contact with the first interconnection layer 111, and the pixel substrate 100 at the orthographic projection position of the pixel unit area of the pixel substrate 100 is in contact, thereby achieving electrical connection between the pixel substrate 100 and the interconnection layer 111.

The materials of the third interconnection layer 113, and the first and second

conductive plugs

In this embodiment, the connection structure 115 penetrates through the dielectric layer 120 under the pixel substrate 100 of the preset pixel unit area 100px and contacts with the first interconnection layer 111 and the pixel substrate 100 respectively, so as to realize electrical connection between the first interconnection layer 111 and the pixel substrate 100 of the preset pixel unit area 100 px.

In this embodiment, the logic substrate 200 is further bonded on the dielectric layer 120 of the second surface 102 of the pixel substrate 100. The Logic substrate 200 serves as a Logic Wafer (Logic Wafer) for analyzing the electrical signals provided by the pixel substrate 100. Specifically, a logic device for analyzing and processing the electrical signal supplied from the pixel substrate 100 is formed in the logic substrate 200.

As one example, the step of providing the pixel substrate 100 to which the logic substrate is bonded includes: providing a pixel substrate 100; providing a logic substrate 200; bonding between the dielectric layer 120 of the second side 102 of the pixel substrate 100 and the logic substrate 200 is achieved; after bonding is achieved, thinning processing is performed on the first surface 101 of the pixel substrate 100; after the thinning process is performed, an isolation structure penetrating the pixel substrate 100 is formed in the pixel substrate 100 between adjacent pixel unit regions.

In this embodiment, the step of forming the isolation structure includes: forming an isolation trench (not shown) in the pixel substrate 100 between adjacent pixel cell regions, the bottom of the isolation trench exposing the dielectric layer 120; an insulating layer on the sidewalls and bottom of the isolation trench, and a conductive layer 110 on the insulating layer and filling the isolation trench are formed.

In this embodiment, the process of forming the isolation trench includes: an anisotropic dry etching process. The anisotropic dry etching process has the characteristic of anisotropic etching, has higher process controllability and etching precision, is easy to realize an isolation trench with higher depth-to-width ratio, is favorable for enabling the isolation trench to have higher dimensional precision and profile controllability under the condition that the isolation trench penetrates through the pixel substrate 100, and is easy to realize higher etching selection ratio, so that the bottom of the isolation trench is easy to stop on the dielectric layer 120, and the probability of damaging the dielectric layer 120 is reduced.

In this embodiment, the step of forming the isolation structure in the isolation trench includes: forming an insulating layer on the sidewalls and bottom of the isolation trench, the insulating layer also being formed on the first surface 101; filling a conductive material layer in the isolation trench formed with the insulating layer, the conductive material layer being further formed on the insulating layer of the first surface 101; the layer of conductive material on the first surface 101 is removed and the remaining layer of conductive material filled in the isolation trenches is used as the conductive layer 110.

In this embodiment, the process of forming the insulating layer includes: one or more of an oxidation process, a chemical vapor deposition process, and an atomic layer deposition process. Wherein the oxidation process may comprise a decoupled plasma oxidation process.

In this embodiment, the process of filling the conductive material layer in the isolation trench includes one or more of a chemical vapor deposition process, a physical vapor deposition process, and an electrochemical plating process.

In this embodiment, a planarization process is used to remove the conductive material layer on the first surface 101. In particular, the planarization process may include a chemical mechanical planarization process.

Referring to fig. 10, a first opening 141 of the pixel substrate 100 penetrating the lead region 100N and a second opening 142 in the dielectric layer 120 under the first opening are formed, the second opening 142 exposing the top surface of the interconnect layer.

The first and

second openings

As an embodiment, the step of forming the opening 140 includes: forming a first opening 141 of the pixel substrate 100 penetrating the lead region 100N, the first opening exposing the dielectric layer 120; a second opening 142 is formed in the dielectric layer 120 under the first opening 141, the second opening 142 exposing a portion of the top of the second interconnect layer 112 facing the first surface 101, the second opening 142 and the first opening 141 constituting the opening 140.

As an example, the first opening 141 of the pixel substrate 100 penetrating the lead region 100N is formed using an anisotropic dry etching process. The anisotropic dry etching process has high etching profile control, and is beneficial to accurately controlling the profile shape of the first opening 141.

As an example, the second opening 142 in the dielectric layer 120 under the first opening 141 is formed using an anisotropic dry etching process. The anisotropic dry etching process has high etching profile control, is favorable for precisely controlling the profile of the second opening 142, and reduces the probability of misetching the interconnection layer 130.

In this embodiment, after forming the first opening 141 and before forming the second opening 142, the forming method further includes: isolation layers (not shown) are formed on the sidewalls and bottom of the first opening 141 and the first surface 101, and the isolation layers also cover the conductive layer 110.

The isolation layer is used for protecting the pixel substrate 100 and isolating the pixel substrate 100 from the subsequent pad layer. In this embodiment, the material of the isolation layer is silicon oxide.

Referring to fig. 11, a pad layer 150 is formed in the first and

second openings

141 and 142, and the pad layer 150 is in contact with the interconnection layer. The bond pad layer 150 is in contact with the interconnect layer for making electrical connection between the interconnect layer and an external circuit or other interconnect structure.

In this embodiment, a pad layer 150 is formed at the bottom of the opening 140 and contacts the second interconnect layer 112, and the pad layer 150 is used for accessing a negative potential.

The material of pad layer 150 is a conductive material. In this embodiment, the material of the pad layer 150 includes one or more of aluminum, titanium, gold, and tin-doped indium oxide. As an example, the material of the pad layer 150 is aluminum. Aluminum has good conductivity and is a material that is easily etched, thereby easily patterning the pad layer 150.

In this embodiment, the step of forming the pad layer 150 includes: forming a layer of pad material (not shown) on the bottom and sidewalls of the opening 140 and the first surface 101; a portion of the pad material layer at the first surface 101 and at the bottom of the opening 140 is removed, and the remaining pad material layer at the bottom of the opening 140 is used as a pad layer 150.

Referring to fig. 12 and 13, a passivation layer 160 filling the first and

second openings

141 and 142 and located on the first surface 101 is formed, the passivation layer 160 covering the pad layer 150 and the conductive layer 110.

The passivation layer 160 is used to fill the first and

second openings

141 and 142 to provide a flat surface for subsequent process steps. The passivation layer 160 also protects the pad layer 150 from the subsequent process.

In this embodiment, the step of forming the passivation layer 160 includes: as shown in fig. 12, a passivation material layer 155 is formed to fill the opening 140 and is further located on the first surface 101, the passivation material layer 155 covers the pad layer 150 and the conductive layer 110, and a groove (not labeled) corresponding to the opening 140 is formed in the passivation material layer 155; as shown in fig. 12, a pattern layer 145 is formed in the groove; as shown in fig. 13, the passivation material layer 155 exposed from the pattern layer 145 is thinned; as shown in fig. 13, the graphics layer 145 is removed; as shown in fig. 13, after the pattern layer 145 is removed, the passivation material layer 155 is planarized, and the remaining passivation material layer 155 is used as the passivation layer 160.

The passivation material layer 155 is used to form a passivation layer. As an example, the passivation material layer 155 is formed using a chemical vapor deposition process.

The pattern layer 145 serves as a mask for thinning the passivation material layer 155. In this embodiment, the material of the pattern layer 145 is photoresist.

By thinning the passivation material layer 155 exposed by the pattern layer 145, a thickness difference between the passivation material layer 155 on the top surface of the pixel substrate 100 and the passivation material layer 155 in the opening 140 is reduced, and a top surface height uniformity of the passivation material layer 155 is improved, which is beneficial to a subsequent planarization process of the passivation material layer 155.

Specifically, the passivation material layer 155 exposed from the pattern layer 145 is thinned by an etching process. The etching process facilitates precise control of the reduced thickness of the passivation material layer 155.

The passivation material layer 155 is planarized to improve the top surface flatness of the passivation layer, so as to provide a flat surface for a subsequent process. As an example, the passivation material layer 155 is planarized using a chemical mechanical polishing process.

In this embodiment, during the planarization process of the passivation material layer 155, the passivation material layer 155 on the top surface of the pixel substrate 100 is also kept to have a partial thickness so as not to damage the conductive layer 110 by the planarization process.

Referring to fig. 14-16, a metal mesh 210 (shown in fig. 16) is formed through the passivation layer 160 over the isolation structure and in contact with the conductive layer 110.

In this embodiment, in the step of forming the metal grid 210, a ground line 220 penetrating the passivation layer 160 directly above the connection structure and contacting the pixel substrate 100 is further formed, and the ground line 220 is electrically connected to the metal grid 210.

By forming the metal grid 10 in contact with the conductive layer 110 and the ground line 220 in contact with the pixel substrate 100 of the preset pixel unit area 100px, the ground line 220 is electrically connected with the metal grid 210, and accordingly, when the photoelectric sensor works, the conductive layer 110 of the isolation structure can be connected with the negative potential by applying the negative potential to the pad layer 150 through the pad layer 150, the second interconnection layer 112, the first interconnection layer 111, the connection structure 115, the pixel substrate 100 and the ground line 220 which are sequentially connected, thereby being beneficial to adsorbing positive charges on the side wall of the isolation structure, improving the interface state of the side wall of the isolation structure, and reducing dark current of the pixel unit.

In summary, this embodiment optimizes the performance of the photosensor.

The ground line 220 is used to electrically connect the metal mesh 210 with the pixel substrate 100 of the predetermined pixel unit area 100 px.

More specifically, in the present embodiment, the ground wire 220 and the metal mesh 210 are formed in the same step, and the ground wire 220 and the metal mesh 210 are in an integrated structure, so that not only is the process flow simplified, but also the electrical connection performance between the ground wire 220 and the metal mesh 210 is improved.

Referring to fig. 18 in combination, as an embodiment, the ground line 220 is a ring structure surrounding a plurality of pixel unit areas, so as to increase the area of the ground line 220 and correspondingly reduce the resistance of the ground line 220. The shape of the ground line 220 is not limited thereto. In other embodiments, the shape of the ground wire may also be other shapes, such as: the ground wire may have a strip-like structure.

The specific steps of forming the metal mesh 210 and the ground line 220 according to the present embodiment will be described in detail with reference to the accompanying drawings.

As shown in fig. 14, a first trench 170 penetrating the passivation layer 160 over the isolation structure and a second trench 180 of the passivation layer 160 directly over the connection structure 115 are formed, the first trench 160 exposing the conductive layer 110 and the second trench 180 exposing the pixel substrate 100.

The first trenches 170 are used to provide spatial locations for forming a metal grid, and the first trenches 170 expose the top surface of the conductive layer 110 so that the metal grid can contact the conductive layer 110.

In this embodiment, the first trench 170 exposes a portion of the top surface of the conductive layer 110, or the first trench 170 exposes all of the top surface of the conductive layer 110.

In the present embodiment, the process of forming the first trench 170 includes a dry etching process. The dry etching process has high process controllability, which is beneficial to improving the profile control of the first trench 170 and reducing the probability of damaging the conductive layer 110.

The second trenches 180 are used to provide a spatial location for forming a ground line.

In this embodiment, during the process of forming the second trench 180, an over-etching process is also performed, and thus, the second trench 180 also penetrates through a part of the thickness of the pixel substrate 100. In other embodiments, the second trench may also extend through the passivation layer only.

In this embodiment, the first trench 170 is formed after the second trench 180 is formed as an example. In other embodiments, the second trench may also be formed after the first trench is formed, or the first trench and the second trench may also be formed in the same step.

As shown in fig. 15 to 16, a metal mesh 210 positioned in the first trench 170 and in contact with the conductive layer 110, and a ground line 220 positioned in the second trench 180 and in contact with the pixel substrate 100 are formed, the ground line 220 being electrically connected to the metal mesh 210.

Specifically, as shown in fig. 15, a metal material layer 190 is formed on the passivation layer 160, the metal material layer 190 filling the first trench 170 and the second trench 180; as shown in fig. 16, the metal material layer 190 is patterned, the metal material layer 190 in the first trench 170 and in contact with the conductive layer 110 is reserved for use as the metal mesh 210, the metal material layer 190 in the second trench 180 is reserved for use as the ground line 220, and the ground line 220 is connected to the metal mesh 210.

In this embodiment, a physical vapor deposition (Physical Vapor Deposition, PVD) process is used to form the metal material layer 190.

The first surface 101 of the pixel substrate 100 is an insulating surface formed by the passivation layer 160, and before the metal material layer 190 is formed, the conductive layer 110 is electrically isolated from the pixel substrate 100, so that a large amount of charges are easily accumulated on the first surface 101 during the process of forming the metal material layer 190 by using a physical vapor deposition process, and the metal material layer 190 is further formed in the second trench 180 and contacts the pixel substrate 100, so that charges are released through the pixel substrate 100, so as to avoid arcing problems caused by charge accumulation on the first surface 101.

In this embodiment, an etching process is used to pattern the metal material layer 190. Specifically, the metal material layer 190 is patterned using an anisotropic dry etching process.

Referring to fig. 17 and 18, fig. 17 is a cross-sectional view, and fig. 18 is a top view corresponding to fig. 17, the forming method further includes: an interconnect trench 240 is formed through passivation layer 160 over pad layer 150, exposing pad layer 150.

Interconnect trench 240 exposes pad layer 150 to enable subsequent electrical connection between pad layer 150 and external circuitry, such as: and the subsequent packaging and testing processes are facilitated.

In this embodiment, before forming the interconnection trench 240, the method for forming a photoelectric sensor further includes: a protective layer 250 is formed on the top surface and sidewalls of the metal mesh 210 and the ground line 220, and the protective layer 250 is also formed on the passivation layer 160.

In addition, the protective layer 250 on the top surface of the pad layer 150 is also removed during the formation of the interconnect trench 240.

Correspondingly, the embodiment of the invention also provides electronic equipment comprising the photoelectric sensor provided by the embodiment of the invention.

The electronic device of the embodiment may be any electronic product or device having a photoelectric sensing function, such as a mobile phone, a tablet computer, a notebook computer, a navigator, a camera, a video camera, a sweeping robot, a virtual reality device, an augmented reality device, or any intermediate product including the aforementioned photoelectric sensor.

As can be seen from the foregoing description, the photoelectric sensor provided in the embodiment of the present invention has excellent performance, and by using the photoelectric sensor provided in the embodiment of the present invention, the performance of the electronic device is improved, and the use sensitivity of the user is improved.

Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention should be assessed accordingly to that of the appended claims.

Claims

1. A photoelectric sensor, comprising:

the pixel substrate comprises a first surface and a second surface which are opposite to each other, the pixel substrate comprises a photosensitive area and a lead area surrounding the photosensitive area, and the photosensitive area comprises pixel unit areas which are arranged in an array;

The isolation structure penetrates through the pixel substrate between the adjacent pixel unit areas and comprises a conductive layer, the top surface of the conductive layer is exposed out of the first surface, and the isolation structure is located in the photosensitive area;

the dielectric layer is positioned on the second surface of the pixel substrate and is positioned on the surface of the logic substrate;

the interconnection layer is positioned in the dielectric layer;

the connecting structure is positioned in the dielectric layer below the orthographic projection of the pixel unit area of the pixel substrate and is respectively contacted with the interconnection layer in the dielectric layer and the pixel substrate;

a first opening in the pixel substrate of the lead region exposing the top surface of the dielectric layer;

a second opening in the dielectric layer below the first opening and exposing a top surface of the interconnect layer;

a pad layer located in the first opening and the second opening and contacting with the interconnection layer in the dielectric layer;

a passivation layer filling the first and second openings and on the first surface, the passivation layer covering the pad layer and the conductive layer;

and the metal grid penetrates through the passivation layer above the isolation structure and is in contact with the conductive layer.

2. The photosensor according to claim 1, wherein the connection structure the photosensor further comprises: and the grounding wire penetrates through the passivation layer right above the connecting structure, is contacted with the pixel substrate and is connected with the metal grid.

3. The photosensor of claim 2, wherein the ground line is of unitary construction with the metal mesh.

4. The photosensor of claim 1 wherein the pad layer is configured to be connected to a negative potential.

5. The photosensor of claim 1, wherein the interconnect layer in the dielectric layer of the photosensitive region and the interconnect layer in the dielectric layer of the lead region are electrically connected to each other.

6. The photosensor according to claim 1, wherein the photosensor further comprises: and the interconnection groove penetrates through the passivation layer above the welding pad layer and exposes the welding pad layer.

7. The photosensor of claim 1, wherein the metal mesh is in contact with a portion of the top surface of the conductive layer or in contact with all of the top surface of the conductive layer.

8. The photosensor according to claim 1, wherein the photosensor further comprises: and the logic substrate is bonded on the dielectric layer of the second surface of the pixel substrate.

9. The photosensor of claim 1 or 8, wherein the first surface is a back surface of the pixel substrate and the second surface is a front surface of the pixel substrate.

10. The photosensor of claim 1, wherein the isolation structure further comprises: and the insulating layer is positioned between the conducting layer and the pixel substrate and between the conducting layer and the dielectric layer.

11. The photosensor of claim 10, wherein the material of the conductive layer includes one or more of tungsten, aluminum, titanium nitride, tantalum nitride, copper;

the material of the insulating layer comprises any one or more of silicon nitride, silicon oxide, aluminum oxide, titanium oxide, hafnium oxide, zirconium oxide, magnesium oxide, calcium oxide, yttrium oxide, tantalum oxide, strontium oxide, lanthanum oxide and barium oxide.

12. The photosensor of claim 1, wherein the material of the pixel substrate includes one or more of silicon, germanium, silicon carbide, gallium arsenide, and indium gallium arsenide;

The material of the interconnection layer comprises one or more of copper, aluminum, tungsten, cobalt, nickel, titanium, tantalum, titanium nitride and tantalum nitride;

the material of the connecting structure comprises one or more of copper, tungsten, cobalt, nickel, titanium, tantalum, titanium nitride and tantalum nitride;

the material of the welding pad layer comprises one or more of aluminum, titanium, gold and tin-doped indium oxide;

the material of the passivation layer comprises one or more of silicon oxide, silicon oxynitride and silicon nitride;

the material of the metal mesh comprises one or two of aluminum and tungsten.

13. A method of forming a photoelectric sensor, comprising:

providing a pixel substrate, wherein the pixel substrate comprises a first surface and a second surface which are opposite to each other, the pixel substrate comprises a photosensitive area and a lead area surrounding the photosensitive area, the photosensitive area comprises pixel unit areas which are arranged in an array, an isolation structure penetrating through the pixel substrate is formed between the pixel unit areas, the isolation structure comprises a conductive layer, and the top surface of the conductive layer is exposed out of the first surface; a dielectric layer is formed on the second surface, and an interconnection layer is formed in the dielectric layer; a connecting structure is further formed in the dielectric layer below the orthographic projection of the pixel unit area of the pixel substrate, and the connecting structure is respectively contacted with the interconnection layer in the dielectric layer and the pixel substrate;

Forming a first opening penetrating through the pixel substrate of the lead area and a second opening in the dielectric layer below the first opening, wherein the second opening exposes the top surface of the interconnection layer;

forming a bonding pad layer in the first opening and the second opening, wherein the bonding pad layer is contacted with the interconnection layer;

forming a passivation layer filling the first and second openings and on the first surface, the passivation layer covering the pad layer and the conductive layer;

a metal mesh is formed through the passivation layer over the isolation structure and in contact with the conductive layer.

14. The method of claim 13, wherein the pad layer is used to access a negative potential.

15. The method of forming a photosensor of claim 13, further comprising: in the step of forming the metal mesh, a ground line penetrating through the passivation layer right above the connection structure and contacting the pixel substrate is formed, and the ground line is electrically connected with the metal mesh.

16. The method of forming a photosensor of claim 15, where the step of forming the metal mesh and the ground line includes: forming a first groove penetrating through the passivation layer above the isolation structure and a second groove positioned on the passivation layer right above the connection structure, wherein the first groove exposes the conductive layer, and the second groove exposes the pixel substrate;

And forming a metal grid which is positioned in the first groove and is contacted with the conductive layer, and a grounding wire which is positioned in the second groove and is contacted with the pixel substrate, wherein the grounding wire is electrically connected with the metal grid.

17. The method of forming a photosensor of claim 16 where in the step of forming the first trench, the first trench exposes a portion of the top surface of the conductive layer or exposes all of the top surface of the conductive layer.

18. The method of forming a photosensor of claim 13, further comprising: after the metal grid is formed, an interconnection groove penetrating through the passivation layer above the welding pad layer is formed, and the welding pad layer is exposed.

19. The method of claim 13, wherein in the step of providing a pixel substrate, a logic substrate is further bonded to the dielectric layer on the second surface of the pixel substrate.

20. An electronic device, comprising: the photosensor according to any one of claims 1 to 12.