CN116190510A - Semiconductor light-emitting diode - Google Patents

Semiconductor light-emitting diode Download PDF

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Publication number
CN116190510A
CN116190510A CN202310221237.1A CN202310221237A CN116190510A CN 116190510 A CN116190510 A CN 116190510A CN 202310221237 A CN202310221237 A CN 202310221237A CN 116190510 A CN116190510 A CN 116190510A
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China
Prior art keywords
layer
quantum well
type semiconductor
well layer
semiconductor layer
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CN202310221237.1A
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Chinese (zh)
Inventor
李水清
阚宏柱
请求不公布姓名
王星河
蔡鑫
陈婉君
张江勇
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Anhui Geen Semiconductor Co ltd
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Anhui Geen Semiconductor Co ltd
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Priority to CN202310221237.1A priority Critical patent/CN116190510A/en
Publication of CN116190510A publication Critical patent/CN116190510A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/025Physical imperfections, e.g. particular concentration or distribution of impurities
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

The invention provides a semiconductor light-emitting diode, which comprises a substrate, a carrier tunneling balance structure and a light-emitting diode, wherein the substrate is sequentially arranged from bottom to top, and the carrier tunneling balance structure consists of a first n-type semiconductor layer, a second n-type semiconductor layer, a shallow quantum well layer, a quantum well layer, an electron blocking layer and a p-type semiconductor layer; the Si/O concentration ratio of the first n-type semiconductor layer, the second n-type semiconductor layer and the shallow quantum well layer is larger than 1, the Si/O concentration ratio of the second n-type semiconductor layer is larger than the Si/O concentration ratio of the first n-type semiconductor layer and the shallow quantum well layer, and the Si/O concentration ratio of the quantum well layer is smaller than 1; the Mg/H concentration ratio of the electron blocking layer and the p-type semiconductor layer is larger than 1, and the Mg/H concentration ratio of the quantum well layer is smaller than 1. According to the invention, electron and hole carriers are converted from a transition mode which is dominant in drift, diffusion, thermal emission and the like in the quantum well layer to a transition mode which is dominant in tunneling through the quantum well layer, so that the luminous efficiency of the semiconductor light-emitting diode is improved.

Description

Semiconductor light-emitting diode
Technical Field
The present disclosure relates to the field of semiconductor optoelectronic devices, and more particularly, to a semiconductor light emitting diode.
Background
The semiconductor element, particularly the semiconductor light-emitting element, has a wide wavelength range with adjustable range, high light-emitting efficiency, energy conservation, environmental protection, long service life exceeding 10 ten thousand hours, small size, multiple application scenes, strong designability and other factors, has gradually replaced incandescent lamps and fluorescent lamps, grows a light source for common household illumination, and is widely applied to new scenes, such as application fields of indoor high-resolution display screens, outdoor display screens, mini-LEDs, micro-LEDs, mobile phone television backlights, backlight illumination, street lamps, automobile headlamps, daytime running lights, in-car atmosphere lamps, flashlights and the like.
The conventional nitride semiconductor grows by using a sapphire substrate, has large lattice mismatch and thermal mismatch, causes higher defect density and polarization effect, and reduces the luminous efficiency of the semiconductor luminous element; meanwhile, the hole ionization efficiency of the traditional nitride semiconductor is far lower than the electron ionization efficiency, so that the hole concentration is over 2 orders of magnitude lower than the electron concentration, excessive electrons can overflow from the multiple quantum wells to the second conductive semiconductor to generate non-radiative recombination, the hole ionization efficiency is low, holes of the second conductive semiconductor are difficult to effectively inject into the multiple quantum wells, the hole injection efficiency is low, and the luminous efficiency of the multiple quantum wells is low; the nitride semiconductor structure has non-central symmetry, can generate stronger spontaneous polarization along the direction of the c-axis, and superimposes piezoelectric polarization effects of lattice mismatch to form an intrinsic polarization field; the intrinsic polarization field makes the multi-quantum well layer generate stronger quantum confinement Stark effect along the (001) direction, so that the energy band inclination and the electron hole wave function spatial separation are caused, the radiation recombination efficiency of electron holes is reduced, and the luminous efficiency of the semiconductor luminous element is further influenced.
Disclosure of Invention
In order to solve one of the above problems, the present invention provides a semiconductor light emitting diode.
The embodiment of the invention provides a semiconductor light-emitting diode, which comprises a substrate, a first n-type semiconductor layer, a second n-type semiconductor layer, a shallow quantum well layer, a quantum well layer, an electron blocking layer and a p-type semiconductor layer which are sequentially arranged from bottom to top;
the Si/O concentration ratio of the first n-type semiconductor layer, the second n-type semiconductor layer and the shallow quantum well layer is larger than 1, the Si/O concentration ratio of the second n-type semiconductor layer is larger than the Si/O concentration ratio of the first n-type semiconductor layer and the shallow quantum well layer, the Si/O concentration ratio among the first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer and the quantum well layer is in U-shaped distribution, and the Si/O concentration ratio of the quantum well layer is smaller than 1;
the Mg/H concentration ratio of the electron blocking layer and the p-type semiconductor layer is larger than 1, and the Mg/H concentration ratio of the quantum well layer is smaller than 1;
the first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer, the electron blocking layer and the p-type semiconductor layer form a carrier tunneling balance structure.
Preferably, the quantum well layer is a periodic structure composed of a well layer and a barrier layer, and the number of cycles of the quantum well layer is x: x is more than or equal to 8 and less than or equal to 20, and the thickness of the well layer of the quantum well layer is a: a is more than or equal to 30 and less than or equal to 70, the barrier layer of the quantum well layer is an ultrathin barrier layer, and the thickness b of the barrier layer is as follows: b is more than or equal to 20 and less than or equal to 40.
Preferably, the ratio of the electron concentration to the hole concentration of the quantum well layer is z: z is more than or equal to 1 and less than or equal to 5.
Preferably, the shallow quantum well layer is a periodic structure composed of a well layer and a barrier layer, and the number of periods of the shallow quantum well layer is y: y is more than or equal to 5 and less than or equal to 30, and the thickness of the well layer of the shallow quantum well layer is c: and c is more than or equal to 10 and less than or equal to 25, and the barrier layer thickness d of the shallow quantum well layer is as follows: d is more than or equal to 10 and less than or equal to 30.
Preferably, the thickness of the electron blocking layer is 50 to 400 a.
Preferably, the thickness of the p-type semiconductor layer is 100 to 500 a.
Preferably, the Al content of the electron blocking layer is higher than the Al content of the first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer, the quantum well layer and the p-type semiconductor layer, and the Al content is in a decreasing trend from the quantum well layer, the shallow quantum well layer, the second n-type semiconductor layer to the first n-type semiconductor layer.
Preferably, the C/O concentration ratio of the first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer, the electron blocking layer, and the p-type semiconductor layer is less than or equal to 1.
Preferably, the first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer, the electron blocking layer and the p-type semiconductor layer are any one or any combination of GaN, alGaN, inGaN, alInGaN, alN, inN, alInN, siC, ga2O3 and BN, gaAs, gaP, inP, alGaAs, alInGaAs, alGaInP, inGaAs, alInAs, alInP, alGaP, inGaP.
Preferably, the substrate includes any one of sapphire, silicon, ge, siC, alN, gaN, gaAs, inP, a sapphire/SiO 2 composite substrate, a sapphire/AlN composite substrate, a sapphire/SiNx, magnesium aluminate spinel MgAl2O4, mgO, znO, zrB2, liAlO2, and LiGaO2 composite substrate.
The beneficial effects of the invention are as follows: according to the invention, through designing the Si/O concentration ratio gradients of the first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer and the quantum well layer and forming U-shaped distribution, the Mg/H concentration ratio gradients of the electron blocking layer, the p-type semiconductor layer and the quantum well layer of the ultrathin barrier layer jointly form a carrier tunneling balance structure, the electron and hole carriers are converted from a transition mode which is dominant in drift, diffusion, thermal emission and the like in the quantum well layer to a transition mode which is dominant in tunneling through the quantum well layer, the difference of the electron concentration and the hole concentration of the quantum well layer is smaller than 1 order of magnitude, the overlapping probability and the distribution uniformity of the electron and hole wave functions of the quantum well layer are improved, the radiation recombination probability of the electron and the hole in the quantum well layer is improved, the electron overflow is reduced, and the luminous efficiency of the semiconductor light emitting diode is improved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiments of the application and together with the description serve to explain the application and do not constitute an undue limitation to the application. In the drawings:
fig. 1 is a schematic structural diagram of a semiconductor light emitting diode according to an embodiment of the present invention;
fig. 2 is a SIMS secondary ion mass spectrum of a semiconductor light emitting diode according to an embodiment of the present invention.
Reference numerals:
100. a substrate, 101, a first n-type semiconductor layer, 102, a second n-type semiconductor layer, 103, a shallow quantum well layer, 104, a quantum well layer, 105, an electron blocking layer, 106, a p-type semiconductor layer, 107, and a carrier tunneling balance structure.
Detailed Description
In order to make the technical solutions and advantages of the embodiments of the present application more apparent, the following detailed description of exemplary embodiments of the present application is given with reference to the accompanying drawings, and it is apparent that the described embodiments are only some of the embodiments of the present application and not exhaustive of all the embodiments. It should be noted that, in the case of no conflict, the embodiments and features in the embodiments may be combined with each other.
As shown in fig. 1, the present embodiment proposes a semiconductor light emitting diode including a substrate 100, a first n-type semiconductor layer 101, a second n-type semiconductor layer 102, a shallow quantum well layer 103, a quantum well layer 104, an electron blocking layer 105, and a p-type semiconductor layer 106, which are disposed in this order from bottom to top.
Specifically, as shown in fig. 2, the Si/O concentration ratio of the first n-type semiconductor layer 101, the second n-type semiconductor layer 102 and the shallow quantum well layer 103 is greater than 1, the Si/O concentration ratio of the second n-type semiconductor layer 102 is greater than the Si/O concentration ratio of the first n-type semiconductor layer 101 and the shallow quantum well layer 103, and the Si/O concentration ratio among the first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer and the quantum well layer is in U-shaped distribution, and the Si/O concentration ratio of the quantum well layer 104 is less than 1; the Mg/H concentration ratio of the electron blocking layer 105 and the p-type semiconductor layer 106 is greater than 1, and the Mg/H concentration ratio of the quantum well layer 104 is less than 1.
In this embodiment, the carrier tunneling balance structure 107 is formed by designing the Si/O concentration ratio gradient of the first n-type semiconductor layer 101, the second n-type semiconductor layer 102, the shallow quantum well layer 103 and the quantum well layer 104, and the Mg/H concentration ratio gradient of the electron blocking layer 105, the p-type semiconductor layer 106 and the quantum well layer 104, in combination with the quantum well layer 104 of the ultra-thin barrier layer. The structure can enable electron and hole carriers to be converted from a transition mode which is dominant in drift, diffusion, thermal emission and the like in the quantum well layer 104 to a transition mode which is dominant in tunneling through the quantum well layer 104, and enable the concentration difference of the electron and the hole of the quantum well layer 104 to be smaller than 1 order of magnitude, so that the overlapping probability and the distribution uniformity of the electron and the hole wave functions of the quantum well layer 104 are improved, the radiation recombination probability of the electron and the hole in the quantum well layer 104 is improved, the electron overflow is reduced, and the luminous efficiency of the semiconductor light-emitting diode is improved.
Further, in this embodiment, the quantum well layer 104 is a periodic structure composed of a well layer and a barrier layer. The number of cycles of the quantum well layer 104 is x: x is more than or equal to 8 and less than or equal to 20, and the thickness of the well layer of the quantum well layer 104 is a: a is more than or equal to 35 and less than or equal to 70. Wherein, the barrier layer is an ultra-thin barrier layer, and the thickness b of the ultra-thin barrier layer: b is more than or equal to 20 and less than or equal to 40. The ultra-thin barrier layer further facilitates tunneling of carriers in the quantum well. Electron and hole carriers are converted from a dominant transition mode of drift, diffusion, thermal emission and the like in the quantum well layer 104 to a transition mode of dominant tunneling through the quantum well layer 104 having the ultra-thin barrier layer, and the ratio of the electron concentration to the hole concentration of the quantum well layer 104 is z: z is more than or equal to 1 and less than or equal to 5.
In this embodiment, the shallow quantum well layer 103 is also a periodic structure composed of a well layer and a barrier layer, and the number of periods of the shallow quantum well layer 103 is y: y is more than or equal to 5 and less than or equal to 30, and the well layer thickness of the shallow quantum well layer 103 is c: barrier layer thickness d of shallow quantum well layer 103 is 10 a.ltoreq.c.ltoreq.25 a.m: d is more than or equal to 10 and less than or equal to 30.
Further, in the present embodiment, the thickness of the electron blocking layer 105 is 50 to 400 a. The Al content of the electron blocking layer 105 is higher than those of the first n-type semiconductor layer 101, the second n-type semiconductor layer 102, the shallow quantum well layer 103, the quantum well layer 104, and the p-type semiconductor layer 106, and the Al content is in a decreasing trend from the quantum well layer 104, the shallow quantum well layer 103, the second n-type semiconductor layer 102 to the first n-type semiconductor layer 101. The Al content is reduced from 1E6a.u.to 1E3a.u.or below, and the reduction range is more than 99%.
Further, in this embodiment, the thickness of the p-type semiconductor layer 106 is 100 to 500 a, and the C/O concentration ratio of the first n-type semiconductor layer 101, the second n-type semiconductor layer 102, the shallow quantum well layer 103, the quantum well layer 104, the electron blocking layer 105, and the p-type semiconductor layer 106 is 1 or less; the Si/O concentration ratio of the first n-type semiconductor 101, the second n-type semiconductor 102, and the shallow quantum well 103 forms a U-shaped profile.
The first n-type semiconductor layer 101, the second n-type semiconductor layer 102, the shallow quantum well layer 103, the quantum well layer 104, the electron blocking layer 105, and the p-type semiconductor layer 106 are any one or any combination of GaN, alGaN, inGaN, alInGaN, alN, inN, alInN, siC, ga O3 and BN, gaAs, gaP, inP, alGaAs, alInGaAs, alGaInP, inGaAs, alInAs, alInP, alGaP, inGaP.
The substrate 100 includes any one of sapphire, silicon, ge, siC, alN, gaN, gaAs, inP, a sapphire/SiO 2 composite substrate, a sapphire/AlN composite substrate, sapphire/SiNx, magnesium aluminate spinel MgAl2O4, mgO, znO, zrB2, liAlO2, and LiGaO2 composite substrates.
It will be apparent to those skilled in the art that various modifications and variations can be made in the present application without departing from the spirit or scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims and the equivalents thereof, the present application is intended to cover such modifications and variations.

Claims (10)

1. A semiconductor light emitting diode, comprising a substrate, a first n-type semiconductor layer, a second n-type semiconductor layer, a shallow quantum well layer, a quantum well layer, an electron blocking layer and a p-type semiconductor layer which are arranged in sequence from bottom to top;
the Si/O concentration ratio of the first n-type semiconductor layer, the second n-type semiconductor layer and the shallow quantum well layer is larger than 1, the Si/O concentration ratio of the second n-type semiconductor layer is larger than the Si/O concentration ratio of the first n-type semiconductor layer and the shallow quantum well layer, the Si/O concentration ratio among the first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer and the quantum well layer is in U-shaped distribution, and the Si/O concentration ratio of the quantum well layer is smaller than 1;
the Mg/H concentration ratio of the electron blocking layer and the p-type semiconductor layer is larger than 1, and the Mg/H concentration ratio of the quantum well layer is smaller than 1;
the first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer, the electron blocking layer and the p-type semiconductor layer form a carrier tunneling balance structure.
2. The semiconductor light emitting diode of claim 1, wherein the quantum well layer is a periodic structure consisting of a well layer and a barrier layer, and the number of cycles of the quantum well layer is x: x is more than or equal to 8 and less than or equal to 20, and the thickness of the well layer of the quantum well layer is a: a is more than or equal to 30 and less than or equal to 70, the barrier layer of the quantum well layer is an ultrathin barrier layer, and the thickness b of the barrier layer is as follows: b is more than or equal to 20 and less than or equal to 40.
3. The semiconductor light emitting diode of claim 1 or 2, wherein the quantum well layer has an electron concentration to hole concentration ratio of z: z is more than or equal to 1 and less than or equal to 5.
4. The semiconductor light emitting diode of claim 1, wherein the shallow quantum well layer is a periodic structure consisting of a well layer and a barrier layer, and the number of periods of the shallow quantum well layer is y: y is more than or equal to 5 and less than or equal to 30, and the thickness of the well layer of the shallow quantum well layer is c: and c is more than or equal to 10 and less than or equal to 25, and the barrier layer thickness d of the shallow quantum well layer is as follows: d is more than or equal to 10 and less than or equal to 30.
5. The semiconductor light emitting diode of claim 1, wherein the electron blocking layer has a thickness of 50 to 400 angstroms.
6. The semiconductor light emitting diode of claim 1, wherein the p-type semiconductor layer has a thickness of 100 to 500 angstroms.
7. The semiconductor light-emitting diode according to claim 1 or 5, wherein an Al content of the electron blocking layer is higher than that of the first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer, the quantum well layer, and the p-type semiconductor layer, and the Al content is in a decreasing trend from the quantum well layer, the shallow quantum well layer, the second n-type semiconductor layer, to the first n-type semiconductor layer.
8. The semiconductor light emitting diode according to claim 1, wherein the C/O concentration ratio of the first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer, the electron blocking layer, and the p-type semiconductor layer is 1 or less.
9. The semiconductor light emitting diode of claim 1, wherein the first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer, the electron blocking layer, and the p-type semiconductor layer are any one or any combination of GaN, alGaN, inGaN, alInGaN, alN, inN, alInN, siC, ga O3, BN, gaAs, gaP, inP, alGaAs, alInGaAs, alGaInP, inGaAs, alInAs, alInP, alGaP, inGaP.
10. The semiconductor light emitting diode of claim 1, wherein the substrate comprises any one of sapphire, silicon, ge, siC, alN, gaN, gaAs, inP, a sapphire/SiO 2 composite substrate, a sapphire/AlN composite substrate, a sapphire/SiNx, magnesium aluminate spinel MgAl2O4, mgO, znO, zrB2, liAlO2, and LiGaO2 composite substrate.
CN202310221237.1A 2023-03-09 2023-03-09 Semiconductor light-emitting diode Pending CN116190510A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116130564A (en) * 2023-03-09 2023-05-16 安徽格恩半导体有限公司 Semiconductor light-emitting diode
CN116885066A (en) * 2023-09-04 2023-10-13 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116130564A (en) * 2023-03-09 2023-05-16 安徽格恩半导体有限公司 Semiconductor light-emitting diode
CN116885066A (en) * 2023-09-04 2023-10-13 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode
CN116885066B (en) * 2023-09-04 2023-12-01 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode

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