CN116632128A - Semiconductor light-emitting element - Google Patents

Semiconductor light-emitting element Download PDF

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CN116632128A
CN116632128A CN202310641276.7A CN202310641276A CN116632128A CN 116632128 A CN116632128 A CN 116632128A CN 202310641276 A CN202310641276 A CN 202310641276A CN 116632128 A CN116632128 A CN 116632128A
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sub
quantum well
equal
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barrier layer
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李水清
王星河
张江勇
蔡鑫
陈婉君
请求不公布姓名
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Anhui Geen Semiconductor Co ltd
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Anhui Geen Semiconductor Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y30/00Nanotechnology for materials or surface science, e.g. nanocomposites
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/34Materials of the light emitting region containing only elements of Group IV of the Periodic Table
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
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Abstract

The application provides a semiconductor light-emitting element, which comprises a substrate, an n-type semiconductor, a quantum well layer and a p-type semiconductor which are sequentially arranged from bottom to top, wherein the quantum well layer is of a periodic structure consisting of a well layer and a barrier layer, the thermal expansion coefficient of the well layer is smaller than or equal to that of the barrier layer, the elastic coefficient of the well layer is smaller than or equal to that of the barrier layer, and the lattice constant of the well layer is larger than or equal to that of the barrier layer. According to the embodiment, on the basis of a traditional semiconductor light-emitting element, the thermal expansion coefficient, the elastic coefficient and the lattice constant of a well layer and a barrier layer of a quantum well layer are designed differently, so that the thermal mismatch and the lattice mismatch of the quantum well are reduced, the crystal quality and the interface quality of the quantum well are improved, the interface quality deterioration of the crystal quality in the aging process is restrained, the probability of capturing carriers by defects in the aging process is reduced, the aging resistance change is further reduced, and the aging voltage change is reduced from +/-0.05V to 0.1V to +/-0.01 to 0.05V.

Description

Semiconductor light-emitting element
Technical Field
The application relates to the field of semiconductor photoelectric devices, in particular to a semiconductor light-emitting element.
Background
The semiconductor element, particularly the semiconductor light-emitting element, has a wide wavelength range with adjustable range, high light-emitting efficiency, energy conservation, environmental protection, long service life exceeding 10 ten thousand hours, small size, multiple application scenes, strong designability and other factors, has gradually replaced incandescent lamps and fluorescent lamps, grows a light source for common household illumination, and is widely applied to new scenes, such as application fields of indoor high-resolution display screens, outdoor display screens, mini-LEDs, micro-LEDs, mobile phone television backlights, backlight illumination, street lamps, automobile headlamps, daytime running lights, in-car atmosphere lamps, flashlights and the like.
The conventional nitride semiconductor grows by using a sapphire substrate, has large lattice mismatch and thermal mismatch, causes higher defect density and polarization effect, and reduces the luminous efficiency of the semiconductor luminous element; meanwhile, the hole ionization efficiency of the traditional nitride semiconductor is far lower than the electron ionization efficiency, so that the hole concentration is over 1 order of magnitude lower than the electron concentration, excessive electrons can overflow from the multiple quantum wells to the second conductive semiconductor to generate non-radiative recombination, the hole ionization efficiency is low, holes of the second conductive semiconductor are difficult to effectively inject into the multiple quantum wells, the hole injection efficiency is low, and the luminous efficiency of the multiple quantum wells is low; the nitride semiconductor structure has non-central symmetry, can generate stronger spontaneous polarization along the direction of the c-axis, and superimposes piezoelectric polarization effects of lattice mismatch to form an intrinsic polarization field; the intrinsic polarization field is along the (001) direction, so that the multiple quantum well layer generates stronger quantum confinement Stark effect, the energy band inclination and the electron hole wave function spatial separation are caused, and the radiation recombination efficiency of electron holes is reduced; the semiconductor light-emitting element has refractive index, dielectric constant and other parameters larger than those of air, so that the total reflection angle of the quantum well emitted light is smaller, and the light extraction efficiency is lower.
Disclosure of Invention
In order to solve one of the above problems, the present application provides a semiconductor light emitting device.
The embodiment of the application provides a semiconductor light-emitting element, which comprises a substrate, an n-type semiconductor, a quantum well layer and a p-type semiconductor, wherein the substrate, the n-type semiconductor, the quantum well layer and the p-type semiconductor are sequentially arranged from bottom to top, the quantum well layer is of a periodic structure formed by a well layer and a barrier layer, the thermal expansion coefficient of the well layer is smaller than or equal to that of the barrier layer, the elastic coefficient of the well layer is smaller than or equal to that of the barrier layer, and the lattice constant of the well layer is larger than or equal to that of the barrier layer.
Preferably, the quantum well layer comprises a first sub quantum well layer, a second sub quantum well layer and a third sub quantum well layer, wherein the cycle number of the first sub quantum well layer is m.gtoreq.30.gtoreq.1, the cycle number of the second sub quantum well is n.gtoreq.20.gtoreq.1, and the cycle number of the third sub quantum well is r.gtoreq.20.gtoreq.3.
Preferably, the well layer thermal expansion coefficient a of the first sub-quantum well is equal to or less than the barrier layer thermal expansion coefficient b of the first sub-quantum well, and a is equal to or less than 2.5 and equal to or less than b is equal to or less than 3.5 (10 -6 /K);
The thermal expansion coefficient c of the well layer of the second sub-quantum well is less than or equal to the thermal expansion coefficient d of the barrier layer of the second sub-quantum well, and c is less than or equal to 2.5 and less than or equal to d is less than or equal to 3.5 (10) -6 /K);
The thermal expansion coefficient e of the well layer of the third sub-quantum well is less than or equal to the thermal expansion coefficient f of the barrier layer of the third sub-quantum well, and is less than or equal to 2.5 and less than or equal to f and less than or equal to 3.5 (10) -6 /K)。
Preferably, the well layer thermal expansion coefficient e of the third sub-quantum well is less than or equal to the well layer thermal expansion coefficient c of the second sub-quantum well is less than or equal to the well layer thermal expansion coefficient a of the first sub-quantum well is less than or equal to the barrier layer thermal expansion coefficient b of the first sub-quantum well, and the barrier layer thermal expansion coefficient d of the second sub-quantum well is less than or equal to the barrier layer thermal expansion coefficient f of the third sub-quantum well.
Preferably, the well layer elasticity coefficient g of the first sub-quantum well is less than or equal to the barrier layer elasticity coefficient h of the first sub-quantum well, and g is less than or equal to 200 and less than or equal to h is less than or equal to 450GPa;
the well layer elastic coefficient i of the second sub-quantum well is not less than the barrier layer elastic coefficient j of the second sub-quantum well, and i is not less than 200 and not more than j is not less than 450GPa;
the well layer elasticity coefficient k of the third sub-quantum well is less than or equal to the barrier layer elasticity coefficient l of the third sub-quantum well, and k is more than or equal to 200 and less than or equal to l and less than or equal to 450GPa.
Preferably, the well layer elasticity coefficient k of the third sub quantum well is less than or equal to the well layer elasticity coefficient i of the second sub quantum well is less than or equal to the well layer elasticity coefficient g of the first sub quantum well, the barrier layer elasticity coefficient l of the third sub quantum well is less than or equal to the barrier layer elasticity coefficient j of the second sub quantum well is less than or equal to the barrier layer elasticity coefficient h of the first sub quantum well.
Preferably, the well layer lattice constant s of the first sub-quantum well is more than or equal to the barrier layer lattice constant t of the first sub-quantum well, and is more than or equal to 3.0 and less than or equal to s and less than or equal to 3.8 Emi;
the lattice constant u of the well layer of the second sub-quantum well is larger than or equal to the lattice constant v of the barrier layer of the second sub-quantum well, and v is larger than or equal to 3.0 and smaller than or equal to 3.8 Emeter;
the lattice constant w of the well layer of the third sub-quantum well is larger than or equal to the lattice constant x of the barrier layer of the third sub-quantum well, and x is larger than or equal to 3.0 and smaller than or equal to 3.8 Emeter.
Preferably, the barrier layer lattice constant x of the third sub-quantum well is equal to or less than the barrier layer lattice constant v of the second sub-quantum well is equal to or less than the barrier layer lattice constant t of the first sub-quantum well, the well layer lattice constant s of the first sub-quantum well is equal to or less than the well layer lattice constant u of the second sub-quantum well is equal to or less than the well layer lattice constant w of the third sub-quantum well.
Preferably, the well layer of the first sub-quantum well is GaN, inGaN, inN, alInN, alInGaN, alN, gaAs, gaP, inP, alGaAs, alInGaAs, alGaInP, inGaAs, alInAs, alInP, alGaP, inGaP, gaSb, inSb, inAs, alGaSb, alSb, inGaSb, alGaAsSb, inGaAsSb, siC, ga 2 O 3 Any one or any combination of BN, and the thickness of the trap layer is 5 to 200 Emeter; the barrier layer of the first sub-quantum well is GaN, inGaN, inN, alInN,AlInGaN、AlN、GaAs、GaP、InP、AlGaAs、AlInGaAs、AlGaInP、InGaAs、AlInAs、AlInP、AlGaP、InGaP、GaSb、InSb、InAs、AlGaSb、AlSb、InGaSb、AlGaAsSb、InGaAsSb、SiC、Ga 2 O 3 Any one or any combination of BN, and the thickness of the barrier layer is 5 to 600 Emi;
the well layer of the second sub-quantum well is GaN, inGaN, inN, alInN, alInGaN, alN, gaAs, gaP, inP, alGaAs, alInGaAs, alGaInP, inGaAs, alInAs, alInP, alGaP, inGaP, gaSb, inSb, inAs, alGaSb, alSb, inGaSb, alGaAsSb, inGaAsSb, siC, ga 2 O 3 Any one or any combination of BN, and the thickness of the trap layer is 5 to 100 Emi; the barrier layer of the second sub-quantum well is GaN, inGaN, inN, alInN, alInGaN, alN, gaAs, gaP, inP, alGaAs, alInGaAs, alGaInP, inGaAs, alInAs, alInP, alGaP, inGaP, gaSb, inSb, inAs, alGaSb, alSb, inGaSb, alGaAsSb, inGaAsSb, siC, ga 2 O 3 BN, barrier layer thickness of 5 to 300 a m;
the well layer of the third sub-quantum well is GaN, inGaN, inN, alInN, alInGaN, alN, gaAs, gaP, inP, alGaAs, alInGaAs, alGaInP, inGaAs, alInAs, alInP, alGaP, inGaP, gaSb, inSb, inAs, alGaSb, alSb, inGaSb, alGaAsSb, inGaAsSb, siC, ga 2 O 3 The thickness of the trap layer is 5 to 200 meter, and the light-emitting wavelength is 200 to 1800nm; the barrier layer of the third sub-quantum well is GaN, inGaN, inN, alInN, alInGaN, alN, gaAs, gaP, inP, alGaAs, alInGaAs, alGaInP, inGaAs, alInAs, alInP, alGaP, inGaP, gaSb, inSb, inAs, alGaSb, alSb, inGaSb, alGaAsSb, inGaAsSb, siC, ga 2 O 3 BN, or any combination thereof, the barrier layer thickness is 5 to 200 a m.
Preferably, the n-type semiconductor and the p-type semiconductor include GaN, inGaN, inN, alInN, alInGaN, alN, gaAs, gaP, inP, alGaAs, alInGaAs, alGaInP, inGaAs, alInAs, alInP, alGaP, inGaP, gaSb, inSb, inAs, alGaSb, alSb, inGaSb, alGaAsSb,InGaAsSb、SiC、Ga 2 O 3 BN, the thickness of the n-type semiconductor is 50nm to 8000nm, and the thickness of the p-type semiconductor is 5 to 9000 a m;
the substrate comprises sapphire, silicon, ge, siC, alN, gaN, gaAs, gaSb, inSb, inP, sapphire/SiO 2 Composite substrate, sapphire/AlN composite substrate, sapphire/SiN x Magnesia-alumina spinel MgAl 2 O 4 MgO, znO, mgO, spinel, zrB 2 、LiAlO 2 And LiGaO 2 Any one of the composite substrates.
The beneficial effects of the application are as follows: on the basis of the traditional semiconductor light-emitting element, the thermal expansion coefficient, the elastic coefficient and the lattice constant of the well layer and the barrier layer of the quantum well layer are designed differently, so that the thermal mismatch and the lattice mismatch of the quantum well are reduced, the crystal quality and the interface quality of the quantum well are improved, the deterioration of the crystal quality interface quality in the aging process is inhibited, the probability of capturing carriers by defects in the aging process is reduced, the aging resistance change is further reduced, and the aging voltage change is reduced from +/-0.05V to 0.1V to +/-0.01 to 0.05V.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the application and do not constitute a limitation on the application. In the drawings:
fig. 1 is a schematic structural view of a semiconductor light emitting device according to embodiment 1 of the present application;
fig. 2 is a schematic structural diagram of a semiconductor light emitting device according to embodiment 2 of the present application;
fig. 3 is a SIMS secondary ion mass spectrum of the structure of a semiconductor light-emitting element according to embodiment 2 of the present application;
fig. 4 is a partial structure SIMS secondary ion mass spectrum of a semiconductor light-emitting element according to embodiment 2 of the present application;
fig. 5 is a TEM image of a first sub-quantum well layer of the semiconductor light emitting device according to embodiment 2 of the present application;
fig. 6 is a TEM image of a second sub-quantum well layer of the semiconductor light emitting device according to embodiment 2 of the present application;
fig. 7 is a TEM image of a third sub-quantum well layer of the semiconductor light emitting device according to embodiment 2 of the present application;
fig. 8 is a TEM image of a p-type semiconductor light emitting device according to embodiment 2 of the present application.
Reference numerals:
100. a substrate, 101, an n-type semiconductor, 102, a quantum well layer, 103, a p-type semiconductor;
102a, first sub-quantum well layers, 102b, second sub-quantum well layers, 102c, third sub-quantum well layers.
Detailed Description
In order to make the technical solutions and advantages of the embodiments of the present application more apparent, the following detailed description of exemplary embodiments of the present application is provided in conjunction with the accompanying drawings, and it is apparent that the described embodiments are only some embodiments of the present application and not exhaustive of all embodiments. It should be noted that, without conflict, the embodiments of the present application and features of the embodiments may be combined with each other.
Example 1
As shown in fig. 1, the present embodiment proposes a semiconductor light emitting element including a substrate 100, an n-type semiconductor 101, a quantum well layer 102, and a p-type semiconductor 103, which are disposed in this order from bottom to top.
Specifically, in the present embodiment, the quantum well layer 102 is a periodic structure composed of a well layer and a barrier layer. Wherein, the well layer and the barrier layer have thermal expansion coefficient, elastic coefficient and lattice constant parameter characteristics. And, the thermal expansion coefficient, the elastic coefficient, and the lattice constant can affect the thermal mismatch and lattice mismatch of the quantum well in the semiconductor light emitting element.
The thermal expansion coefficient refers to the expansion phenomenon of an object caused by temperature change, and is specifically represented by volume change caused by unit temperature change under the condition of a certain pressure.
The modulus of elasticity is the ratio of stress to strain experienced by an object.
The lattice constant is the fundamental structural parameter of the crystalline material and refers to the side length of the unit cell, i.e. the side length of each parallelepiped element. The lattice constant has a direct relationship with the binding energy between atoms. The change in lattice constant reflects the change in the composition, stress state, and the like inside the crystal.
The present embodiment performs differential design on the thermal expansion coefficients, the elastic coefficients and the lattice constants of the well layer and the barrier layer in the quantum well layer 102 based on the characteristics of the thermal expansion coefficients, the elastic coefficients and the lattice constants, so as to reduce the thermal mismatch and the lattice mismatch of the quantum well.
Specifically, in the quantum well layer 102 of the semiconductor light emitting element of the present embodiment, the thermal expansion coefficient, the elastic coefficient, and the lattice constant of the well layer and the barrier layer are defined, respectively:
coefficient of thermal expansion: the thermal expansion coefficient of the well layer is smaller than or equal to that of the barrier layer;
coefficient of elasticity: the elastic coefficient of the well layer is smaller than or equal to that of the barrier layer;
lattice constant: the lattice constant of the well layer is greater than or equal to the lattice constant of the barrier layer.
More specifically, in order to achieve better effects of reducing thermal mismatch and lattice mismatch of the quantum well, the present embodiment further defines the thermal expansion coefficient, the elastic coefficient, and the lattice constant value ranges of the well layer and the barrier layer in the quantum well layer 102, which are specifically defined as follows:
coefficient of thermal expansion: 2.5.ltoreq.the thermal expansion coefficient of the well layer.ltoreq.the thermal expansion coefficient of the barrier layer 3.5 (10 -6 /K);
Coefficient of elasticity: the elastic coefficient of the well layer is not less than 200 and not more than 450GPa of the barrier layer;
lattice constant: the lattice constant of the barrier layer is more than or equal to 3.0 and less than or equal to 3.8 angstroms.
The thermal expansion coefficient, the elastic coefficient and the lattice constant of the well layer and the barrier layer of the quantum well layer 102 are designed differently on the basis of the traditional semiconductor light-emitting element, so that the thermal mismatch and the lattice mismatch of the quantum well are reduced, the crystal quality and the interface quality of the quantum well are improved, the interface quality deterioration of the crystal quality in the aging process is restrained, the probability of capturing carriers by defects in the aging process is reduced, the aging resistance change is further reduced, and the aging voltage change is reduced from +/-0.05V to 0.1V to +/-0.01 to 0.05V.
Further, in the present embodiment, the n-type semiconductor 101 and the p-type semiconductor 103 include GaN, inGaN, inN, alInN, alInGaN, alN, gaAs, gaP, inP, alGaAs, alInGaAs, alGaInP, inGaAs, alInAs, alInP, alGaP, inGaP, gaSb, inSb, inAs, alGaSb, alSb, inGaSb, alGaAsSb, inGaAsSb, siC, ga 2 O 3 BN, the thickness of the n-type semiconductor 101 is 50nm to 8000nm, and the thickness of the p-type semiconductor 103 is 5 a m to 9000 a m.
The substrate 100 includes sapphire, silicon, ge, siC, alN, gaN, gaAs, gaSb, inSb, inP, sapphire/SiO 2 Composite substrate, sapphire/AlN composite substrate, sapphire/SiN x Magnesia-alumina spinel MgAl 2 O 4 MgO, znO, mgO, spinel, zrB 2 、LiAlO 2 And LiGaO 2 Any one of the composite substrates.
Example 2
As shown in fig. 2 to 8, the present embodiment proposes a semiconductor light emitting element including a substrate 100, an n-type semiconductor 101, a quantum well layer 102, and a p-type semiconductor 103, which are disposed in this order from bottom to top.
Specifically, in the present embodiment, the quantum well layer 102 is a periodic structure composed of a well layer and a barrier layer. Wherein, the well layer and the barrier layer have thermal expansion coefficient, elastic coefficient and lattice constant parameter characteristics. And, the thermal expansion coefficient, the elastic coefficient, and the lattice constant can affect the thermal mismatch and lattice mismatch of the quantum well in the semiconductor light emitting element.
The present embodiment performs differential design on the thermal expansion coefficients, the elastic coefficients and the lattice constants of the well layer and the barrier layer in the quantum well layer 102 based on the characteristics of the thermal expansion coefficients, the elastic coefficients and the lattice constants, so as to reduce the thermal mismatch and the lattice mismatch of the quantum well.
Specifically, in the quantum well layer 102 of the semiconductor light emitting element of the present embodiment, the thermal expansion coefficient, the elastic coefficient, and the lattice constant of the well layer and the barrier layer are defined, respectively:
coefficient of thermal expansion: the thermal expansion coefficient of the well layer is smaller than or equal to that of the barrier layer;
coefficient of elasticity: the elastic coefficient of the well layer is smaller than or equal to that of the barrier layer;
lattice constant: the lattice constant of the well layer is greater than or equal to the lattice constant of the barrier layer.
More specifically, in the present embodiment, the quantum well layer 102 includes a first sub-quantum well layer 102a, a second sub-quantum well layer 102b, and a third sub-quantum well layer 102c. The first sub-quantum well layer 102a, the second sub-quantum well layer 102b and the third sub-quantum well layer 102c are all of a periodic structure consisting of a well layer and a barrier layer, wherein the number of periods of the first sub-quantum well layer 102a is m.gtoreq.30.gtoreq.1, the number of periods of the second sub-quantum well is n.gtoreq.20.gtoreq.1, and the number of periods of the third sub-quantum well is r.gtoreq.20.gtoreq.3.
The thermal expansion coefficient, the elastic coefficient and the lattice constant in each sub-quantum well layer are further limited in this embodiment, and specifically are as follows:
coefficient of thermal expansion:
the thermal expansion coefficient a of the well layer of the first sub-quantum well is less than or equal to the thermal expansion coefficient b of the barrier layer of the first sub-quantum well, and a is less than or equal to 2.5 and b is less than or equal to 3.5 (10) -6 /K);
The thermal expansion coefficient c of the well layer of the second sub-quantum well is less than or equal to the thermal expansion coefficient d of the barrier layer of the second sub-quantum well, and c is less than or equal to 2.5 and less than or equal to d is less than or equal to 3.5 (10) -6 /K);
The thermal expansion coefficient e of the well layer of the third sub-quantum well is less than or equal to the thermal expansion coefficient f of the barrier layer of the third sub-quantum well, and is less than or equal to 2.5 and less than or equal to f and less than or equal to 3.5 (10) -6 /K);
On this basis, the present embodiment further defines the relationship of thermal expansion coefficients of the first sub-quantum well layer 102a, the second sub-quantum well layer 102b, and the third sub-quantum well layer 102 c:
the well layer thermal expansion coefficient e of the third sub quantum well is less than or equal to the well layer thermal expansion coefficient c of the second sub quantum well is less than or equal to the well layer thermal expansion coefficient a of the first sub quantum well, the barrier layer thermal expansion coefficient b of the first sub quantum well is less than or equal to the barrier layer thermal expansion coefficient d of the second sub quantum well is less than or equal to the barrier layer thermal expansion coefficient f of the third sub quantum well.
Coefficient of elasticity:
the well layer elasticity coefficient g of the first sub quantum well is not more than 200 and not more than 450GPa, and the barrier layer elasticity coefficient h of the first sub quantum well is not more than 200;
the well layer elastic coefficient i of the second sub-quantum well is not less than the barrier layer elastic coefficient j of the second sub-quantum well, and i is not less than 200 and not more than j is not less than 450GPa;
the well layer elasticity coefficient k of the third sub quantum well is less than or equal to the barrier layer elasticity coefficient l of the third sub quantum well, and k is more than or equal to 200 and less than or equal to l and less than or equal to 450GPa;
on this basis, the present embodiment also defines the relationship of the elastic coefficients of the first sub-quantum well layer 102a, the second sub-quantum well layer 102b, and the third sub-quantum well layer 102 c:
the well layer elasticity coefficient k of the third sub quantum well is less than or equal to the well layer elasticity coefficient i of the second sub quantum well is less than or equal to the well layer elasticity coefficient g of the first sub quantum well, the barrier layer elasticity coefficient l of the third sub quantum well is less than or equal to the barrier layer elasticity coefficient j of the second sub quantum well is less than or equal to the barrier layer elasticity coefficient h of the first sub quantum well.
Lattice constant:
the lattice constant s of the well layer of the first sub-quantum well is more than or equal to the lattice constant t of the barrier layer of the first sub-quantum well, and t is more than or equal to 3.0 and less than or equal to s is less than or equal to 3.8 Emeter;
the lattice constant u of the well layer of the second sub-quantum well is larger than or equal to the lattice constant v of the barrier layer of the second sub-quantum well, and v is larger than or equal to 3.0 and smaller than or equal to 3.8 Emeter;
the lattice constant w of the well layer of the third sub-quantum well is more than or equal to the lattice constant x of the barrier layer of the third sub-quantum well, and x is more than or equal to 3.0 and less than or equal to 3.8 Emeter;
on this basis, the present embodiment further defines the lattice constant relationship of the first sub-quantum well layer 102a, the second sub-quantum well layer 102b, and the third sub-quantum well layer 102 c:
the barrier layer lattice constant x of the third sub-quantum well is less than or equal to the barrier layer lattice constant v of the second sub-quantum well and less than or equal to the barrier layer lattice constant t of the first sub-quantum well, the well layer lattice constant s of the first sub-quantum well is less than or equal to the well layer lattice constant u of the second sub-quantum well and less than or equal to the well layer lattice constant w of the third sub-quantum well.
The thermal expansion coefficient, the elastic coefficient and the lattice constant of the well layer and the barrier layer of the quantum well layer 102 are designed differently on the basis of the traditional semiconductor light-emitting element, so that the thermal mismatch and the lattice mismatch of the quantum well are reduced, the crystal quality and the interface quality of the quantum well are improved, the interface quality deterioration of the crystal quality in the aging process is restrained, the probability of capturing carriers by defects in the aging process is reduced, the aging resistance change is further reduced, and the aging voltage change is reduced from +/-0.05V to 0.1V to +/-0.01 to 0.05V.
Further, the well layer of the first sub-quantum well is GaN, inGaN, inN, alInN, alInGaN, alN, gaAs, gaP, inP, alGaAs, alInGaAs, alGaInP, inGaAs, alInAs, alInP, alGaP, inGaP, gaSb, inSb, inAs, alGaSb, alSb, inGaSb, alGaAsSb, inGaAsSb, siC, ga 2 O 3 Any one or any combination of BN, and the thickness of the trap layer is 5 to 200 Emeter; the barrier layer of the first sub-quantum well is GaN, inGaN, inN, alInN, alInGaN, alN, gaAs, gaP, inP, alGaAs, alInGaAs, alGaInP, inGaAs, alInAs, alInP, alGaP, inGaP, gaSb, inSb, inAs, alGaSb, alSb, inGaSb, alGaAsSb, inGaAsSb, siC, ga 2 O 3 Any one or any combination of BN, and the thickness of the barrier layer is 5 to 600 Emi;
the well layer of the second sub-quantum well is GaN, inGaN, inN, alInN, alInGaN, alN, gaAs, gaP, inP, alGaAs, alInGaAs, alGaInP, inGaAs, alInAs, alInP, alGaP, inGaP, gaSb, inSb, inAs, alGaSb, alSb, inGaSb, alGaAsSb, inGaAsSb, siC, ga 2 O 3 Any one or any combination of BN, and the thickness of the trap layer is 5 to 100 Emi; the barrier layer of the second sub-quantum well is GaN, inGaN, inN, alInN, alInGaN, alN, gaAs, gaP, inP, alGaAs, alInGaAs, alGaInP, inGaAs, alInAs, alInP, alGaP, inGaP, gaSb, inSb, inAs, alGaSb, alSb, inGaSb, alGaAsSb, inGaAsSb, siC, ga 2 O 3 BN, barrier layer thickness of 5 to 300 a m;
the well layer of the third sub quantum well is GaN, inGaN,InN、AlInN、AlInGaN、AlN、GaAs、GaP、InP、AlGaAs、AlInGaAs、AlGaInP、InGaAs、AlInAs、AlInP、AlGaP、InGaP、GaSb、InSb、InAs、AlGaSb、AlSb、InGaSb、AlGaAsSb、InGaAsSb、SiC、Ga 2 O 3 The thickness of the trap layer is 5 to 200 meter, and the light-emitting wavelength is 200 to 1800nm; the barrier layer of the third sub-quantum well is GaN, inGaN, inN, alInN, alInGaN, alN, gaAs, gaP, inP, alGaAs, alInGaAs, alGaInP, inGaAs, alInAs, alInP, alGaP, inGaP, gaSb, inSb, inAs, alGaSb, alSb, inGaSb, alGaAsSb, inGaAsSb, siC, ga 2 O 3 BN, or any combination thereof, the barrier layer thickness is 5 to 200 a m.
The n-type semiconductor 101 and the p-type semiconductor 103 include GaN, inGaN, inN, alInN, alInGaN, alN, gaAs, gaP, inP, alGaAs, alInGaAs, alGaInP, inGaAs, alInAs, alInP, alGaP, inGaP, gaSb, inSb, inAs, alGaSb, alSb, inGaSb, alGaAsSb, inGaAsSb, siC, ga 2 O 3 BN, the thickness of the n-type semiconductor 101 is 50nm to 8000nm, and the thickness of the p-type semiconductor 103 is 5 to 9000 a m;
the substrate 100 includes sapphire, silicon, ge, siC, alN, gaN, gaAs, gaSb, inSb, inP, sapphire/SiO 2 Composite substrate, sapphire/AlN composite substrate, sapphire/SiN x Magnesia-alumina spinel MgAl 2 O 4 MgO, znO, mgO, spinel, zrB 2 、LiAlO 2 And LiGaO 2 Any one of the composite substrates.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present application without departing from the spirit or scope of the application. Thus, it is intended that the present application also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.

Claims (10)

1. The semiconductor light-emitting element comprises a substrate, an n-type semiconductor, a quantum well layer and a p-type semiconductor which are sequentially arranged from bottom to top, and is characterized in that the quantum well layer is of a periodic structure consisting of a well layer and a barrier layer, the thermal expansion coefficient of the well layer is smaller than or equal to that of the barrier layer, the elastic coefficient of the well layer is smaller than or equal to that of the barrier layer, and the lattice constant of the well layer is larger than or equal to that of the barrier layer.
2. The semiconductor light-emitting device according to claim 1, wherein the quantum well layer includes a first sub-quantum well layer, a second sub-quantum well layer, and a third sub-quantum well layer, wherein a cycle number of the first sub-quantum well layer is m.gtoreq.30.gtoreq.1, a cycle number of the second sub-quantum well is n.gtoreq.20.gtoreq.1, and a cycle number of the third sub-quantum well is r.gtoreq.20.gtoreq.3.
3. The semiconductor light-emitting element according to claim 2, wherein a well layer thermal expansion coefficient a of the first sub-quantum well is equal to or less than a barrier layer thermal expansion coefficient b of the first sub-quantum well, and a is equal to or less than 2.5 and b is equal to or less than 3.5 (10 -6 /K);
The thermal expansion coefficient c of the well layer of the second sub-quantum well is less than or equal to the thermal expansion coefficient d of the barrier layer of the second sub-quantum well, and c is less than or equal to 2.5 and less than or equal to d is less than or equal to 3.5 (10) -6 /K);
The thermal expansion coefficient e of the well layer of the third sub-quantum well is less than or equal to the thermal expansion coefficient f of the barrier layer of the third sub-quantum well, and is less than or equal to 2.5 and less than or equal to f and less than or equal to 3.5 (10) -6 /K)。
4. A semiconductor light emitting device according to claim 3 wherein the well layer thermal expansion coefficient e of the third sub-quantum well is equal to or less than the well layer thermal expansion coefficient c of the second sub-quantum well is equal to or less than the well layer thermal expansion coefficient a of the first sub-quantum well is equal to or less than the barrier layer thermal expansion coefficient b of the first sub-quantum well is equal to or less than the barrier layer thermal expansion coefficient d of the second sub-quantum well is equal to or less than the barrier layer thermal expansion coefficient f of the third sub-quantum well.
5. The semiconductor light-emitting element according to claim 2, wherein a well layer elastic coefficient g of the first sub-quantum well is equal to or less than a barrier layer elastic coefficient h of the first sub-quantum well, and g is equal to or less than 200 and equal to or less than h is equal to or less than 450GPa;
the well layer elastic coefficient i of the second sub-quantum well is not less than the barrier layer elastic coefficient j of the second sub-quantum well, and i is not less than 200 and not more than j is not less than 450GPa;
the well layer elasticity coefficient k of the third sub-quantum well is less than or equal to the barrier layer elasticity coefficient l of the third sub-quantum well, and k is more than or equal to 200 and less than or equal to l and less than or equal to 450GPa.
6. The semiconductor light-emitting device according to claim 5, wherein a well layer elastic coefficient k of the third sub-quantum well is equal to or smaller than a well layer elastic coefficient i of the second sub-quantum well is equal to or smaller than a well layer elastic coefficient g of the first sub-quantum well, and a barrier layer elastic coefficient l of the third sub-quantum well is equal to or smaller than a barrier layer elastic coefficient j of the second sub-quantum well is equal to or smaller than a barrier layer elastic coefficient h of the first sub-quantum well.
7. The semiconductor light-emitting element according to claim 2, wherein a well layer lattice constant s of the first sub-quantum well is equal to or larger than a barrier layer lattice constant t of the first sub-quantum well, and wherein t is equal to or larger than 3.0 and s is equal to or smaller than 3.8 a;
the lattice constant u of the well layer of the second sub-quantum well is larger than or equal to the lattice constant v of the barrier layer of the second sub-quantum well, and v is larger than or equal to 3.0 and smaller than or equal to 3.8 Emeter;
the lattice constant w of the well layer of the third sub-quantum well is larger than or equal to the lattice constant x of the barrier layer of the third sub-quantum well, and x is larger than or equal to 3.0 and smaller than or equal to 3.8 Emeter.
8. The semiconductor light-emitting device according to claim 7, wherein a barrier layer lattice constant x of the third sub-quantum well is equal to or smaller than a barrier layer lattice constant v of the second sub-quantum well is equal to or smaller than a barrier layer lattice constant t of the first sub-quantum well, and a well layer lattice constant s of the first sub-quantum well is equal to or smaller than a well layer lattice constant u of the second sub-quantum well is equal to or smaller than a well layer lattice constant w of the third sub-quantum well.
9. The semiconductor light emitting device according to claim 2, wherein the well layer of the first sub-quantum well is GaN, inGaN, inN, alInN, alInGaN, alN, gaAs, gaP, inP, alGaAs, alInGaAs, alGaInP, inGaAs, alInAs, alInP, alGaP, inGaP, gaSb, inSb, inAs, alGaSb, alSb, inGaSb, alGaAsSb, inGaAsSb、SiC、Ga 2 O 3 Any one or any combination of BN, and the thickness of the trap layer is 5 to 200 Emeter; the barrier layer of the first sub-quantum well is GaN, inGaN, inN, alInN, alInGaN, alN, gaAs, gaP, inP, alGaAs, alInGaAs, alGaInP, inGaAs, alInAs, alInP, alGaP, inGaP, gaSb, inSb, inAs, alGaSb, alSb, inGaSb, alGaAsSb, inGaAsSb, siC, ga 2 O 3 Any one or any combination of BN, and the thickness of the barrier layer is 5 to 600 Emi;
the well layer of the second sub-quantum well is GaN, inGaN, inN, alInN, alInGaN, alN, gaAs, gaP, inP, alGaAs, alInGaAs, alGaInP, inGaAs, alInAs, alInP, alGaP, inGaP, gaSb, inSb, inAs, alGaSb, alSb, inGaSb, alGaAsSb, inGaAsSb, siC, ga 2 O 3 Any one or any combination of BN, and the thickness of the trap layer is 5 to 100 Emi; the barrier layer of the second sub-quantum well is GaN, inGaN, inN, alInN, alInGaN, alN, gaAs, gaP, inP, alGaAs, alInGaAs, alGaInP, inGaAs, alInAs, alInP, alGaP, inGaP, gaSb, inSb, inAs, alGaSb, alSb, inGaSb, alGaAsSb, inGaAsSb, siC, ga 2 O 3 BN, barrier layer thickness of 5 to 300 a m;
the well layer of the third sub-quantum well is GaN, inGaN, inN, alInN, alInGaN, alN, gaAs, gaP, inP, alGaAs, alInGaAs, alGaInP, inGaAs, alInAs, alInP, alGaP, inGaP, gaSb, inSb, inAs, alGaSb, alSb, inGaSb, alGaAsSb, inGaAsSb, siC, ga 2 O 3 The thickness of the trap layer is 5 to 200 meter, and the light-emitting wavelength is 200 to 1800nm; the barrier layer of the third sub-quantum well is GaN, inGaN, inN, alInN, alInGaN, alN, gaAs, gaP, inP, alGaAs, alInGaAs, alGaInP, inGaAs, alInAs, alInP, alGaP, inGaP, gaSb, inSb, inAs, alGaSb, alSb, inGaSb, alGaAsSb, inGaAsSb, siC, ga 2 O 3 BN, or any combination thereof, the barrier layer thickness is 5 to 200 a m.
10. According to claimThe semiconductor light emitting device according to claim 1, wherein the n-type semiconductor and the p-type semiconductor include GaN, inGaN, inN, alInN, alInGaN, alN, gaAs, gaP, inP, alGaAs, alInGaAs, alGaInP, inGaAs, alInAs, alInP, alGaP, inGaP, gaSb, inSb, inAs, alGaSb, alSb, inGaSb, alGaAsSb, inGaAsSb, siC, ga 2 O 3 BN, the thickness of the n-type semiconductor is 50nm to 8000nm, and the thickness of the p-type semiconductor is 5 to 9000 a m;
the substrate comprises sapphire, silicon, ge, siC, alN, gaN, gaAs, gaSb, inSb, inP, sapphire/SiO 2 Composite substrate, sapphire/AlN composite substrate, sapphire/SiN x Magnesia-alumina spinel MgAl 2 O 4 MgO, znO, mgO, spinel, zrB 2 、LiAlO 2 And LiGaO 2 Any one of the composite substrates.
CN202310641276.7A 2023-06-01 2023-06-01 Semiconductor light-emitting element Pending CN116632128A (en)

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* Cited by examiner, † Cited by third party
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CN117174793A (en) * 2023-10-31 2023-12-05 江西兆驰半导体有限公司 Blue-green light LED epitaxial wafer, preparation method thereof and LED chip
CN117410402A (en) * 2023-12-15 2024-01-16 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer, preparation method thereof and Micro-LED chip

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117174793A (en) * 2023-10-31 2023-12-05 江西兆驰半导体有限公司 Blue-green light LED epitaxial wafer, preparation method thereof and LED chip
CN117174793B (en) * 2023-10-31 2024-01-26 江西兆驰半导体有限公司 Blue-green light LED epitaxial wafer, preparation method thereof and LED chip
CN117410402A (en) * 2023-12-15 2024-01-16 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer, preparation method thereof and Micro-LED chip
CN117410402B (en) * 2023-12-15 2024-03-22 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer, preparation method thereof and Micro-LED chip

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