CN116885066B - Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode - Google Patents
Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title claims abstract description 15
- 229910005191 Ga 2 O 3 Inorganic materials 0.000 claims abstract description 62
- 239000000758 substrate Substances 0.000 claims abstract description 41
- 239000004065 semiconductor Substances 0.000 claims abstract description 35
- 239000000463 material Substances 0.000 claims abstract description 28
- 230000000903 blocking effect Effects 0.000 claims abstract description 27
- 230000006911 nucleation Effects 0.000 claims abstract description 27
- 238000010899 nucleation Methods 0.000 claims abstract description 27
- 230000003647 oxidation Effects 0.000 claims description 9
- 238000007254 oxidation reaction Methods 0.000 claims description 9
- 238000004519 manufacturing process Methods 0.000 claims description 7
- 238000000034 method Methods 0.000 claims description 6
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 4
- 229910052760 oxygen Inorganic materials 0.000 claims description 4
- 239000001301 oxygen Substances 0.000 claims description 4
- 229910002601 GaN Inorganic materials 0.000 description 40
- 235000012431 wafers Nutrition 0.000 description 30
- 238000009826 distribution Methods 0.000 description 11
- 230000000052 comparative effect Effects 0.000 description 9
- 230000004888 barrier function Effects 0.000 description 8
- 230000007547 defect Effects 0.000 description 8
- 230000000737 periodic effect Effects 0.000 description 8
- 229910002704 AlGaN Inorganic materials 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 238000010348 incorporation Methods 0.000 description 5
- 238000012360 testing method Methods 0.000 description 5
- 239000013078 crystal Substances 0.000 description 3
- 238000001451 molecular beam epitaxy Methods 0.000 description 2
- 238000011056 performance test Methods 0.000 description 2
- 230000010287 polarization Effects 0.000 description 2
- 230000005428 wave function Effects 0.000 description 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical class [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000005240 physical vapour deposition Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
- H01L33/325—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen characterised by the doping materials
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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Abstract
The invention relates to the technical field of semiconductors, and particularly discloses a light-emitting diode epitaxial wafer and a preparation method thereof, and a light-emitting diode, wherein the preparation method comprises the following steps: providing a substrate; sequentially growing a nucleation layer, an intrinsic semiconductor layer, an N-type layer, a light-emitting layer, an electron blocking layer and a P-type layer on the substrate; the N-type layer comprises first undoped Ga sequentially arranged along the epitaxial direction 2 O 3 Layer, co-doped layer and second undoped Ga 2 O 3 The co-doped layer is a GaN material layer with high doping Si and low doping B, the working voltage of the epitaxial wafer is distributed uniformly, and the antistatic capability is good.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a light-emitting diode epitaxial wafer, a preparation method thereof and a light-emitting diode.
Background
At present, an epitaxial structure of a gallium nitride-based light emitting diode generally comprises a nucleation layer, an intrinsic GaN layer, an N-type semiconductor layer, a light emitting layer, an electron blocking layer and a P-type semiconductor layer which are sequentially grown on a substrate, wherein the N-type semiconductor layer is a GaN material layer doped with high-concentration Si, the growth temperature and the rotation speed are relatively high, and the warp stress is large when the N-type semiconductor layer grows due to the warp and the stress accumulated when the previous nucleation layer and the intrinsic GaN layer grow, so that the Si doping distribution is uneven, the working voltage distribution is uneven, the antistatic capacity is poor, and in addition, the electron moving speed is too fast, the expansion capacity is poor, the hole relative moving speed is slow, and the uneven distribution of the working voltage and the reduction of the antistatic capacity are further aggravated.
Disclosure of Invention
The invention aims at providing a light-emitting diode epitaxial wafer with uniform working voltage distribution and good antistatic capability, a preparation method thereof and a light-emitting diode aiming at the existing technical situation.
In order to achieve the above purpose, the invention adopts the following technical scheme:
first, the invention provides a preparation method of a light-emitting diode epitaxial wafer, which comprises the following steps:
providing a substrate;
sequentially growing a nucleation layer, an intrinsic semiconductor layer, an N-type layer, a light-emitting layer, an electron blocking layer and a P-type layer on the substrate;
the N-type layer comprises first undoped Ga sequentially arranged along the epitaxial direction 2 O 3 Layer, co-doped layer and second undoped Ga 2 O 3 And the codoped layer is a GaN material layer with high doping Si and low doping B.
In some embodiments, the doping concentration of Si in the co-doped layer is greater than the doping concentration of B, and the ratio of the doping concentration of Si/the doping concentration of B is at least 10 13 。
In some embodiments, the doping concentration of Si in the co-doped layer is 5×10 18 cm -3 ~1×10 19 cm -3 B doping concentration of 1×10 3 cm -3 ~1×10 5 cm -3 。
In some embodiments, the first undoped Ga 2 O 3 Layer and the second undoped Ga 2 O 3 The thickness of the layers is 10 nm-500 nm.
In some embodiments, the first undoped Ga 2 O 3 Layers and/or the second undoped Ga 2 O 3 The preparation steps of the layer comprise:
growing an undoped GaN layer on the epitaxial wafer;
transferring the epitaxial wafer to a vacuum tube furnace for thermal oxidation treatment, wherein the oxidation temperature is 900-1000 ℃, and the oxygen flow is 80-120 sccm.
In some embodiments, the co-doped layer has a growth temperature of 1000 ℃ to 1200 ℃ and a thickness of 1 μm to 2 μm.
The invention further provides a light-emitting diode epitaxial wafer, which comprises a substrate and an epitaxial layer arranged on the substrate, wherein the epitaxial layer comprises a nucleation layer, an intrinsic semiconductor layer, an N-type layer, a light-emitting layer, an electron blocking layer and a P-type layer which are sequentially grown on the substrate,
the N-type layer comprises first undoped Ga sequentially arranged along the epitaxial direction 2 O 3 Layer, co-doped layer and second undoped Ga 2 O 3 And the codoped layer is a GaN material layer with high doping Si and low doping B.
In some embodiments, the doping concentration of Si in the co-doped layer is 5×10 18 cm -3 ~1×10 19 cm -3 B doping concentration of 1×10 3 cm -3 ~1×10 5 cm -3 。
In some embodiments, the first undoped Ga 2 O 3 Layer and the second undoped Ga 2 O 3 The thickness of the layers is 10 nm-500 nm, the growth temperature of the co-doped layers is 1000-1200 ℃, and the thickness is 1-2 mu m.
Furthermore, the invention provides a light-emitting diode, comprising the epitaxial wafer manufactured by the manufacturing method of the light-emitting diode epitaxial wafer.
The invention has the beneficial effects that:
in the invention, the N-type layer is formed by first undoped Ga 2 O 3 Layer, co-doped layer and second undoped Ga 2 O 3 A layer structure, wherein first undoped Ga is arranged on both sides of the co-doped layer 2 O 3 Layer and second undoped Ga 2 O 3 Layers, on the one hand, due to Ga 2 O 3 The lattice constant of the material is large, so that tensile stress can be provided for the co-doped layer, effective incorporation of Si in the co-doped layer is increased, and working voltage is reduced; on the other hand, ga 2 O 3 The defect density of the material is low, so that the defect extending from the bottom layer can be blocked, and the defect caused by high Si doping is repaired, thereby greatly improving the antistatic capability of the light-emitting diode; second, a first undoped Ga 2 O 3 The tensile stress provided by the layer can also reduce the warpage of the co-doped layer, increase the distribution uniformity of Si and B, promote the distribution uniformity of working voltage, and ensure that the second undoped Ga 2 O 3 The tensile stress provided by the layer can reduce the piezoelectric polarization effect born by the light-emitting layer, increase the incorporation of In and increase the overlap of electron and hole wave functions; furthermore, ga 2 O 3 The material has a forbidden bandwidth of about 4.9eV, which is wider than that of GaN material (3.4 eV), has a blocking effect on electrons generated by the co-doped layer, and can reduce the mobility of the electrons, thereby increasing the balance of electron holes in the light-emitting layer, reducing electron overflow and improving the antistatic capability. The co-doped layer is a GaN material layer with high doping Si and low doping B, and because B atoms are very small, a small amount of B atoms are doped in the GaN material layer with high doping Si, so that the co-doped layer can be used as a substitutional atom, a leakage channel is reduced, and the antistatic capability is improved.
Thus, the present invention is achieved by sequentially stacking first undoped Ga 2 O 3 Layer, co-doped layer and second undoped Ga 2 O 3 The N-type layer is formed by the layers, so that the working voltage is effectively reduced, the distribution uniformity of the working voltage is improved, and the antistatic capability of the device is improved.
Drawings
Fig. 1 is a flowchart of a method for manufacturing a light emitting diode epitaxial wafer according to the present invention.
Fig. 2 is a flow chart of a method for preparing an N-type layer according to the present invention.
Fig. 3 is a schematic structural diagram of an led epitaxial wafer according to the present invention.
Detailed Description
The present invention will be described in further detail below in order to make the objects, technical solutions and advantages of the present invention more apparent.
First, referring to fig. 1 to 3, the invention discloses a method for preparing a light emitting diode epitaxial wafer, which comprises the following steps:
s100. providing a substrate 1, the substrate 1 may be an SiC substrate, a Si substrate, a sapphire substrate, or the like, by way of example, but not limited thereto;
s200, sequentially growing a nucleation layer 2, an intrinsic semiconductor layer 3, an N-type layer 4, a light-emitting layer 5, an electron blocking layer 6 and a P-type layer 7 on a substrate 1;
the N-type layer 4 comprises first undoped Ga sequentially arranged along the epitaxial direction 2 O 3 Layer 41, co-doped layer 42 and second undoped Ga 2 O 3 The layer 43, the co-doped layer 42 is a GaN material layer with high doping Si and low doping B.
In the present invention, the N-type layer 4 is composed of a first undoped Ga 2 O 3 Layer 41, co-doped layer 42 and second undoped Ga 2 O 3 Layer 43 is formed in that first undoped Ga is arranged on both sides of codoped layer 42 2 O 3 Layer 41 and second undoped Ga 2 O 3 Layer 43, on the one hand, due to Ga 2 O 3 The lattice constant of the material is large, so that tensile stress can be provided for the co-doped layer 42, effective incorporation of Si in the co-doped layer 42 is increased, and the working voltage is reduced; on the other hand, ga 2 O 3 The defect density of the material is low, so that the defect extending from the bottom layer can be blocked, and the defect caused by high Si doping is repaired, thereby greatly improving the antistatic capability of the light-emitting diode; second, a first undoped Ga 2 O 3 The tensile stress provided by layer 41 also reduces warpage of co-doped layer 42, increases Si and B distribution uniformity, improves operating voltage distribution uniformity, and is second undoped Ga 2 O 3 The tensile stress provided by layer 43 may reduce the piezoelectric polarization effect experienced by light emitting layer 5, increase In incorporation, increase overlap of electron and hole wave functions; furthermore, ga 2 O 3 The forbidden bandwidth of the material is about 4.9eV, and is wider than that of a GaN material (3.4 eV), so that electrons generated by the co-doped layer 42 are blocked, the mobility of the electrons can be reduced, the balance of electron holes in the light-emitting layer 5 is increased, the overflow of the electrons is reduced, and the antistatic capability is improved. The co-doped layer 42 is a GaN material layer with high doping Si and low doping B, and since the B atoms are very small, a small amount of B atoms are doped in the GaN material layer with high doping Si, which can be used as substitutional atoms, so that the leakage current channel is reduced, and the antistatic capability is improved.
Thus, the present invention is achieved by sequentially stacking first undoped Ga 2 O 3 Layer 41, co-doped layer 42 and a second undoped layerGa 2 O 3 Layer 43 forms N-type layer 4, effectively reducing the operating voltage, improving the uniformity of the distribution of the operating voltage, and improving the antistatic ability of the device.
Referring to fig. 1 and 2, the specific steps of step S200 are as follows:
s210, growing a nucleation layer 2 on the substrate 1:
the nucleation layer 2 may be an AlGaN layer or an AlN layer, and has a thickness of 20nm to 100nm.
S220, growing an intrinsic semiconductor layer 3 on the nucleation layer 2:
the intrinsic semiconductor layer 3 may be an intrinsic GaN layer having a thickness of 300nm to 800nm.
S230, growing an N-type layer 4 on the intrinsic semiconductor layer 3:
s231 growth of first undoped Ga on intrinsic semiconductor layer 3 2 O 3 Layer 41;
s232 at first undoped Ga 2 O 3 A co-doped layer 42 is grown on layer 41;
s233 growing a second undoped Ga on the co-doped layer 42 2 O 3 Layer 43.
S240, growing a light-emitting layer 5 on the N-type layer 4:
the light emitting layer 5 may have a periodic structure in which InGaN quantum well layers and GaN quantum barrier layers are alternately stacked, the thickness of a single InGaN quantum well layer is 2nm to 3nm, and the thickness of a single GaN quantum barrier layer is 6nm to 15nm.
S250. growing an electron blocking layer 6 on the light emitting layer 5:
the electron blocking layer 6 may have a periodic structure in which AlGaN layers and InGaN layers are alternately laminated, and has a thickness of 20nm to 100nm.
S260, growing a P-type layer 7 on the electron blocking layer 6:
the P-type layer 7 may be a Mg doped P-type GaN layer with a thickness of 200nm to 300nm.
Wherein the doping concentration of Si in the co-doped layer 42 is greater than that of B, and the ratio of the doping concentration of Si/that of B is at least 10 13 The doping concentration of B is not too high, so that new defects are easily caused by too high doping concentration, and the antistatic capacity of the device is reduced.
Wherein, in the co-doped layer 42, the doping concentration of Si is 5×10 18 cm -3 ~1×10 19 cm -3 B doping concentration of 1×10 3 cm -3 ~1×10 5 cm -3 Exemplary, the doping concentration of Si is 5×10 18 cm -3 、7×10 18 cm -3 、9×10 18 cm -3 Or 1X 10 19 cm -3 However, the method is not limited thereto, the working voltage is increased due to the too low doping concentration of Si, the defect is caused by the too high doping concentration of Si, and the antistatic capability of the device is reduced; exemplary, the doping concentration of B is 1×10 3 cm -3 、5×10 3 cm -3 、9×10 3 cm -3 、1×10 4 cm -3 、5×10 4 cm -3 、9×10 4 cm -3 Or 1X 10 5 cm -3 However, the doping concentration of B is too low to reduce the leakage path.
Wherein the first undoped Ga 2 O 3 Layer 41 and second undoped Ga 2 O 3 The thickness of the layer 43 is 10nm to 500nm, and is exemplified by 10nm, 30nm, 80nm, 150nm, 200nm, 300nm, 350nm, 450nm or 500nm, but not limited thereto, and the effect of too low a thickness is small, the improvement effect is poor, and the too high a thickness has a light absorption effect, and affects the light emitting efficiency.
In one embodiment, the first undoped Ga 2 O 3 Layer 41 and/or second undoped Ga 2 O 3 The preparation steps of layer 43 include:
growing an undoped GaN layer on the epitaxial wafer;
transferring the epitaxial wafer to a vacuum tube furnace for thermal oxidation treatment, wherein the oxidation temperature is 900-1000 ℃, and the oxygen flow is 80-120 sccm.
Illustratively, the oxidation temperature is 900 ℃, 930 ℃, 960 ℃, 980 ℃ or 1000 ℃, but is not limited to this, and in this oxidation temperature range, the formed crystal has better quality, and the oxidation temperature is too low, so that the quality of the crystal is poor; exemplary oxygen flows are, but not limited to, 80sccm, 90sccm, 100sccm, or 120sccm.
In another embodiment, the first undoped Ga 2 O 3 Layer 41 and/or second undoped Ga 2 O 3 Layer 43 may also be formed by sputtering, molecular beam epitaxy, and the like.
The co-doped layer 42 may be formed by chemical vapor deposition, physical vapor deposition, molecular beam epitaxy, or the like, and may be doped by an ion implantation technique.
Wherein the growth temperature of the co-doped layer 42 is 1000 ℃ to 1200 ℃ and the thickness is 1 μm to 2 μm, and the growth temperature is 1000 ℃, 1100 ℃, 1150 ℃ or 1200 ℃ by way of example, but not limited thereto, the incorporation of Si and the crystal quality are affected by the excessively low growth temperature; exemplary thicknesses are 1 μm, 1.3 μm, 1.6 μm, 1.9 μm, or 2 μm, but are not limited thereto.
Next, referring to fig. 3, the invention discloses a light emitting diode epitaxial wafer, which comprises a substrate 1 and an epitaxial layer arranged on the substrate 1, wherein the epitaxial layer comprises a nucleation layer 2, an intrinsic semiconductor layer 3, an N-type layer 4, a light emitting layer 5, an electron blocking layer 6 and a P-type layer 7 which are sequentially grown on the substrate 1,
the N-type layer 4 comprises first undoped Ga sequentially arranged along the epitaxial direction 2 O 3 Layer 41, co-doped layer 42 and second undoped Ga 2 O 3 The layer 43, the co-doped layer 42 is a GaN material layer with high doping Si and low doping B.
The invention is realized by sequentially stacking first undoped Ga 2 O 3 Layer 41, co-doped layer 42 and second undoped Ga 2 O 3 Layer 43 forms N-type layer 4, effectively reducing the operating voltage, improving the uniformity of the distribution of the operating voltage, and improving the antistatic ability of the device.
Wherein, in the co-doped layer 42, the doping concentration of Si is 5×10 18 cm -3 ~1×10 19 cm -3 B doping concentration of 1×10 3 cm -3 ~1×10 5 cm -3 。
Wherein the first undoped Ga 2 O 3 Layer 41 and second undoped Ga 2 O 3 The thickness of the layer 43 is 10-500 nm, the growth temperature of the co-doped layer 42 is 1000-1200 ℃ and the thickness isThe degree is 1 μm to 2 μm.
Furthermore, the invention also discloses a light-emitting diode, which comprises the epitaxial wafer prepared by the preparation method of the light-emitting diode epitaxial wafer.
The invention is further illustrated by the following examples in conjunction with the accompanying drawings:
example 1
First, the invention discloses a preparation method of a light-emitting diode epitaxial wafer, which comprises the following steps:
s100, providing a substrate;
s200, sequentially growing a nucleation layer, an intrinsic semiconductor layer, an N-type layer, a light-emitting layer, an electron blocking layer and a P-type layer on a substrate;
the N-type layer comprises first undoped Ga sequentially arranged along the epitaxial direction 2 O 3 Layer, co-doped layer and second undoped Ga 2 O 3 The co-doped layer is a GaN material layer with high doping Si and low doping B.
The specific steps of step S200 are as follows:
s210, growing a nucleation layer on a substrate:
the nucleation layer is an AlN layer and has a thickness of 30nm.
S220, growing an intrinsic semiconductor layer on the nucleation layer:
the intrinsic semiconductor layer is an intrinsic GaN layer with a thickness of 400nm.
S230, growing an N-type layer on the intrinsic semiconductor layer:
s231 growth of first undoped Ga on intrinsic semiconductor layer 2 O 3 A layer;
s232 at first undoped Ga 2 O 3 Growing a co-doped layer on the layer;
s233 growing a second undoped Ga on the co-doped layer 2 O 3 A layer.
S240, growing a light-emitting layer on the N-type layer:
the light emitting layer is a periodic structure in which InGaN quantum well layers and GaN quantum barrier layers are alternately laminated, the thickness of a single InGaN quantum well layer is 3nm, and the thickness of a single GaN quantum barrier layer is 10nm.
S250, growing an electron blocking layer on the light emitting layer:
the electron blocking layer was a periodic structure in which AlGaN layers and InGaN layers were alternately laminated, and the thickness was 50nm.
S260, growing a P-type layer on the electron blocking layer:
the P-type layer may be a Mg doped P-type GaN layer having a thickness of 300nm.
Wherein the doping concentration of Si in the co-doped layer is greater than that of B, and the ratio of the doping concentration of Si/that of B is at least 10 13 。
Wherein, in the co-doped layer, the doping concentration of Si is 8 multiplied by 10 18 cm -3 B doping concentration of 5×10 3 cm -3 。
Wherein the first undoped Ga 2 O 3 Layer and second undoped Ga 2 O 3 The thickness of the layers was 50nm and the thickness of the codoped layer was 1.6. Mu.m.
Secondly, the embodiment discloses a light-emitting diode epitaxial wafer which comprises a substrate and an epitaxial layer arranged on the substrate, wherein the epitaxial layer comprises a nucleation layer, an intrinsic semiconductor layer, an N-type layer, a light-emitting layer, an electron blocking layer and a P-type layer which are sequentially grown on the substrate,
the N-type layer comprises first undoped Ga sequentially arranged along the epitaxial direction 2 O 3 Layer, co-doped layer and second undoped Ga 2 O 3 The co-doped layer is a GaN material layer with high doping Si and low doping B.
The embodiment also discloses a light-emitting diode, which comprises the epitaxial wafer manufactured by the manufacturing method of the light-emitting diode epitaxial wafer.
Example 2
First, the invention discloses a preparation method of a light-emitting diode epitaxial wafer, which comprises the following steps:
s100, providing a substrate;
s200, sequentially growing a nucleation layer, an intrinsic semiconductor layer, an N-type layer, a light-emitting layer, an electron blocking layer and a P-type layer on a substrate;
the N-type layer comprises first undoped Ga sequentially arranged along the epitaxial direction 2 O 3 Layer, co-doped layer and second un-doped layerDoping Ga 2 O 3 The co-doped layer is a GaN material layer with high doping Si and low doping B.
The specific steps of step S200 are as follows:
s210, growing a nucleation layer on a substrate:
the nucleation layer is an AlN layer and has a thickness of 30nm.
S220, growing an intrinsic semiconductor layer on the nucleation layer:
the intrinsic semiconductor layer is an intrinsic GaN layer with a thickness of 400nm.
S230, growing an N-type layer on the intrinsic semiconductor layer:
s231 growth of first undoped Ga on intrinsic semiconductor layer 2 O 3 A layer;
s232 at first undoped Ga 2 O 3 Growing a co-doped layer on the layer;
s233 growing a second undoped Ga on the co-doped layer 2 O 3 A layer.
S240, growing a light-emitting layer on the N-type layer:
the light emitting layer is a periodic structure in which InGaN quantum well layers and GaN quantum barrier layers are alternately laminated, the thickness of a single InGaN quantum well layer is 3nm, and the thickness of a single GaN quantum barrier layer is 10nm.
S250, growing an electron blocking layer on the light emitting layer:
the electron blocking layer was a periodic structure in which AlGaN layers and InGaN layers were alternately laminated, and the thickness was 50nm.
S260, growing a P-type layer on the electron blocking layer:
the P-type layer may be a Mg doped P-type GaN layer having a thickness of 300nm.
Wherein the doping concentration of Si in the co-doped layer is greater than that of B, and the ratio of the doping concentration of Si/that of B is at least 10 13 。
Wherein, in the co-doped layer, the doping concentration of Si is 1×10 19 cm -3 B doping concentration of 1×10 5 cm -3 。
Wherein the first undoped Ga 2 O 3 Layer and second undoped Ga 2 O 3 The thickness of the layers was 50nm and the thickness of the codoped layer was 1.6. Mu.m.
Secondly, the embodiment discloses a light-emitting diode epitaxial wafer which comprises a substrate and an epitaxial layer arranged on the substrate, wherein the epitaxial layer comprises a nucleation layer, an intrinsic semiconductor layer, an N-type layer, a light-emitting layer, an electron blocking layer and a P-type layer which are sequentially grown on the substrate,
the N-type layer comprises first undoped Ga sequentially arranged along the epitaxial direction 2 O 3 Layer, co-doped layer and second undoped Ga 2 O 3 The co-doped layer is a GaN material layer with high doping Si and low doping B.
The embodiment also discloses a light-emitting diode, which comprises the epitaxial wafer manufactured by the manufacturing method of the light-emitting diode epitaxial wafer.
Example 3
First, the invention discloses a preparation method of a light-emitting diode epitaxial wafer, which comprises the following steps:
s100, providing a substrate;
s200, sequentially growing a nucleation layer, an intrinsic semiconductor layer, an N-type layer, a light-emitting layer, an electron blocking layer and a P-type layer on a substrate;
the N-type layer comprises first undoped Ga sequentially arranged along the epitaxial direction 2 O 3 Layer, co-doped layer and second undoped Ga 2 O 3 The co-doped layer is a GaN material layer with high doping Si and low doping B.
The specific steps of step S200 are as follows:
s210, growing a nucleation layer on a substrate:
the nucleation layer is an AlN layer and has a thickness of 30nm.
S220, growing an intrinsic semiconductor layer on the nucleation layer:
the intrinsic semiconductor layer is an intrinsic GaN layer with a thickness of 400nm.
S230, growing an N-type layer on the intrinsic semiconductor layer:
s231 growth of first undoped Ga on intrinsic semiconductor layer 2 O 3 A layer;
s232 at first undoped Ga 2 O 3 Growing a co-doped layer on the layer;
S233 growing a second undoped Ga on the co-doped layer 2 O 3 A layer.
S240, growing a light-emitting layer on the N-type layer:
the light emitting layer is a periodic structure in which InGaN quantum well layers and GaN quantum barrier layers are alternately laminated, the thickness of a single InGaN quantum well layer is 3nm, and the thickness of a single GaN quantum barrier layer is 10nm.
S250, growing an electron blocking layer on the light emitting layer:
the electron blocking layer was a periodic structure in which AlGaN layers and InGaN layers were alternately laminated, and the thickness was 50nm.
S260, growing a P-type layer on the electron blocking layer:
the P-type layer may be a Mg doped P-type GaN layer having a thickness of 300nm.
Wherein the doping concentration of Si in the co-doped layer is greater than that of B, and the ratio of the doping concentration of Si/that of B is at least 10 13 。
Wherein, in the co-doped layer, the doping concentration of Si is 5 multiplied by 10 18 cm -3 B doping concentration of 1×10 3 cm -3 。
Wherein the first undoped Ga 2 O 3 Layer and second undoped Ga 2 O 3 The thickness of the layers was 300nm and the thickness of the codoped layer was 1. Mu.m.
Secondly, the embodiment discloses a light-emitting diode epitaxial wafer which comprises a substrate and an epitaxial layer arranged on the substrate, wherein the epitaxial layer comprises a nucleation layer, an intrinsic semiconductor layer, an N-type layer, a light-emitting layer, an electron blocking layer and a P-type layer which are sequentially grown on the substrate,
the N-type layer comprises first undoped Ga sequentially arranged along the epitaxial direction 2 O 3 Layer, co-doped layer and second undoped Ga 2 O 3 The co-doped layer is a GaN material layer with high doping Si and low doping B.
The embodiment also discloses a light-emitting diode, which comprises the epitaxial wafer manufactured by the manufacturing method of the light-emitting diode epitaxial wafer.
Comparative example 1
This comparative example differs from example 1 in that the N-type layer is not provided with first undoped Ga 2 O 3 A layer.
Comparative example 2
This comparative example is different from example 1 in that the co-doped layer was replaced with a highly doped Si GaN material layer in which the doping concentration of Si was 8×10 18 cm -3 。
Comparative example 3
This comparative example differs from example 1 in that the N-type layer is not provided with a second undoped Ga 2 O 3 A layer.
Comparative example 4
The present comparative example is different from example 1 in that the N-type layer is a highly doped Si GaN material layer in which the doping concentration of Si is 8×10 18 cm -3 The thickness was 1.6. Mu.m.
Performance test:
(1) The testing method comprises the following steps:
processing the grown epitaxial wafers of each experimental group into 10×24mil LED chips with vertical structures, and testing the light-emitting brightness and the working voltage of the LED chips;
the specific testing method of the chip comprises the following steps: when 120mA of current is introduced, the luminous intensity and the working voltage of the obtained chip are tested;
antistatic performance test: the antistatic performance of the base chip is tested by using an electrostatic instrument under an HBM (human body discharge model) model, and the test chip can bear the passing proportion of reverse 8000V static electricity.
(2) Experimental group: examples 1 to 3 and comparative examples 1 to 4.
(3) Test results:
the foregoing description is only illustrative of the preferred embodiment of the present invention, and is not to be construed as limiting the invention, but is to be construed as limiting the invention to any and all simple modifications, equivalent variations and adaptations of the embodiments described above, which are within the scope of the invention, may be made by those skilled in the art without departing from the scope of the invention.
Claims (4)
1. The preparation method of the light-emitting diode epitaxial wafer is characterized by comprising the following steps of:
providing a substrate;
sequentially growing a nucleation layer, an intrinsic semiconductor layer, an N-type layer, a light-emitting layer, an electron blocking layer and a P-type layer on the substrate;
the N-type layer comprises first undoped Ga sequentially arranged along the epitaxial direction 2 O 3 Layer, co-doped layer and second undoped Ga 2 O 3 The co-doped layer is a GaN material layer with high doping Si and low doping B;
in the co-doped layer, the doping concentration of Si is larger than that of B, and the ratio of the doping concentration of Si to the doping concentration of B is at least 10 13 ;
In the co-doped layer, the doping concentration of Si is 5 multiplied by 10 18 cm -3 ~1×10 19 cm -3 B doping concentration of 1×10 3 cm -3 ~1×10 5 cm -3 ;
The first undoped Ga 2 O 3 Layer and the second undoped Ga 2 O 3 The thickness of the layers is 10 nm-500 nm;
the growth temperature of the co-doped layer is 1000-1200 ℃, and the thickness is 1-2 mu m.
2. The method for manufacturing a light-emitting diode epitaxial wafer according to claim 1, wherein the first undoped Ga 2 O 3 Layers and/or the second undoped Ga 2 O 3 The preparation steps of the layer comprise:
growing an undoped GaN layer on the epitaxial wafer;
transferring the epitaxial wafer to a vacuum tube furnace for thermal oxidation treatment, wherein the oxidation temperature is 900-1000 ℃, and the oxygen flow is 80-120 sccm.
3. An epitaxial wafer of a light-emitting diode comprises a substrate and an epitaxial layer arranged on the substrate, and is characterized in that the epitaxial layer comprises a nucleation layer, an intrinsic semiconductor layer, an N-type layer, a luminescent layer, an electron blocking layer and a P-type layer which are sequentially grown on the substrate,
the N-type layer comprises first undoped Ga sequentially arranged along the epitaxial direction 2 O 3 Layer, co-doped layer and second undoped Ga 2 O 3 The co-doped layer is a GaN material layer with high doping Si and low doping B;
in the co-doped layer, the doping concentration of Si is larger than that of B, and the ratio of the doping concentration of Si to the doping concentration of B is at least 10 13 ;
In the co-doped layer, the doping concentration of Si is 5 multiplied by 10 18 cm -3 ~1×10 19 cm -3 B doping concentration of 1×10 3 cm -3 ~1×10 5 cm -3 ;
The first undoped Ga 2 O 3 Layer and the second undoped Ga 2 O 3 The thickness of the layers is 10 nm-500 nm, the growth temperature of the co-doped layers is 1000-1200 ℃, and the thickness is 1-2 mu m.
4. A light-emitting diode comprising an epitaxial wafer produced by the production method of a light-emitting diode epitaxial wafer according to any one of claims 1 to 2.
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