CN116779738A - Light-emitting diode epitaxial wafer and preparation method thereof - Google Patents
Light-emitting diode epitaxial wafer and preparation method thereof Download PDFInfo
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Abstract
The application provides a light-emitting diode epitaxial wafer and a preparation method thereof, wherein the light-emitting diode epitaxial wafer comprises a substrate, and a first semiconductor layer, an electron injection layer and a second semiconductor layer which are sequentially deposited on the substrate; the electron injection layer comprises a first electron expansion layer, an electron storage layer and a second electron expansion layer which are sequentially stacked, the electron storage layer comprises a plurality of InGaN layers and BSiGaN layers which are alternately stacked, the plurality of InGaN layers and the plurality of BSiGaN layers which are alternately stacked form a superlattice structure, the thickness of the first electron expansion layer is larger than that of the second electron expansion layer, the thickness of the second electron expansion layer is larger than that of the electron storage layer, the thickness of the BSiGaN layer is larger than that of the InGaN layer, the In component range In the InGaN layer is 0.01-0.2, the B component range In the BSiGaN layer is 0.01-0.5, the Si component range In the BSiGaN layer is 0.01-0.1, and the light-emitting efficiency of the quantum well is improved.
Description
Technical Field
The application belongs to the technical field of semiconductors, and particularly relates to a light-emitting diode epitaxial wafer and a preparation method thereof.
Background
In recent years, the application of ultraviolet light is continuously expanded, and the ultraviolet light can be applied to the fields of water purification, ultraviolet curing, sterilization, disinfection, air purification, anti-counterfeiting detection, ultraviolet light treatment, disinfection of medical tools, photoetching, medical diagnosis and the like. Most of the ultraviolet light sources adopted in the current market are mercury lamps, the luminous efficiency of the mercury lamps is high, but the luminous spectrum of the mercury lamps is very wide, and only light with a specific wave band is used in practical application, so that a large amount of light energy can be wasted. Compared with mercury lamps, the gallium nitride-based LED has narrower light-emitting wave band, and no light energy waste occurs. In addition, the gallium nitride-based ultraviolet LED also has the advantages of no toxicity, no harm, long service life and the like. Although gallium nitride-based ultraviolet LEDs have a plurality of advantages, the luminous efficiency of the devices is still lower at present, and the preparation of high-power luminous devices is difficult, so that the main ultraviolet light source in the market at present is still a mercury lamp.
The N-type GaN layer generates a number of electrons that is much larger than the number of holes, and the effective mass of electrons is smaller than that of holes, resulting in mobility of electrons that is much higher than that of holes. Therefore, electrons flow into the active layer, so that a plurality of quantum wells emit light after the active layer, other quantum wells do not emit light, and the light-emitting efficiency of the quantum wells is reduced. In addition, alGaN has a larger polarized electric field, so that a quantum confinement Stark effect can be generated, and the internal quantum efficiency of the device is reduced. The polarizing electric field creates a potential barrier that impedes the entry of carriers into the active region, and also does not facilitate the enhancement of quantum efficiency within the device.
Disclosure of Invention
In order to solve the technical problems, the application provides a light-emitting diode epitaxial wafer and a preparation method thereof, which are used for solving the technical problems that a plurality of quantum wells emit light after an active layer because electrons flow into the active layer, other quantum wells do not emit light, and the light-emitting efficiency of the quantum wells is reduced.
In one aspect, the application provides a light emitting diode epitaxial wafer, which comprises a substrate, and a first semiconductor layer, an electron injection layer and a second semiconductor layer which are sequentially deposited on the substrate;
the electron injection layer comprises a first electron expansion layer, an electron storage layer and a second electron expansion layer which are sequentially stacked, the electron storage layer comprises a plurality of InGaN layers and BSiGaN layers which are alternately stacked, the plurality of InGaN layers and the plurality of BSiGaN layers form a superlattice structure, the thickness of the first electron expansion layer, the thickness of the second electron expansion layer and the thickness of the electron storage layer are sequentially increased, the thickness of the BSiGaN layer is larger than that of the InGaN layer, the In component range In the InGaN layer is 0.01-0.2, the B component range In the BSiGaN layer is 0.01-0.5, and the Si component range In the BSiGaN layer is 0.01-0.1.
Compared with the prior art, the application has the beneficial effects that: and depositing a first electron expansion (AlGaON layer), doping Al/O element, wherein the potential barrier is higher than that of the GaN layer, slowing down the flow rate of electrons, enabling the overlap degree of the space wave function of electrons and holes in the quantum well to be higher, and improving the luminous efficiency of the quantum well. And depositing an electron storage layer (superlattice structures formed by a plurality of InGaN layers and BSiGaN layers) to form potential wells and barrier layers, so that electrons can be effectively stored in the potential well layer, polarization effects of the n-type AlGaN layers and the quantum well layers can be effectively reduced, and quantum efficiency in the quantum well layers can be improved. And depositing a second electron expansion layer (SiAlN layer) to uniformly inject electrons into the quantum well layer on a two-dimensional plane formed by the AlN layer before the active layer, wherein the electrons are distributed on the two-dimensional plane, and meanwhile, the proper Si can increase an electron injection channel, so that the electron injection efficiency is improved, and the luminous efficiency of the light-emitting diode is improved.
Further, the first electron expansion layer is an AlGaON layer, the range of an Al component in the AlGaON layer is 0.01-0.5, and the range of an O component in the AlGaON layer is 0.01-0.5.
Further, the thickness of the first electron expansion layer ranges from 10nm to 100nm, the thickness of the InGaN layer ranges from 1nm to 10nm, the thickness of the BSiGaN layer ranges from 5nm to 50nm, and the thickness of the second electron expansion layer ranges from 10nm to 100 nm.
Further, the second electron expansion layer is a SiAlN layer, and the Si component in the SiAlN layer ranges from 0.01 to 0.1.
Further, the number of the alternately laminated cycles of the electronic storage layers ranges from 1 to 50.
Further, the first semiconductor layer comprises a buffer layer, an undoped AlGaN layer and an n-type AlGaN layer, and the second semiconductor layer comprises an active layer, an electron blocking layer, a P-type AlGaN layer and a P-type contact layer, wherein the buffer layer, the undoped AlGaN layer, the n-type AlGaN layer, the electron injection layer, the active layer, the electron blocking layer, the P-type AlGaN layer and the P-type contact layer are sequentially deposited on the substrate.
On the other hand, the application also provides a preparation method of the light-emitting diode epitaxial wafer, which comprises the following steps:
providing a substrate;
depositing a buffer layer on the substrate;
depositing an undoped AlGaN layer on the buffer layer;
depositing an n-type AlGaN layer on the undoped AlGaN layer;
depositing an electron injection layer on the n-type AlGaN layer, wherein the electron injection layer comprises a first electron expansion layer, an electron storage layer and a second electron expansion layer which are sequentially stacked, the electron storage layer comprises a plurality of InGaN layers and BSiGaN layers which are alternately stacked, the plurality of InGaN layers and the BSiGaN layers which are alternately stacked form a superlattice structure, the thickness of the first electron expansion layer, the thickness of the second electron expansion layer and the thickness of the electron storage layer are sequentially increased, the thickness of the BSiGaN layer is greater than the thickness of the InGaN layer, the In component range In the InGaN layer is 0.01-0.2, the B component range In the BSiGaN layer is 0.01-0.5, and the Si component range In the BSiGaN layer is 0.01-0.1;
depositing an active layer on the electron injection layer;
depositing an electron blocking layer on the active layer
Depositing a P-type AlGaN layer on the electron blocking layer;
and depositing a P-type contact layer on the P-type AlGaN layer.
Further, the growth temperature of the electron injection layer is 800-1000 ℃.
Further, the first electron expansion layer is an AlGaON layer, and the AlGaON layer grows in atmosphere O 2 /N 2 /NH 3 The ratio of the electron storage layer to the second electron expansion layer is 1:1:1-1:10:50, and the growth atmosphere N of the electron storage layer and the second electron expansion layer is 1:1-1:10:50 2 /NH 3 The ratio of the AlGaON layer to the silicon substrate is 1:1-1:10, and the AlGaON layer growth atmosphere contains O 2 Providing an AlGaON layer with O 2 A source.
Further, the growth pressure range of the first electronic expansion layer, the electronic storage layer and the second electronic expansion layer is 50-500 torr.
Drawings
Fig. 1 is a schematic structural diagram of a light emitting diode epitaxial wafer in a first embodiment of the present application.
Fig. 2 is a flowchart of a method for manufacturing an led epitaxial wafer according to a second embodiment of the present application.
Description of main reference numerals: 100. a substrate; 200. A buffer layer; 300. an undoped AlGaN layer; 400. an n-type GaN layer; 500. an electron injection layer; 510. an AlGaON layer; 520. An InGaN layer; 530. a BSiGaN layer; 540. a SiAlN layer; 600. an active layer; 700. an electron blocking layer; 800. a P-type AlGaN layer; 900. and a P-type contact layer.
The application will be further described in the following detailed description in conjunction with the above-described figures.
Detailed Description
In order that the application may be readily understood, a more complete description of the application will be rendered by reference to the appended drawings. Several embodiments of the application are presented in the figures. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "mounted" on another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
Example 1
Referring to fig. 1, an led epitaxial wafer according to a first embodiment of the present application includes a substrate 100, and a first semiconductor layer, an electron injection layer 500, and a second semiconductor layer sequentially deposited on the substrate 100;
the electron injection layer 500 includes a first electron expansion layer, an electron storage layer, and a second electron expansion layer, which are sequentially stacked, the electron storage layer includes a plurality of InGaN layers 520 and BSiGaN layers 530 that are alternately stacked, so as to form a superlattice structure, the thickness of the first electron expansion layer ranges from 10nm to 100nm, the thickness of the InGaN layer 520 ranges from 1nm to 10nm, the thickness of the BSiGaN layer 530 ranges from 5nm to 50nm, and the thickness of the second electron expansion layer ranges from 10nm to 100 nm. The thickness of the first electron expansion layer is larger than that of the second electron expansion layer, the thickness of the second electron expansion layer is larger than that of the electron storage layer, and the thickness of the BSiGaN layer is larger than that of the InGaN layer, wherein the In component range of the InGaN layer is 0.01-0.2, the B component range of the BSiGaN layer is 0.01-0.5, and the Si component range of the BSiGaN layer is 0.01-0.1.
Optionally, the first electron extension layer has a thickness ranging from 10 a nm a 30 a nm a 50 a nm a 65 a nm a 100 a nm a. The InGaN layer 520 has a thickness of 1nm, 3nm, 6nm, or 10 nm. The BSiGaN layer 530 has a thickness of 5 a nm a, 15 a nm a, 25 a nm a, 30 a nm a, 45 a nm a, or 50 a nm a. The second electron extension layer has a thickness in the range of 10nm, 20 nm, 35nm, 45nm, 65nm, 75 nm, 80nm, or 100 nm. In this embodiment, the first electron expansion layer (AlGaON layer 510) has a thickness of 65 a nm a, the InGaN layer 520 has a thickness of 3 a nm a, the BSiGaN layer 530 has a thickness of 25nm, and the second electron expansion layer (SiAlN layer 540) has a thickness of 45 a nm a. It should be noted that, the proper thickness of the AlGaON layer 510 can not only slow down the flow rate of electrons, but also reduce the increase of the LED operating voltage caused by the increase of the potential barrier, and the superlattice structure thickness can not only reduce the polarization effect of the active layer 600, but also store electrons, so as to avoid the too high potential barrier height caused by the too thick BSiGaN layer 530, limit the electron flow, and the SiAlN layer 540 can promote the electrons to flow into the active layer 600 uniformly.
Further, the first electron expansion layer is an AlGaON layer 510, the Al component in the AlGaON layer 510 ranges from 0.01 to 0.5, and the O component in the AlGaON layer 510 ranges from 0.01 to 0.5. Optionally, the Al composition in the AlGaON layer 510 is 0.01, 0.1, 0.3, 0.35, or 0.5. The AlGaON layer 510 has an O composition ranging from 0.01, 0.1, 0.3, 0.35, or 0.5. In this embodiment, the Al composition in the AlGaON layer 510 is 0.3. The range in the AlGaON layer 510 is 0.1 for the O component.
Further, the In component of the InGaN layer 520 ranges from 0.01 to 0.2, the B component of the BSiGaN layer 530 ranges from 0.01 to 0.5, and the Si component of the BSiGaN layer 530 ranges from 0.01 to 0.1. Optionally, the In composition In the InGaN layer 520 is 0.01, 0.1, 0.15, or 0.2. The B component of the BSiGaN layer 530 is 0.01, 0.05, 0.1, 0.15, 0.3, or 0.5. The Si composition in the BSiGaN layer 530 is 0.01, 0.03, 0.05, 0.08, or 0.1. In this embodiment, the In composition In the InGaN layer 520 is 0.1. The B component of the BSiGaN layer 530 is 0.1. The Si composition in the BSiGaN layer 530 is 0.05.
Further, the second electron expansion layer is a sialon layer 540, and the Si component in the sialon layer 540 ranges from 0.01 to 0.1. Optionally, the Si component in the SiAlN layer 540 is 0.01, 0.03, 0.05, 0.08, or 0.1. In this embodiment, the Si composition in the SiAlN layer 540 is 0.05.
Further, the number of the alternately laminated cycles of the electronic storage layers ranges from 1 to 50. Alternatively, the number of periods of the InGaN layer 520 and the BSiGaN layer 530 alternately stacked is 1, 2, 6, 10, 22, 35, 45, or 50. In the present embodiment, the number of cycles of the InGaN layer 520 and the BSiGaN layer 530 alternately stacked is 6.
Specifically, the first semiconductor layer includes a buffer layer 200, an undoped AlGaN layer 300, and an n-type AlGaN layer, and the second semiconductor layer includes an active layer 600, an electron blocking layer 700, a P-type AlGaN layer 800, and a P-type contact layer 900, wherein the buffer layer 200, the undoped AlGaN layer 300, the n-type AlGaN layer, the electron injection layer 500, the active layer 600, the electron blocking layer 700, the P-type AlGaN layer 800, and the P-type contact layer 900 are sequentially deposited on the substrate 100.
In order to facilitate the subsequent photoelectric test and understanding, the application introduces a first experimental group, a second experimental group, a third experimental group, a fourth experimental group, a fifth experimental group, a sixth experimental group, a seventh experimental group, a eighth experimental group, a ninth experimental group and a control group;
wherein, the first experimental group, the second experimental group, the third experimental group, the fourth experimental group, the fifth experimental group, the sixth experimental group, the seventh experimental group, the eighth experimental group and the ninth experimental group all adopt the LED epitaxial wafer as described in the first embodiment, the electron injection layers 500 of the first embodiment are included, and the control group adopts the led epitaxial wafer of the prior art, which has the same structure as the first embodiment, but the following differences: the control group used the electron injection layer 500 of the prior art.
Specifically, in the first experimental group, the AlGaON layer 510 had a thickness of 65nm, the InGaN layer 520 had a thickness of 3nm, the BSiGaN layer 530 had a thickness of 25nm, the SiAlN layer had a thickness of 45nm, the number of cycles of alternately stacking the InGaN layer 520 and the BSiGaN layer 530 was 6, the Al component In the AlGaON layer 510 was 0.3, the O component In the AlGaON layer 510 was 0.1, the In component In the InGaN layer 520 was 0.1, the B component In the BSiGaN layer 530 was 0.1, the Si component In the BSiGaN layer 530 was 0.05, and the Si component In the SiAlN layer 540 was 0.05.
The AlGaON layer 510 In the second experimental group had a thickness of 80nm, the InGaN layer 520 had a thickness of 5nm, the BSiGaN layer 530 had a thickness of 25nm, the SiAlN layer had a thickness of 45nm, the number of cycles of alternately stacking the InGaN layer 520 and the BSiGaN layer 530 was 6, the Al component In the AlGaON layer 510 was 0.3, the O component In the AlGaON layer 510 was 0.1, the In component In the InGaN layer 520 was 0.1, the B component In the BSiGaN layer 530 was 0.1, the Si component In the BSiGaN layer 530 was 0.05, and the Si component In the SiAlN layer 540 was 0.05.
In the third experiment, the AlGaON layer 510 had a thickness of 50nm, the InGaN layer 520 had a thickness of 1nm, the BSiGaN layer 530 had a thickness of 25nm, the SiAlN layer had a thickness of 45nm, the number of cycles of alternately stacking the InGaN layer 520 and the BSiGaN layer 530 was 6, the Al component In the AlGaON layer 510 was 0.3, the O component In the AlGaON layer 510 was 0.1, the In component In the InGaN layer 520 was 0.1, the B component In the BSiGaN layer 530 was 0.1, the Si component In the BSiGaN layer 530 was 0.05, and the Si component In the SiAlN layer 540 was 0.05.
In the fourth experimental group, the AlGaON layer 510 had a thickness of 65nm, the InGaN layer 520 had a thickness of 3nm, the BSiGaN layer 530 had a thickness of 35nm, the SiAlN layer had a thickness of 60nm, the number of cycles of alternately stacking the InGaN layer 520 and the BSiGaN layer 530 was 6, the Al component In the AlGaON layer 510 was 0.3, the O component In the AlGaON layer 510 was 0.1, the In component In the InGaN layer 520 was 0.1, the B component In the BSiGaN layer 530 was 0.1, the Si component In the BSiGaN layer 530 was 0.05, and the Si component In the SiAlN layer 540 was 0.05.
In experiment group five, alGaON layer 510 had a thickness of 65nm, inGaN layer 520 had a thickness of 3nm, BSiGaN layer 530 had a thickness of 10nm, siAlN layer had a thickness of 30nm, the number of cycles of alternately stacked InGaN layer 520 and BSiGaN layer 530 was 6, the Al component In AlGaON layer 510 was 0.3, the O component In AlGaON layer 510 was 0.1, the In component In InGaN layer 520 was 0.1, the B component In BSiGaN layer 530 was 0.1, the Si component In BSiGaN layer 530 was 0.05, and the Si component In SiAlN layer 540 was 0.05.
The AlGaON layer 510 In the sixth experimental group had a thickness of 65nm, the InGaN layer 520 had a thickness of 3nm, the BSiGaN layer 530 had a thickness of 25nm, the SiAlN layer had a thickness of 45nm, the number of cycles of alternately stacking the InGaN layer 520 and the BSiGaN layer 530 was 10, the Al component In the AlGaON layer 510 was 0.4, the O component In the AlGaON layer 510 was 0.2, the In component In the InGaN layer 520 was 0.15, the B component In the BSiGaN layer 530 was 0.1, the Si component In the BSiGaN layer 530 was 0.05, and the Si component In the SiAlN layer 540 was 0.05.
The AlGaON layer 510 In experiment group seven had a thickness of 65nm, the InGaN layer 520 had a thickness of 3nm, the BSiGaN layer 530 had a thickness of 25nm, the SiAlN layer had a thickness of 45nm, the number of cycles of alternately stacking the InGaN layer 520 and the BSiGaN layer 530 was 6, the Al component In the AlGaON layer 510 was 0.2, the O component In the AlGaON layer 510 was 0.05, the In component In the InGaN layer 520 was 0.05, the B component In the BSiGaN layer 530 was 0.1, the Si component In the BSiGaN layer 530 was 0.05, and the Si component In the SiAlN layer 540 was 0.05.
The AlGaON layer 510 In the eighth experimental group had a thickness of 65nm, the InGaN layer 520 had a thickness of 3nm, the BSiGaN layer 530 had a thickness of 25nm, the SiAlN layer had a thickness of 45nm, the number of cycles of alternately stacking the InGaN layer 520 and the BSiGaN layer 530 was 6, the Al component In the AlGaON layer 510 was 0.3, the O component In the AlGaON layer 510 was 0.1, the In component In the InGaN layer 520 was 0.1, the B component In the BSiGaN layer 530 was 0.3, the Si component In the BSiGaN layer 530 was 0.08, and the Si component In the SiAlN layer 540 was 0.08.
The AlGaON layer 510 In the experimental group nine had a thickness of 65nm, the InGaN layer 520 had a thickness of 3nm, the BSiGaN layer 530 had a thickness of 25nm, the SiAlN layer had a thickness of 45nm, the number of cycles of alternately stacking the InGaN layer 520 and the BSiGaN layer 530 was 6, the Al component In the AlGaON layer 510 was 0.3, the O component In the AlGaON layer 510 was 0.1, the In component In the InGaN layer 520 was 0.1, the B component In the BSiGaN layer 530 was 0.05, the Si component In the BSiGaN layer 530 was 0.02, and the Si component In the SiAlN layer 540 was 0.03.
And carrying out photoelectric tests on the light-emitting diode epitaxial wafers in the first experimental group, the second experimental group, the third experimental group, the fourth experimental group, the fifth experimental group, the sixth experimental group, the seventh experimental group, the eighth experimental group, the ninth experimental group and the control group, wherein the test results are shown in table 1:
as can be seen from table 1, the light efficiency of the led epitaxial wafer provided by the control group is used as a reference, so that the light efficiency is improved by 0%, the light efficiency of the control group is improved by 2%, the light efficiency of the control group is improved by 1%, the light efficiency of the control group is improved by 1.5%, the light efficiency of the control group is improved by 1.2%, the light efficiency of the control group is improved by 1.3%, the light efficiency of the control group is improved by 1.2%, the light efficiency of the control group is improved by 0.8%, the light efficiency of the control group is improved by 1.0%, the light efficiency of the control group is improved by 0.5%, and the light efficiency of the control group is improved by nine.
Therefore, compared with the control group, the light efficiency of the LED epitaxial wafer provided by the experimental group I is improved by 2% to the maximum.
Example two
Referring to fig. 2, a method for preparing an led epitaxial wafer according to a second embodiment of the present application is shown, and includes the following steps: s01 to S09;
step S01, providing a substrate 100;
the substrate 100 may be selected from (0001) plane sapphire substrate, alN substrate, si (111) substrate, siC (0001) substrate, and the like.
Specifically, the substrate 100 is a sapphire substrate, which is the most commonly used substrate material at present, and has the advantages of mature preparation process, low price, easy cleaning and processing, and good stability at high temperature.
Step S02, depositing a buffer layer 200 on the substrate 100,
the buffer layer 200 is an AlN buffer layer, and the thickness of the AlN buffer layer ranges from 20 nm to 200 nm.
Specifically, an AlN buffer layer is deposited in PVD with the thickness of 100 a nm a, the AlN buffer layer provides a nucleation center with the same orientation as the substrate 100, stress generated by lattice mismatch between AlGaN and the substrate 100 and thermal stress generated by thermal expansion coefficient mismatch are released, further growth provides a flat nucleation surface, the contact angle of nucleation growth is reduced, so that GaN crystal grains growing in an island shape can be connected into a plane in a smaller thickness, the growth is converted into two-dimensional epitaxial growth, the crystal quality of a subsequently deposited AlGaN layer is improved, the dislocation density is reduced, and the radiation recombination efficiency of the multi-quantum well layer is improved.
In step S03, an undoped AlGaN layer 300 is deposited on the buffer layer 200.
Optionally, an unintentionally doped AlGaN layer (undoped AlGaN layer 300) is deposited on the AlN buffer layer by adopting a metal organic vapor deposition (MOCVD) method, the Al component is 0-0.5, the growth temperature is 1000-1300 ℃, the growth pressure is 50-500 torr, and the thickness is 1 um-5 um.
In particular, unintentionally doped Al 0.25 Ga 0.75 The growth temperature of the N layer is 1200 ℃, the growth pressure is 100 torr, the growth thickness is 2 um-3 um, the growth temperature of the unintentionally doped AlGaN layer is higher, the pressure is lower, the prepared GaN crystal has better quality, meanwhile, the compressive stress can be released through stacking faults along with the increase of the AlGaN thickness, the line defects are reduced, the crystal quality is improved, the reverse leakage current is reduced, but the consumption of MO source (metal organic source) materials by improving the AlGaN layer thickness is larger, and the epitaxial cost of a light-emitting diode is greatly improved, so that the conventional light-emitting diode epitaxial wafer is usually undoped with AlGaN for growing 2 um-3 um, the production cost is saved, and the GaN material has higher crystal quality.
Step S04, depositing an n-type AlGaN layer on the undoped AlGaN layer 300.
Optionally, an n-type AlGaN layer is deposited on the undoped AlGaN layer 300, the Al component is 0-0.5, the growth temperature is 1000-1300 ℃, and the doping concentration is 1E+19 atoms/cm 3 ~5E+20 atoms/cm 3 The thickness is 1 um-5 um.
Specifically, n-type Al 0.3 Ga 0.7 The growth temperature of the N layer is 1200 ℃, the growth pressure is 100 torr, the growth thickness is 2 um-3 um, and the doping concentration of Si is 2.5E19 atoms/cm 3 Firstly, the n-type doped AlGaN layer provides sufficient electrons and holes for ultraviolet LED luminescence to be compounded, secondly, the resistivity of the n-type doped AlGaN layer is higher than that of a transparent electrode on the P-type GaN layer, so that the resistivity of the n-type GaN layer 400 can be effectively reduced due to sufficient Si doping, and finally, the stress can be effectively released and the luminous efficiency of the light-emitting diode can be improved due to sufficient thickness of the n-type doped AlGaN layer.
Step S05, depositing an electron injection layer 500 on the n-type AlGaN layer.
The electron injection layer 500 includes a first electron expansion layer (AlGaON layer 510), an electron storage layer (superlattice structure formed of a plurality of InGaN layers 520 and BSiGaN layers 530), and a second electron expansion layer (SiAlN layer 540) stacked in this order. Specifically, the first electron expansion layer is an AlGaON layer 510, the electron storage layer is formed by stacking a plurality of InGaN layers 520 and BSiGaN layers 530, and thus the superlattice structure is formed, and the second electron expansion layer is a SiAlN layer.
Optionally, the first electron expansion layer (AlGaON layer 510) has a thickness ranging from 10nm to 100nm, the electron storage layer (superlattice structure formed by InGaN layers 520 and BSiGaN layer 530) has a thickness ranging from 1nm to 10nm, BSiGaN layer 530 has a thickness ranging from 5nm to 50nm, and the second electron expansion layer (SiAlN layer 540) has a thickness ranging from 10nm to 100 nm.
Optionally, the first electron expansion layer (AlGaON layer 510) has an Al composition ranging from 0.01 to 0.5, an o composition ranging from 0.01 to 0.5, an In composition ranging from 0.01 to 0.2, a B composition ranging from 0.01 to 0.5, an Si composition ranging from 0.01 to 0.1, and an Si composition ranging from 0.01 to 0.1 In the sialn layer 540.
Optionally, the growth temperature of the first electron expansion layer, the electron storage layer and the second electron expansion layer (SiAlN layer 540) ranges from 800 ℃ to 1000 ℃.
Optionally, a first electron expansion layer (AlGaON layer 510) is grown in atmosphere O 2 /N 2 /NH 3 The ratio ranges from 1:1:1 to 1:10:50, and the growth atmosphere N of the electron storage layer (superlattice structure formed by the plurality of InGaN layers 520 and the BSiGaN layer 530) and the second electron expansion layer (SiAlN layer 540) is the same as that of the electron storage layer 2 /NH 3 The ratio range is 1:1-1:10.
Optionally, the first electron expansion layer (AlGaON layer 510), the electron storage layer (superlattice structure formed by the plurality of InGaN layers 520 and BSiGaN layer 530), and the second electron expansion layer (SiAlN layer 540) are grown at a pressure ranging from 50 torr to 500 torr.
Optionally, the number of alternating lamination cycles of the electronic storage layer ranges from 1 to 50.
Specifically, the electron injection layer 500 includes a first electron expansion layer (AlGaON layer 510), an electron storage layer (multiple InGaN's)A superlattice structure formed of layer 520 and BSiGaN layer 530), and a second electron expansion layer (SiAlN layer 540). The first electron extension layer (AlGaON layer 510) is 65 a nm a thickness, inGaN layer 520 a thickness of 3nm, BSiGaN layer 530 a thickness of 25 a nm a thickness, and SiAlN layer 540 a thickness of 45 a nm a. Al In AlGaON layer 510 is 0.3, O In InGaN layer 520 is 0.1, B In BSiGaN layer 530 is 0.1, si In SiAlN layer 540 is 0.05. The first electron expansion layer (AlGaON layer 510), the electron storage layer (superlattice structure formed by the InGaN layers 520 and BSiGaN layer 530), and the second electron expansion layer (SiAlN layer 540) were grown at 900 ℃. First electron expansion (AlGaON layer 510) growth atmosphere O 2 /N 2 /NH 3 The ratio of the electron storage layer (superlattice structure formed by the InGaN layers 520 and the BSiGaN layer 530) and the second electron expansion layer (SiAlN layer 540) is 1:3:10, and the second electron expansion layer is grown in the atmosphere N 2 /NH 3 The ratio was 2:3. The first electron expansion (AlGaON layer 510), the electron storage layer (superlattice structure formed of InGaN layers 520 and BSiGaN layer 530), and the second electron expansion layer (SiAlN layer 540) were grown at a pressure of 200 torr. The number of cycles of the electron storage layer (superlattice structure formed of the InGaN layers 520 and the BSiGaN layer 530) is 6.
The application has the beneficial effects that the first electron expansion (AlGaON layer 510) is deposited, the Al/O element is doped, the potential barrier is higher than that of the GaN layer, the flow rate of electrons is slowed down, the overlap degree of the space wave function of electrons and holes in the quantum well is higher, and the luminous efficiency of the quantum well is improved. The electron storage layer (superlattice structure formed by the InGaN layers 520 and the BSiGaN layer 530) is deposited to form a potential well and a barrier layer, so that electrons can be effectively stored in the potential well layer, polarization effects of the n-type AlGaN layer and the quantum well layer can be effectively reduced, and quantum efficiency in the quantum well layer can be improved. The second electron extension layer (SiAlN layer 540) is deposited because of the two-dimensional plane formed by the AlN layer before the active layer 600, so that electrons are uniformly injected into the quantum well layer on the two-dimensional plane, and meanwhile, the appropriate Si can increase the injection channel of electrons, improve the injection efficiency of electrons, and improve the light emitting efficiency of the light emitting diode.
Step S06, depositing an active layer 600 on the electron injection layer 500.
Alternatively, the active layer 600 is alternately stacked of Al m Ga 1-m N quantum well layer and Al n Ga 1-n N quantum barrier layers with stacking cycle number ranging from 3 to 15, wherein Al m Ga 1-m The growth temperature of the N quantum well layer is 900-1100 ℃, the thickness is 2-nm-5 nm, the growth pressure is 50-300 torr, the Al component is 0-0.2, and the Al composition is n Ga 1-n The growth temperature of the N quantum barrier layer is 1000-1300 ℃, the thickness is 5-nm-15 nm, the growth pressure is 50-300 torr, and the Al component is 0.2-1.
Specifically, the active layer 600 is alternately stacked of Al m Ga 1-m N quantum well layer and Al n Ga 1-n N quantum barrier layers with a stacking cycle of 9, wherein the quantum well contains Al m Ga 1-m The growth temperature of N is 1000 ℃, the thickness is 3.5 nm, the pressure is 200torr, the Al component is 0.15, and the Al n Ga 1-n The growth temperature of the N quantum barrier layer is 1150 ℃, the thickness is 11 nm, the growth pressure is 200torr, the Al component is 0.5, the multi-quantum well is an electron and hole composite region, and the overlapping degree of the electron and hole wave functions can be remarkably increased by reasonable structural design, so that the luminous efficiency of the LED device is improved.
In step S07, an electron blocking layer 700 is deposited on the active layer 600.
Optionally, the AlGaN electron blocking layer 700 has a thickness ranging from 10nm nm to 100nm, an Al composition ranging from 0.1 nm to 1, a growth temperature ranging from 1000 ℃ to 1100 ℃ and a pressure ranging from 100 torr to 300 torr.
Specifically, al 0.3 Ga 0.7 The thickness of the N electron blocking layer 700 is 30 and nm, wherein the Al component is 0.75, the growth temperature is 1050 ℃, and the growth pressure is 200torr, so that not only can the electron overflow be effectively limited, but also the blocking of holes can be reduced, the injection efficiency of the holes into the quantum well can be improved, the auger recombination of carriers can be reduced, and the luminous efficiency of the light emitting diode can be improved.
In step S08, a P-type AlGaN layer 800 is deposited on the electron blocking layer 700.
Optionally, the P-type AlGaN layer 800 is grownThe long temperature range is 1000-1100 ℃, the thickness range is 20-nm-200 nm, the Al component range is 0.01-0.5, the growth pressure range is 100-600 torr, and the doping concentration range of Mg is 1E+19 atoms/cm 3 ~5E+20 atoms/cm 3 。
Specifically, P-type Al 0.2 Ga 0.8 N layer growth temperature 1050 ℃, thickness 100nm, growth pressure 200torr, mg doping concentration 5E+19 atoms/cm 3 Too high a Mg doping concentration can damage the crystal quality, while a lower doping concentration can affect the hole concentration. Meanwhile, the P-type doped AlGaN layer can effectively fill up the epitaxial layer to obtain the deep ultraviolet LED epitaxial wafer with a smooth surface.
In step S09, a P-type contact layer 900 is deposited on the P-type AlGaN layer 800.
Optionally, the growth temperature of the P-type contact layer 900 is 900-1100 ℃, the thickness is 5-nm-50 nm, the Al component is 0-0.5, the growth pressure is 100-600 torr, and the doping concentration of Mg is 5E+19 atoms/cm 3 ~5E+20 atoms/cm 3 。
Specifically, P-type doped Al 0.2 Ga 0.8 N layer growth temperature 1050 ℃, thickness 10nm, growth pressure 200torr, mg doping concentration 1E+20 atoms/cm 3 The high doping concentration P-type GaN contact layer reduces contact resistance.
And preparing a sample A and a sample B into 15 mil chips by using the same chip process conditions, wherein the sample A is a chip prepared by the current mass production (high-doped Mg low-temperature P-type GaN layer), the sample B is a chip prepared by the scheme, 300 LED chips are respectively extracted from the two samples, and tested under the current of 120 mA/60 mA, so that the photoelectric efficiency is improved by 1% -2%, and other electrical properties are good.
In summary, in the light emitting diode epitaxial wafer and the preparation method in the above embodiments of the present application, the first electron expansion layer AlGaON layer 510 is deposited, doped with Al/O element, and has a barrier higher than that of the GaN layer, so as to slow down the flow rate of electrons, make the overlap of the spatial wave functions of electrons and holes in the quantum well higher, and improve the light emitting efficiency of the quantum well. And the superlattice structure of the InGaN/BSiGaN layer of the electron storage layer is deposited to form a potential well and a barrier layer, so that electrons can be effectively stored in the potential well layer, the polarization effect of the n-type AlGaN layer and the quantum well layer can be effectively reduced, and the quantum efficiency in the quantum well layer can be improved. The second electron extension layer SiAlN layer 540 is deposited because of the two-dimensional plane formed by the AlN layer in front of the active layer 600, so that electrons are uniformly injected into the quantum well layer on the two-dimensional plane, and meanwhile, the appropriate Si can increase the electron injection channel, improve the electron injection efficiency, and improve the light emitting efficiency of the light emitting diode.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing examples illustrate only a few embodiments of the application and are described in detail herein without thereby limiting the scope of the application. It should be noted that it is possible for a person skilled in the art to make several variations and modifications without departing from the inventive concept, which are all within the scope of protection of the present application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.
Claims (10)
1. The light-emitting diode epitaxial wafer is characterized by comprising a substrate, and a first semiconductor layer, an electron injection layer and a second semiconductor layer which are sequentially deposited on the substrate;
the electron injection layer comprises a first electron expansion layer, an electron storage layer and a second electron expansion layer which are sequentially stacked, the electron storage layer comprises a plurality of InGaN layers and BSiGaN layers which are alternately stacked, the plurality of InGaN layers and the plurality of BSiGaN layers which are alternately stacked form a superlattice structure, the thickness of the first electron expansion layer is larger than that of the second electron expansion layer, the thickness of the second electron expansion layer is larger than that of the electron storage layer, the thickness of the BSiGaN layer is larger than that of the InGaN layer, the In component range In the InGaN layer is 0.01-0.2, the B component range In the BSiGaN layer is 0.01-0.5, and the Si component range In the BSiGaN layer is 0.01-0.1.
2. The light-emitting diode epitaxial wafer according to claim 1, wherein the first electron expansion layer is an AlGaON layer, the Al composition in the AlGaON layer ranges from 0.01 to 0.5, and the O composition in the AlGaON layer ranges from 0.01 to 0.5.
3. The light emitting diode epitaxial wafer of claim 1, wherein the first electron expansion layer has a thickness in the range of 10 nm-100 nm, the InGaN layer has a thickness in the range of 1 nm-10 nm, the BSiGaN layer has a thickness in the range of 5 nm-50 nm, and the second electron expansion layer has a thickness in the range of 10 nm-100 nm.
4. The light-emitting diode epitaxial wafer of claim 1, wherein the second electron expansion layer is a sialon layer, and the Si composition in the sialon layer ranges from 0.01 to 0.1.
5. The light-emitting diode epitaxial wafer of claim 1, wherein the number of alternating stacked cycles of the electronic storage layers ranges from 1 to 50.
6. The light emitting diode epitaxial wafer of claim 1, wherein the first semiconductor layer comprises a buffer layer, an undoped AlGaN layer, an n-type AlGaN layer, and the second semiconductor layer comprises an active layer, an electron blocking layer, a P-type AlGaN layer, and a P-type contact layer, wherein the buffer layer, the undoped AlGaN layer, the n-type AlGaN layer, the electron injection layer, the active layer, the electron blocking layer, the P-type AlGaN layer, and the P-type contact layer are sequentially deposited on the substrate.
7. A method for preparing the light-emitting diode epitaxial wafer according to any one of claims 1 to 6, comprising the steps of:
providing a substrate;
depositing a buffer layer on the substrate;
depositing an undoped AlGaN layer on the buffer layer;
depositing an n-type AlGaN layer on the undoped AlGaN layer;
depositing an electron injection layer on the n-type AlGaN layer, wherein the electron injection layer comprises a first electron expansion layer, an electron storage layer and a second electron expansion layer which are sequentially stacked, the electron storage layer comprises a plurality of InGaN layers and BSiGaN layers which are alternately stacked, the plurality of InGaN layers and the BSiGaN layers which are alternately stacked form a superlattice structure, the thickness of the first electron expansion layer, the thickness of the second electron expansion layer and the thickness of the electron storage layer are sequentially increased, the thickness of the BSiGaN layer is greater than the thickness of the InGaN layer, the In component range In the InGaN layer is 0.01-0.2, the B component range In the BSiGaN layer is 0.01-0.5, and the Si component range In the BSiGaN layer is 0.01-0.1;
depositing an active layer on the electron injection layer;
depositing an electron blocking layer on the active layer;
depositing a P-type AlGaN layer on the electron blocking layer;
and depositing a P-type contact layer on the P-type AlGaN layer.
8. The method for manufacturing a light-emitting diode epitaxial wafer according to claim 7, wherein the growth temperature of the electron injection layer is in a range of 800 ℃ to 1000 ℃.
9. The method for manufacturing a light-emitting diode epitaxial wafer according to claim 7, wherein the first electron expansion layer is an AlGaON layer, and the AlGaON layer is grown in an atmosphere O 2 /N 2 /NH 3 The ratio of the electron storage layer to the second electron extension is in the range of 1:1:1 to 1:10:50Layer growth atmosphere N 2 /NH 3 The ratio of the AlGaON layer to the silicon substrate is 1:1-1:10, and the AlGaON layer growth atmosphere contains O 2 Providing an AlGaON layer with O 2 A source.
10. The method for manufacturing a light-emitting diode epitaxial wafer according to claim 7, wherein the growth pressure of the first electron expansion layer, the electron storage layer and the second electron expansion layer ranges from 50 torr to 500 torr.
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