CN116097106A - 芯片及时钟检测方法 - Google Patents
芯片及时钟检测方法 Download PDFInfo
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
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Abstract
一种芯片及时钟检测方法,涉及计算机技术领域。在芯片上配置参考时钟产生电路、毛刺检测电路和占空比检测电路中的至少一项。以便于后续基于参考时钟产生电路对芯片上的时钟信号的频率进行检测,从而避免了在对芯片上的时钟信号检测时需要额外通过模拟电路引出一个标准参考时钟,因此节省了芯片资源。此外,通过该芯片,还可以实现对同一芯片上的时钟信号包含的毛刺以及时钟信号的占空比的检测,提高了检测时钟信号的灵活性。
Description
PCT国内申请,说明书已公开。
Claims (25)
- PCT国内申请,权利要求书已公开。
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PCT/CN2020/132967 WO2022110235A1 (zh) | 2020-11-30 | 2020-11-30 | 芯片及时钟检测方法 |
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CN116097106A true CN116097106A (zh) | 2023-05-09 |
CN116097106A8 CN116097106A8 (zh) | 2024-05-28 |
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CN115334264B (zh) * | 2022-08-17 | 2024-04-09 | 中国电子科技集团公司第四十四研究所 | Cmos图像传感器片上时钟产生电路、模块及方法 |
Citations (9)
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JPH01241213A (ja) * | 1988-03-23 | 1989-09-26 | Kouenerugii Butsurigaku Kenkyu Shocho | 高精度多段遅延回路 |
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CN103728516A (zh) * | 2014-01-09 | 2014-04-16 | 福州瑞芯微电子有限公司 | Soc芯片时钟检测电路 |
CN104753524A (zh) * | 2013-12-25 | 2015-07-01 | 中国科学院电子学研究所 | 一种延时锁定环路 |
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CN106067814A (zh) * | 2016-06-02 | 2016-11-02 | 中国科学技术大学先进技术研究院 | 一种低噪声高精度的宽带多相时钟产生器 |
CN109818613A (zh) * | 2019-01-28 | 2019-05-28 | 浙江大学 | 基于数控延时占空比校准的参考时钟倍频器电路及算法 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6794912B2 (en) * | 2002-02-18 | 2004-09-21 | Matsushita Electric Industrial Co., Ltd. | Multi-phase clock transmission circuit and method |
CN102223143A (zh) * | 2010-04-16 | 2011-10-19 | 电信科学技术研究院 | 时钟信号保护的装置、方法及时钟检测补偿电路 |
CN104133409B (zh) * | 2014-08-07 | 2016-08-17 | 电子科技大学 | 一种对称性可调的三角波合成装置 |
CN105629772B (zh) * | 2014-10-30 | 2019-05-07 | 深圳开阳电子股份有限公司 | 一种延时控制装置 |
CN107797442B (zh) * | 2017-11-08 | 2023-06-23 | 广州安凯微电子股份有限公司 | 时间数字转换装置及数字锁相环 |
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2020
- 2020-11-30 CN CN202080104997.9A patent/CN116097106A/zh active Pending
- 2020-11-30 WO PCT/CN2020/132967 patent/WO2022110235A1/zh active Application Filing
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01241213A (ja) * | 1988-03-23 | 1989-09-26 | Kouenerugii Butsurigaku Kenkyu Shocho | 高精度多段遅延回路 |
US6441659B1 (en) * | 1999-04-30 | 2002-08-27 | Mosaid Technologies Incorporated | Frequency-doubling delay locked loop |
US20050127965A1 (en) * | 2003-12-12 | 2005-06-16 | Micron Technology, Inc. | Generating multi-phase clock signals using hierarchical delays |
CN103257569A (zh) * | 2013-05-23 | 2013-08-21 | 龙芯中科技术有限公司 | 时间测量电路、方法和系统 |
CN104753524A (zh) * | 2013-12-25 | 2015-07-01 | 中国科学院电子学研究所 | 一种延时锁定环路 |
CN103728516A (zh) * | 2014-01-09 | 2014-04-16 | 福州瑞芯微电子有限公司 | Soc芯片时钟检测电路 |
CN105958971A (zh) * | 2016-06-02 | 2016-09-21 | 泰凌微电子(上海)有限公司 | 一种时钟占空比校准电路 |
CN106067814A (zh) * | 2016-06-02 | 2016-11-02 | 中国科学技术大学先进技术研究院 | 一种低噪声高精度的宽带多相时钟产生器 |
CN109818613A (zh) * | 2019-01-28 | 2019-05-28 | 浙江大学 | 基于数控延时占空比校准的参考时钟倍频器电路及算法 |
Non-Patent Citations (1)
Title |
---|
温伟峰,等: "晃动补偿精密时序控制电路设计", 《核电子学与探测技术》, vol. 35, no. 7, 31 July 2015 (2015-07-31) * |
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WO2022110235A1 (zh) | 2022-06-02 |
CN116097106A8 (zh) | 2024-05-28 |
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Correction item: PCT international application to national stage day Correct: 2023.03.10 False: 2023.03.09 Number: 19-01 Page: The title page Volume: 39 Correction item: PCT international application to national stage day Correct: 2023.03.10 False: 2023.03.09 Number: 19-01 Volume: 39 |
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