CN115939298A - Light-emitting diode and light-emitting device - Google Patents

Light-emitting diode and light-emitting device Download PDF

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Publication number
CN115939298A
CN115939298A CN202211206040.2A CN202211206040A CN115939298A CN 115939298 A CN115939298 A CN 115939298A CN 202211206040 A CN202211206040 A CN 202211206040A CN 115939298 A CN115939298 A CN 115939298A
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China
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layer
pad
semiconductor
semiconductor layer
insulating
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朱秀山
李燕
陈吉
荆琪
卢志龙
蔡吉明
凃如钦
张中英
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Xiamen Sanan Optoelectronics Technology Co Ltd
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Xiamen Sanan Optoelectronics Technology Co Ltd
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Abstract

The application provides a light emitting diode and a light emitting device, which comprises a semiconductor lamination layer, a through hole and a first insulating layer which are arranged on the semiconductor lamination layer, and a first bonding pad and a second bonding pad which are arranged on the first insulating layer, wherein the semiconductor lamination layer comprises a first semiconductor layer, a light emitting layer and a second semiconductor layer, and the first insulating layer comprises a first opening part and a second opening part. The first bonding pad is communicated with the bottom of the through hole through the first opening part and is electrically contacted with the first semiconductor layer, the second bonding pad is electrically connected with the second semiconductor layer through the second opening part, the position of the through hole is not required to be avoided, the area proportion of the first bonding pad and the second bonding pad on the light-emitting diode is increased, the contact area between the first bonding pad and the second bonding pad and a packaging substrate in the subsequent packaging process is improved, and the heat dissipation capacity of the light-emitting diode is improved.

Description

Light-emitting diode and light-emitting device
Technical Field
The present disclosure relates to semiconductor manufacturing technologies, and particularly to a light emitting diode and a light emitting device.
Background
Light Emitting Diodes (LEDs) have the advantages of low cost, high Light efficiency, energy saving, environmental protection, and the like, and are widely used in the fields of vehicles, backlights, plant lighting, and high-power lighting lamps. Because of the requirements of large driving current, high heat dissipation requirement, low chip internal resistance requirement, high reflectivity in yellow/red light wave band, and the like, the metal Ag with the highest reflectivity is generally used as the main material of the metal reflecting layer.
The traditional LED chip is designed to be flat and non-flat, and due to the fact that a surface bonding pad is in large-area contact with an insulating layer, in the subsequent packaging reflow soldering process, the surface bonding pad and the insulating layer are prone to being broken or separated due to warping of a packaging substrate, and then metal layers with different polarities are connected with each other, and local short circuit is prone to occurring. The technical scheme in the prior art is that an LED chip is designed to be flat, namely a P electrode and an N electrode are designed to be divided, a through hole extending from a P type layer to an N type layer is formed in the local position of an extension structure, surface bonding pads of the P electrode and the N electrode are arranged on the same horizontal plane, and therefore the phenomenon that an insulating layer is broken to cause electric leakage or abnormal dead lamp due to warping of a substrate is avoided. However, in order to meet the design requirement of planarization and ensure the smoothness of the surface bonding pad, the surface bonding pad can be kept away from the through hole, so that the area of the surface bonding pad is compressed, the heat dissipation capability and the large-current driving resistance of the LED chip are directly affected, and the requirement of low-voltage application of the LED chip cannot be met.
Therefore, how to provide a light emitting diode, which can further improve the photoelectric performance and the heat dissipation capability of the LED chip, and meet the application requirement of lower voltage, is a problem to be solved in the art.
Disclosure of Invention
The present application provides a light emitting diode and a light emitting device, which can further improve the photoelectric performance and heat dissipation capability of the light emitting diode, and meet the requirement of lower voltage application.
In a first aspect, the present application provides a light emitting diode comprising:
a semiconductor laminate including a first semiconductor layer, a light emitting layer, and a second semiconductor layer laminated in this order;
the through hole penetrates through the second semiconductor layer and the light-emitting layer and exposes part of the surface of the first semiconductor layer; (ii) a
A first insulating layer provided on the semiconductor stack layer, including a first insulating portion and a second insulating portion; the first insulating part surrounds the second insulating part and is spaced by an annular second opening part; the first insulating portion further includes a first opening portion;
a first pad and a second pad, the first pad being located on the first insulating portion and contacting the first semiconductor layer through the first opening portion; the second pad is located on the second insulating portion and extends into the second opening portion to be electrically connected with the second semiconductor layer, and the second pad does not overlap with a vertical projection of the first insulating portion on the semiconductor lamination layer.
In a possible real-time scheme, the light emitting diode further comprises a metal layer, the metal layer comprises a reflecting layer and a blocking layer, the reflecting layer is arranged on the second semiconductor layer, the blocking layer covers the reflecting layer, the first insulating layer covers the blocking layer, part of the blocking layer is exposed at the second opening portion, and the second bonding pad is electrically connected with the blocking layer through the second opening portion.
In a possible real-time scheme, the light emitting diode further includes a second insulating layer, the second insulating layer covers the edge and a part of the surface of the semiconductor laminated layer, is located between the second semiconductor layer and the reflective layer, and has a plurality of discontinuous third openings, and the reflective layer is electrically connected to the second semiconductor layer through the third openings.
In a possible real-time solution, the light emitting diode further includes a second insulating layer, the second insulating layer is formed only on the upper surface of the semiconductor stacked layer, is located between the second semiconductor layer and the reflective layer, and has a plurality of discontinuous third openings, and the reflective layer is electrically connected to the second semiconductor layer through the third openings.
In a possible real-time solution, the light emitting diode further comprises a transparent conductive layer located between the second semiconductor layer and the second insulating layer.
In a possible real-time solution, the vertical projected area of the transparent conductive layer is larger than the vertical projected area of the reflective layer.
In a possible real-time scheme, the transparent conducting layer, the reflecting layer and the barrier layer are all positioned in the vertical projection plane of the second semiconductor layer.
In a possible real-time solution, the light emitting diode includes two first bonding pads, and the second bonding pad is located between the two first bonding pads which are symmetrically distributed.
In a possible real-time solution, the second insulating part is located at the center of the light emitting diode, and the second pad covers the second insulating part.
In one possible real-time scenario, the minimum pitch of the second openings ranges between 15 μm and 25 μm.
In one possible real-time solution, the minimum distance between the first pad and the second pad is in the range of 30 μm to 100 μm.
In one possible real-time solution, the second opening portion has an outer edge near the first insulating portion and an inner edge near the second insulating portion, the first pad has a minimum distance ranging between 5 μm and 15 μm from the outer edge, and the second pad has a minimum distance ranging between 5 μm and 15 μm from the inner edge.
In a possible real-time scheme, the ratio of the total area of the vertical projections of the first bonding pad and the second bonding pad to the area of the vertical projection of the light-emitting diode is more than 70%.
In one possible real-time scenario, the reflective layer comprises a silver metal reflective layer.
In a second aspect, the present application also provides a light emitting diode, comprising:
a semiconductor laminate including a first semiconductor layer, a light emitting layer, and a second semiconductor layer laminated in this order;
the through hole penetrates through the second semiconductor layer and the light-emitting layer and exposes a part of the surface of the first semiconductor layer; the semiconductor lamination layer can comprise a first region, a second region and a third region, the through holes are distributed in the first region and the third region, and the second region is located between the first region and the third region;
a first bonding pad in electrical contact with the first semiconductor layer and a second bonding pad in electrical contact with the second semiconductor layer;
wherein the first pad overlaps a vertical projection of the first and third regions on the stack of semiconductor layers, and the second pad overlaps a projection of the second region on the stack of semiconductor layers.
In a possible real-time solution, the light emitting diode includes two first bonding pads, and the second bonding pad is located between the two first bonding pads which are symmetrically distributed.
In a possible real-time scheme, the number of the through holes is multiple, and the through holes are distributed in the first area and the third area in a crossed interval mode with a preset distance.
In a possible real-time scheme, the through hole is formed in the light emitting diodeThe number range of the upper part is not less than 20/mm 2
In a third aspect, the present application further provides a light emitting diode, including:
a semiconductor laminate including a first semiconductor layer, a light emitting layer, and a second semiconductor layer laminated in this order;
the through hole penetrates through the second semiconductor layer and the light-emitting layer and exposes a part of the surface of the first semiconductor layer;
a metal layer over the second semiconductor layer, the metal layer comprising silver;
a first insulating layer which is located above the semiconductor lamination layer and covers the metal layer, wherein the first insulating layer is provided with a first opening part to expose part of the surface of the first semiconductor layer and a second opening part to expose part of the surface of the metal layer;
the semiconductor device comprises a first bonding pad and a second bonding pad, wherein the first bonding pad is in direct contact with the first semiconductor layer through the first opening, the second bonding pad is in direct contact with the metal layer through the second opening, and in the vertical projection direction on the semiconductor lamination, the projection areas of the metal layer are respectively larger than the projection areas of the first bonding pad and the second bonding pad.
In a possible real-time scheme, the metal layer includes a reflective layer and a barrier layer, the reflective layer is disposed on the second semiconductor layer, the barrier layer covers the reflective layer, the first insulating layer covers the barrier layer, and exposes a portion of the barrier layer at the second opening portion, and the second pad is electrically connected to the barrier layer through the second opening portion.
In a possible real-time scheme, the light emitting diode further includes a second insulating layer, the second insulating layer covers the edge and a part of the surface of the semiconductor laminated layer, is located between the second semiconductor layer and the reflective layer, and has a plurality of discontinuous third openings, and the reflective layer is electrically connected to the second semiconductor layer through the third openings.
In one possible real-time solution, the light emitting diode further comprises a transparent conductive layer located between the second semiconductor layer and the second insulating layer.
In a fourth aspect, the present application provides a light emitting diode, including:
a semiconductor laminate including a first semiconductor layer, a light emitting layer, and a second semiconductor layer laminated in this order;
a first insulating layer over the semiconductor stack, the first insulating layer having a first opening portion and a second opening portion;
a first pad in contact with the first semiconductor layer through the first opening portion, and a second pad electrically connected to the second semiconductor layer through the second opening portion;
the ratio of the total vertical projection area of the first bonding pad and the second bonding pad to the vertical projection area of the light-emitting diode is larger than 70%, and the area of the first bonding pad is larger than or equal to 2 times of the area of the second bonding pad.
In one possible real-time solution, the minimum distance between the first pad and the second pad is in the range of 30 μm to 100 μm.
In one possible real-time scenario, the minimum pitch of the second openings ranges between 15 μm and 25 μm.
In a fifth aspect, the present application further provides a light emitting device, comprising:
a plurality of light emitting diodes including a first pad and a second pad;
the packaging substrate comprises a plurality of first electrode pads and second electrode pads, wherein the number of the first electrode pads is 2 times that of the second electrode pads; the first electrode pad is bonded with the first bonding pad, and the second electrode pad is bonded with the second bonding pad;
wherein, the light-emitting diode adopts the light-emitting diode comprising any one of the above.
In one possible real-time solution, the minimum distance between the first electrode pad and the second electrode pad ranges from 30 μm to 100 μm.
Compared with the prior art, the beneficial effects of this application are as follows at least:
the application provides a light emitting diode and a light emitting device, which comprise a semiconductor lamination layer, a through hole and a first insulating layer which are arranged on the semiconductor lamination layer, and a first bonding pad and a second bonding pad which are arranged on the first insulating layer. The semiconductor lamination comprises a first semiconductor layer, a light emitting layer and a second semiconductor layer, the first insulating layer comprises a first opening part and a second opening part, the first bonding pad is communicated with the bottom of the through hole through the first opening part and is in electric contact with the first semiconductor layer, the second bonding pad is electrically connected with the second semiconductor layer through the second opening part and does not need to avoid the position of the through hole, the area proportion of the first bonding pad and the second bonding pad on the light emitting diode is increased, the contact area between the first bonding pad and the second bonding pad and a packaging substrate in the subsequent packaging process is improved, and the heat dissipation capacity of the light emitting diode is improved.
The application provides a light emitting diode and light emitting device, separates first insulating layer for first insulating part and second insulating part through second opening, and the second insulating part is located light emitting diode's center, and second pad cladding second insulating part makes the second pad not only can play the effect of current injection, can also play the effect of preventing the thimble.
The application provides a light emitting diode and light emitting device, through setting up a plurality of evenly distributed's through-hole, can further improve the scalability of electric current and the homogeneity of current distribution, also increased the area of contact of first pad with first semiconductor layer simultaneously, and then can play the effect that reduces voltage, improvement light emitting diode's luminous efficacy.
Drawings
To more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.
Fig. 1 is a schematic top view of a light emitting diode according to an embodiment of the present disclosure.
Fig. 2 is a schematic cross-sectional view of a light emitting diode according to an embodiment of the present disclosure.
Fig. 3 to 17 are schematic structural diagrams illustrating a manufacturing process of a light emitting diode according to an embodiment of the present application.
Fig. 18 is a schematic cross-sectional view of a light emitting diode according to the prior art.
Illustration of the drawings:
100 a semiconductor substrate; 110a semiconductor stack; 110a through hole; 111 a first semiconductor layer; 112 a light emitting layer; 113 a second semiconductor layer; 120 a first insulating layer; 121 a first insulating portion; 122 a second insulating portion; 1201 outer edge; 1202 inner edge; 131 a first pad; 132 a second pad; 140 a reflective layer; 150 a barrier layer; 160 a second insulating layer; 170 a transparent conductive layer; 210 a first region; 220 a second region; 230 a third region; OP1 a first opening; an OP2 second opening; OP3 a third opening.
Detailed Description
The following embodiments are provided to illustrate the present disclosure by way of specific examples, and other advantages and effects of the present disclosure will be apparent to those skilled in the art from the disclosure herein. The present application is capable of other and different embodiments and its several details are capable of modifications and variations in various respects, all without departing from the spirit of the present application.
In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the term "connected" is to be interpreted broadly, e.g. as a fixed connection, a detachable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate. Furthermore, the terms "first" and "second," etc. are used merely to distinguish one description from another, and are not to be construed as indicating or implying relative importance.
According to one aspect of the present application, a light emitting diode is provided. Referring to fig. 1 and fig. 2, fig. 1 isbase:Sub>A schematic top view ofbase:Sub>A light emitting diode according to an embodiment of the present disclosure, and fig. 2 isbase:Sub>A schematic cross-sectional view taken alongbase:Sub>A linebase:Sub>A-base:Sub>A of fig. 1.
Referring to fig. 2, a light emitting diode provided in an embodiment of the present application includes: the semiconductor device includes a semiconductor substrate 100, a semiconductor stack 110 disposed on the semiconductor substrate 100, a via 110a and a first insulating layer 120 disposed on the semiconductor stack 110, and a first pad 131 and a second pad 132 disposed on the first insulating layer 120.
The semiconductor stack 110 includes a first semiconductor layer 111, a light emitting layer 112 and a second semiconductor layer 113 stacked in sequence from bottom to top, and the via hole 110a is a hole structure extending downward from the surface of the second semiconductor layer 113 and penetrating the light emitting layer 112 to expose a part of the surface of the first semiconductor layer 111.
And a first insulating layer 120 disposed on the upper surface of the semiconductor stack 110, the edge step of the semiconductor stack 110, and a portion of the surface of the semiconductor substrate 100 adjacent to the semiconductor stack 110. The first insulating layer 120 includes a first insulating portion 121 and a second insulating portion 122, the first insulating portion 121 surrounds the second insulating portion 122 and is spaced apart by an annular second opening OP 2; the first insulating portion 121 further includes a first opening OP1 disposed at a central position of the through hole 110a and exposes a partial surface of the first semiconductor layer 111.
A first pad 131 and a second pad 132, the first pad 131 being positioned on the first insulating portion 121 and contacting the first semiconductor layer 111 through the first opening OP 1; the second pad 132 is located on the second insulating portion 122 and extends into the second opening OP2 to be electrically connected to the second semiconductor layer 113, and the vertical projection of the second pad 132 and the first insulating portion 121 on the semiconductor stack 110 does not overlap, so as to prevent the second pad 132 and the first pad 131 from being shorted, and meanwhile, the second pad 132 and the first pad 131 keep a predetermined gap and also reserve a space for subsequent packaging.
In one embodiment, the semiconductor substrate 100 is used as a growth base of the semiconductor stacked layer 110, and may be made of a conductive material or an insulating material or a light-transmitting material having excellent thermal conductivity, such as any one of a sapphire substrate, a silicon carbide substrate, a gallium nitride substrate, a zinc oxide substrate, a silicon substrate, a gallium arsenide substrate or a gallium phosphide substrate, wherein the sapphire substrate is a preferred substrate material for growing the semiconductor stacked layer 110.
Preferably, the semiconductor substrate 100 may be removed by a separation process in a subsequent process, so as to remove the semiconductor substrate 100. For example, the semiconductor substrate 100 is removed by a laser lift off method (LLO), a chemical lift off method (CLO), or the like.
Referring to fig. 3 and 4, in one embodiment, semiconductor stack 110 may be formed on semiconductor substrate 100 using a method including Metal Organic Chemical Vapor Deposition (MOCVD), hydride Vapor Phase Epitaxy (HVPE), molecular Beam Epitaxy (MBE), or the like. Here, the first semiconductor layer 111, the light emitting layer 112, and the second semiconductor layer 113 include a group iii gallium nitride series compound semiconductor, for example, gaN, alN, inGaN, alGaN, inAlGaN, and at least one of these groups. The first semiconductor layer 111 is connected to the semiconductor substrate 100, and may be a semiconductor layer doped with N-type dopants, for example, dopants for supplying electrons, such as Si, ge, se, te, and C. The second semiconductor layer 113 may Be a semiconductor layer doped with a P-type dopant, for example, mg, zn, be, ca, sr, ba, or the like for providing holes. The light emitting layer 112 is located between the first semiconductor layer 111 and the second semiconductor layer 113, is a layer that combines electrons provided by the first semiconductor layer 111 and holes provided by the second semiconductor layer 113 and outputs light of a constant wavelength, and may be composed of a well layer and a barrier layer that are alternately stacked, or a semiconductor thin film of a multi-layer quantum well structure.
When no voltage is applied to the light emitting diode, a PN junction having a high potential barrier is formed between the first semiconductor layer 111 and the second semiconductor layer 113, which can prevent electrons in the first semiconductor layer 111 of the first semiconductor layer 111 from diffusing into the second semiconductor layer 113, and can also prevent holes in the second semiconductor layer 113 from diffusing into the first semiconductor layer 111. When a forward bias voltage, i.e., an operating voltage, is applied to the light emitting diode, the PN junction barrier formed by the first semiconductor layer 111 and the second semiconductor layer 113 decreases, electrons in the first semiconductor layer 111 and holes in the second semiconductor layer 113 migrate and diffuse towards each other, the electrons and holes recombine in the light emitting layer 112, and energy is released in the form of light energy, i.e., light emission of the light emitting diode is achieved.
In one embodiment, the number of the through holes 110a includes a plurality of through holes, and the through holes have shapes including but not limited to a polygon such as a circle, a rectangle, or a hexagon, and may be distributed in a uniform or non-uniform pitch distribution. In the embodiment of the present invention, the through holes 110a are circular and are distributed on the light emitting diode at a constant interval, and after the through holes are energized, an externally injected current is electrically connected to the first semiconductor layer 111 through the first pad 131 in the through holes 110a, and the plurality of uniformly distributed through holes 110a can improve the current spreading capability and the uniformity of current distribution, and simultaneously increase the contact area between the first pad 131 and the first semiconductor layer 111, thereby achieving the effects of reducing voltage and improving the light emitting efficiency of the light emitting diode.
Preferably, the number of the through holes 110a in the LED is not less than 20/mm 2 . The voltage can be reduced by providing a plurality of uniformly distributed through holes 110 to increase the contact area of the first pad 131 with the first semiconductor layer 111.
In another embodiment, the stack of semiconductor layers 110 may include a first region 210, a second region 220 and a third region 230, the second region 220 is located between the first region 210 and the third region 230, and the through holes 110a are distributed in the first region 210 and the third region 230 at a constant pitch and with a cross spacing. The first bonding pad 131 is overlapped with the vertical projections of the first region 210 and the third region 230 on the semiconductor lamination 110, and the second bonding pad 132 is overlapped with the projection of the second region 220 on the semiconductor lamination 110, so that the area ratio of the first bonding pad 131 to the second bonding pad 132 on the light emitting diode can be further increased, the heat dissipation capacity of the light emitting diode is enhanced, and meanwhile, the current spreading capacity of the light emitting diode is further enhanced.
Referring to fig. 5 and 6, in one embodiment, the light emitting diode further includes a transparent conductive layer 170. The transparent conductive layer 170 is formed on the second semiconductor layer 113 by a physical vapor deposition or chemical vapor deposition method, and forms an ohmic contact with the second semiconductor layer 113, for dispersedly transferring an externally injected current to a surface of the second semiconductor layer 113 in contact therewith in a horizontal direction. The transparent conductive layer 170 has excellent light transmittance, and light emitted from the light emitting layer 112 does not substantially cause energy loss when passing through the transparent conductive layer 170, and includes indium tin oxide, zinc tin oxide, gallium indium tin oxide, indium gallium oxide, fluorine-doped tin oxide, aluminum-doped zinc oxide, and so on.
Preferably, the transparent conductive layer 170 is located in a vertical projection range on the second semiconductor layer 113, and a vertical projection area range relative to the second semiconductor layer 113 is between 80% and 95%, and almost covers the entire second semiconductor layer 113. The contact area between the transparent conductive layer 170 and the second semiconductor layer 113 is increased, so that the externally injected current can be more uniformly transmitted to the entire second semiconductor layer 113 of the light emitting diode, and the voltage can be further reduced. The transparent conductive layer 170 is located in the vertical projection range on the second semiconductor layer 113, so that the coverage of the transparent conductive layer 170 does not extend to the inside of the through hole 110a and the edge step of the semiconductor stack 110, thereby avoiding the short circuit risk caused by the direct contact between the first semiconductor layer 111 and the second semiconductor layer 113. The through hole 110a avoids the middle region of the led and also reserves a space for forming the subsequent second pad 132.
Preferably, the reserved space of the second pad 132 ranges from 100 μm to 300 μm. The area of the second bonding pad 132 is further enlarged while the space requirements of the first bonding pad 131 and the second bonding pad 132 in the subsequent packaging and die bonding process are met, so that the heat dissipation capability of the light emitting diode is enhanced.
Referring to fig. 7 and 8, in one embodiment, the light emitting diode further includes a second insulating layer 160. The second insulating layer 160 may be a current blocking layer, which is formed on the semiconductor stack 110, and includes a first portion completely covering the transparent conductive layer 170, and a second portion extending to cover the edge step of the semiconductor stack 110 and within the via hole 110a, the first portion and the second portion being continuous with each other, and the first insulating layer 120 being in direct contact with the second portion within the edge step of the semiconductor stack 110 and within the via hole 110a, and being located on the second portion. In a vertical projection range of the transparent conductive layer 170, the first portion may be provided with a plurality of discontinuous third openings OP3 to expose a partial surface of the transparent conductive layer 170. The third openings OP3 may have a circular or polygonal shape, or may be distributed in parallel or alternately in a crossing manner.
In another embodiment, referring to fig. 9, the second insulating layer 160 covers only the transparent conductive layer 170 and covers the side edge, i.e., the first portion, of the transparent conductive layer 170, and the first insulating layer 120 formed subsequently is in direct contact with the edge step of the semiconductor stacked layer 110 and the second semiconductor layer 113 at the bottom of the via hole 110 a.
Preferably, the third opening OP3 may be formed by patterning the first portion of the second insulating layer 160 by photolithography and etching, and the second insulating layer 160 may include a multi-film structure, for example, dielectric layers having different refractive indexes are alternately stacked by a physical vapor deposition method or a chemical vapor deposition method to form an omnidirectional reflector (ODR) to improve light extraction efficiency. The second insulating layer 160 material may include at least one of SiO2, siN, siOxNy, tiO2, si3N4, al2O3, tiN, alN, zrO2, tiAlN, tiSiN, hfO, taO2, and MgF 2.
Note that ODR is only one preferable structure of the second insulating layer 160, and is not limited thereto, and any insulating layer structure that can improve light extraction efficiency of the light emitting diode can be applied to this embodiment.
Referring to fig. 10 to 13, in one embodiment, the light emitting diode further includes a metal layer composed of a reflective layer 140 and a barrier layer 150. The reflective layer 140 is disposed on the second insulating layer 160, and functions to reflect light, thereby further improving light extraction efficiency of the light emitting diode. The blocking layer 150 is disposed on the reflective layer 140 and covers the edge of the reflective layer 140 to prevent the surface of the reflective layer 140 from being oxidized to degrade the reflectivity of the reflective layer 140, and to block the migration of ions of the reflective layer 140. The edge of the reflective layer 140 may be disposed outside, inside, or coincident with the edge of the transparent conductive layer 170, and forms an ohmic contact with the transparent conductive layer 170 through the third opening OP3, thereby diffusing current to the second semiconductor layer 113 through the transparent conductive layer 170.
Preferably, the reflective layer 140 is located within a vertical projection range of the transparent conductive layer 170, that is, an edge of the reflective layer 140 is located inside the transparent conductive layer 170, so as to further increase a contact area between the transparent conductive layer 170 and the second semiconductor layer 113, thereby reducing a voltage. The barrier layer 150 covers the edge of the reflective layer 140 and is also located within the vertical projection range of the transparent conductive layer 170, that is, the transparent conductive layer 170, the reflective layer 140 and the barrier layer 150 are all located in the vertical projection plane of the second semiconductor layer 113. The reflective layer 140 and the barrier layer 150 are made of metal materials, the reflective layer 140 may include one or a combination of metals such as silver, aluminum, titanium, tungsten, nickel, etc., and has a characteristic of reflecting light, and the light reflectivity of the reflective layer 140 is as high as 90% or more. Preferably, the reflective layer 140 is formed of metallic silver. The barrier layer 150 material comprises one or more of chromium, titanium, nickel, gold, aluminum, platinum and other metals, and has the characteristic of blocking the migration and diffusion of ions.
Specifically, when silver metal is used as the material of the reflective layer 140 and electricity is applied, the silver metal reflective layer 140 may undergo ion migration due to the influence of heat or electricity, and the silver ions migrating in a disordered or ordered state may diffuse into the semiconductor stack 110 to cause local leakage, thereby causing failure of the light emitting diode. Meanwhile, the silver metal reflective layer 140 is also easily corroded by water vapor and oxidized, which results in deterioration of the reflectivity of the reflective layer 140, and therefore, a barrier layer 150 covering the surface and the edge of the reflective layer 140 needs to be disposed to protect the reflective layer 140. That is, the conductive combination of the transparent conductive layer 170, the reflective layer 140 and the barrier layer 150 can effectively prevent silver ions from diffusing into the light emitting diode, and can reduce the voltage drop of the transparent conductive layer 170 by using the good conductive property of silver metal, and can improve the light extraction rate of the light emitting diode by using the high reflectivity of silver metal.
In another embodiment, the first opening OP1 of the first insulating layer 120 exposes a portion of the surface of the first semiconductor layer 111, and the second opening OP2 of the first insulating layer 120 exposes a portion of the surface of the metal layer; the first pad 131 and the second pad 132 are formed on the first insulating layer 120, the first pad 131 directly contacts the first semiconductor layer 111 through the first opening OP1, the second pad 132 directly contacts the metal layer through the second opening OP2, and the projected areas of the metal layer are respectively larger than the projected areas of the first pad and the second pad in the vertical projection direction on the semiconductor stack 110. Compared with the conventional preparation process of the light-emitting diode, the embodiment reduces the preparation processes of one step of insulating filling layer and one step of internal connection electrode, further optimizes the preparation method of the light-emitting diode, and further improves the preparation efficiency of the light-emitting diode.
Referring to fig. 14 to 17, in one embodiment, the first insulating layer 120 is formed on the barrier layer 150, and the first pad 131 and the second pad 132 are formed on the first insulating layer 120, so as to directly increase the area ratio of the first pad 131 and the second pad 132 on the led without avoiding the position of the via 110 a.
In another embodiment, the ratio of the vertical projection area of the bonding pad 130 to the vertical projection area of the light emitting diode is greater than 70%, and the area of the first bonding pad 131 is greater than or equal to 2 times the area of the second bonding pad 132. Compared with the conventional preparation process of the light-emitting diode, the area proportion of the first bonding pad 131 and the second bonding pad 132 on the light-emitting diode is further enlarged on the preparation process of the embodiment, and the bonding pad 130 structure with larger area proportion can improve the contact area between the first bonding pad 131 and the second bonding pad 132 and the packaging substrate in the subsequent packaging process and improve the heat dissipation capacity of the contact surface of the light-emitting diode and the packaging substrate.
Referring to fig. 14 and 15, in one embodiment, the first insulating layer 120 is patterned by photolithography and etching to form a ring-shaped second opening OP2 and a plurality of first openings OP1. The annular second opening OP2 divides the first insulating layer 120 into a first insulating portion 121 and a second insulating portion 122, and exposes a portion of the barrier layer 150.
The first pad 131 is located on the first insulating portion 121, and a vertical projection area of the first pad 131 on the light emitting diode is smaller than that of the first insulating portion 121, so that the first pad 131 is electrically insulated from the barrier layer 150 and the edge step of the semiconductor stack 110 covered by the first insulating portion 121. The first opening OP1 vertically penetrates through the first insulating portion 121 filled in the through hole 110a and the insulating layer 160 covering the bottom of the through hole 110a to expose a portion of the second semiconductor layer 113, and the first pad 131 contacts the first semiconductor layer 111 through the first opening OP1 to form an electrical connection. The second pad 132 is located on the second insulating portion, and a vertical projection area of the second pad 132 on the light emitting diode is larger than that of the second insulating portion 122, so that the second pad 132 can cover the second insulating portion 122, extend into the second opening OP2, contact the barrier layer 150, and further form an electrical connection with the second semiconductor layer 113. The second insulating portion 122 is located at the center of the led, so that the second pad 132 can be used for current injection of the led and also can function as an anti-pin. The second pad 132 has a maximum width at the center of the light emitting diode.
Preferably, referring to fig. 16, fig. 16 is a partial enlarged view of a region B in fig. 2, the second opening OP2 has an outer edge 1201 close to the first insulating portion 121 and an inner edge 1202 close to the second insulating portion 122, the edge of the first pad 131 is located outside the outer edge 1201 of the second opening OP2, a minimum distance D1 from the outer edge 1201, and the range of D1 is between 5 μm and 15 μm; the second pad 132 is partially filled in the second opening, the minimum distance from the inner edge 1202 is D2, and the range of D2 is between 5 μm and 15 μm, so that the first pad 131 and the second pad 132 do not overlap at the position of the second opening OP 2. The minimum distance D3 of the second openings OP2 ranges from 15 μm to 25 μm.
Preferably, the first insulating layer 120 is patterned by photolithography and etching to form a plurality of annular second opening portions OP2, and the plurality of annular second opening portions OP2 divide the first insulating layer 120 into a first insulating portion 121 and a plurality of second insulating portions 122 spaced apart from each other, and expose a portion of the blocking layer 150.
Referring to fig. 17, in one embodiment, the light emitting diode includes two first pads 131 and one second pad 132, and the second pad 132 is located between the two first pads 131. The material of the first and second pads 131 and 132 includes a metal material, for example, chromium (Cr), titanium (Ti), tungsten (W), gold (Au), aluminum (Al), indium (In), tin (Sn), nickel (Ni), platinum (Pt), or an alloy of the above materials.
Preferably, the second bonding pad 132 is located between two first bonding pads 131 symmetrically distributed, and the minimum distance between the first bonding pad 131 and the second bonding pad 132 is in the range of 30 μm to 100 μm. The smaller distance between the first pad 131 and the second pad 132 can further increase the overall area of the first pad 131 and the second pad 132, and further improve the heat dissipation capability of the contact surface between the light emitting diode and the package substrate.
It should be noted that, compared to the conventional manufacturing process, in the manufacturing process of the light emitting diode, the first PAD 131 is in direct contact with the first semiconductor layer 111 through the first opening OP1, and the second PAD 132 is in direct contact with the metal layer through the second opening OP2, in the prior art, referring to fig. 18, the first PAD 131 and the second PAD 132 are usually in contact with the pre-formed internal connection electrode PAD1, and are indirectly electrically connected with the first semiconductor layer or the metal layer through the PAD1, and the PAD1 and the metal layer need to be spaced apart from each other by the pre-formed insulating filling layer PV1 to form electrical insulation, and the PAD1 and the metal layer are electrically contacted only at the predetermined position. Therefore, compared with the prior art, the preparation process of the one-step insulating filling layer and the one-step internal connection electrode is reduced, the preparation method of the light-emitting diode is further optimized, and the preparation efficiency of the light-emitting diode is improved.
In another aspect, the present application also provides a light emitting device, including:
a plurality of light emitting diodes, each of which includes a first pad 131 and a second pad 132;
the package substrate comprises a plurality of first electrode pads and second electrode pads, wherein the number of the first electrode pads is 2 times that of the second electrode pads; the first electrode pad is for bonding with the first pad 131, and the second electrode pad is for bonding with the second pad 132. Wherein the light emitting diode is the light emitting diode described in any of the above embodiments.
In one embodiment, the minimum distance between the first electrode pad and the second electrode pad is in a range of 30 μm to 100 μm.
The present application provides a light emitting diode and a light emitting device including a semiconductor stack 110, a via hole 110a and a first insulating layer 120 disposed on the semiconductor stack 110, and a first pad 131 and a second pad 132 disposed on the first insulating layer 120. The semiconductor stack 110 includes a first semiconductor layer 111, a light emitting layer 112 and a second semiconductor layer 113, the first insulating layer 120 includes a first opening OP1 and a second opening OP2, the first pad 131 contacts the first semiconductor layer 111 through the first opening OP1, and the second pad 132 is electrically connected to the second semiconductor layer 132 through the second opening OP2 without avoiding the position of the through hole 110a, so that the area ratio of the first pad 131 to the second pad 132 on the light emitting diode is increased, the contact area between the first pad 131 and the second pad 132 and the package substrate in the subsequent packaging process is increased, and the heat dissipation capability of the light emitting diode is further improved.
The application provides a light emitting diode and a light emitting device, a first insulating layer 120 is separated into a first insulating part 121 and a second insulating part 122 through a second opening part OP2, the second insulating part 122 is positioned in the center of the light emitting diode, and a second pad 132 covers the second insulating part 122, so that the second pad 132 not only can play a role of current injection, but also can play a role of thimble prevention.
The application provides a light emitting diode and light emitting device, through setting up a plurality of evenly distributed's through-hole 110a, can further improve the scalability of electric current and the homogeneity of current distribution, also increased the area of contact of first pad 131 with first semiconductor layer 111 simultaneously, and then can play the effect that reduces voltage, improvement light emitting diode's luminous efficacy.
Compared with the conventional light emitting diode preparation process, the preparation process of the light emitting diode and the light emitting device have the advantages that the first bonding pad 131 is directly contacted with the first semiconductor layer 111 through the first opening part OP1, the second bonding pad 132 is directly contacted with the metal layer through the second opening part OP2, the preparation processes of one step of insulating filling layer and one step of internal connection electrode are omitted, the preparation method of the light emitting diode is further optimized, and the preparation efficiency of the light emitting diode is improved.
In addition to the above embodiments, the light emitting diode and the light emitting device provided by the present application can be used in the fields including, but not limited to, general indoor lighting, vehicle lighting, and the like. Especially in the field of automotive lighting, the reliability requirements for light emitting diodes are higher.
The foregoing is only a preferred embodiment of the present application, and it should be noted that, for those skilled in the art, several modifications and substitutions can be made without departing from the technical principle of the present application, and these modifications and substitutions should also be regarded as the protection scope of the present application.

Claims (27)

1. A light emitting diode, comprising:
a semiconductor laminate including a first semiconductor layer, a light emitting layer, and a second semiconductor layer laminated in this order;
the through hole penetrates through the second semiconductor layer and the light-emitting layer and exposes a part of the surface of the first semiconductor layer;
a first insulating layer provided on the semiconductor stack layer, including a first insulating portion and a second insulating portion; the first insulating part surrounds the second insulating part and is spaced by an annular second opening part; the first insulating portion further includes a first opening portion;
a first pad and a second pad, the first pad being located on the first insulating portion and contacting the first semiconductor layer through the first opening portion; the second pad is located on the second insulating portion and extends into the second opening portion to be electrically connected with the second semiconductor layer, and the second pad does not overlap with a vertical projection of the first insulating portion on the semiconductor lamination layer.
2. The led of claim 1, further comprising a metal layer, wherein the metal layer comprises a reflective layer and a barrier layer, the reflective layer is disposed on the second semiconductor layer, the barrier layer covers the reflective layer, the first insulating layer covers the barrier layer and exposes a portion of the barrier layer at the second opening, and the second pad is electrically connected to the barrier layer through the second opening.
3. The light-emitting diode according to claim 2, further comprising a second insulating layer covering edges and a portion of the surface of the stack of semiconductor layers and located between the second semiconductor layer and the reflective layer, wherein the second insulating layer has a plurality of discontinuous third openings, and the reflective layer is electrically connected to the second semiconductor layer through the third openings.
4. The led of claim 2, further comprising a second insulating layer formed on only an upper surface of the stack of semiconductor layers and between the second semiconductor layer and the reflective layer, the second insulating layer having a plurality of discontinuous third openings, the reflective layer being electrically connected to the second semiconductor layer through the third openings.
5. The light-emitting diode according to any one of claims 3 and 4, further comprising a transparent conductive layer between the second semiconductor layer and the second insulating layer.
6. The LED of claim 5, wherein the transparent conductive layer has a larger vertical projected area than the reflective layer.
7. The LED of claim 5, wherein the transparent conductive layer, the reflective layer and the barrier layer are all located in a vertical projection plane of the second semiconductor layer.
8. The led of claim 1, wherein said led comprises two of said first pads, and wherein said second pad is located between two of said first pads that are symmetrically distributed.
9. The led of claim 8, wherein the second insulating portion is located at the center of the led, and the second pad covers the second insulating portion.
10. The light-emitting diode according to claim 1, wherein the minimum pitch of the second opening portion ranges from 10 μm to 25 μm.
11. The led of claim 1, wherein the minimum distance between the first pad and the second pad is in the range of 30-100 μm.
12. The light-emitting diode of claim 1, wherein the second opening has an outer edge near the first insulating portion and an inner edge near the second insulating portion, the first pad has a minimum distance from the outer edge in a range of 5 μm to 15 μm, and the second pad has a minimum distance from the inner edge in a range of 5 μm to 15 μm.
13. The led of claim 1, wherein a ratio of a total area of vertical projections of the first and second bonding pads to a vertical projection area of the led is greater than 70%.
14. The light-emitting diode according to any one of claims 1 to 7, wherein the reflective layer comprises a silver metal reflective layer.
15. A light emitting diode, comprising:
a semiconductor laminate including a first semiconductor layer, a light emitting layer, and a second semiconductor layer laminated in this order;
the through holes penetrate through the second semiconductor layer and the light emitting layer, and expose partial surface of the first semiconductor layer, the semiconductor lamination layer can comprise a first area, a second area and a third area, the through holes are distributed in the first area and the third area, and the second area is located between the first area and the third area;
a first pad in electrical contact with the first semiconductor layer and a second pad in electrical contact with the second semiconductor layer;
wherein the first pad overlaps with a vertical projection of the first and third regions on the stack of semiconductor layers, and the second pad overlaps with a projection of the second region on the stack of semiconductor layers.
16. The led of claim 15, wherein said led comprises two of said first pads, and wherein said second pad is located between two of said first pads that are symmetrically distributed.
17. The led of claim 15, wherein the number of the through holes is plural, and the through holes are distributed in the first region and the third region in a crossing manner with a predetermined distance.
18. The led of claim 15, wherein the number of said through holes on said led is in the range of no less than 20/mm 2
19. A light emitting diode, comprising:
a semiconductor laminate including a first semiconductor layer, a light emitting layer, and a second semiconductor layer laminated in this order;
the through hole penetrates through the second semiconductor layer and the light-emitting layer and exposes part of the surface of the first semiconductor layer;
a metal layer over the second semiconductor layer, the metal layer comprising silver;
a first insulating layer which is located above the semiconductor lamination layer and covers the metal layer, wherein the first insulating layer is provided with a first opening part for exposing partial surface of the first semiconductor layer and a second opening part for exposing partial surface of the metal layer;
the first pad is in direct contact with the first semiconductor layer through the first opening, the second pad is in direct contact with the metal layer through the second opening, and in a vertical projection direction on the semiconductor lamination, projection areas of the metal layer are larger than a projection area of the first pad and a projection area of the second pad respectively.
20. The led of claim 19, wherein the metal layer comprises a reflective layer and a barrier layer, the reflective layer is disposed on the second semiconductor layer, the barrier layer covers the reflective layer, the first insulating layer covers the barrier layer and exposes a portion of the barrier layer at the second opening, and the second pad is electrically connected to the barrier layer through the second opening.
21. The led of claim 20, further comprising a second insulating layer covering edges and a portion of the surface of the stack of semiconductor layers and located between the second semiconductor layer and the reflective layer, wherein the second insulating layer has a plurality of discontinuous third openings, and wherein the reflective layer is electrically connected to the second semiconductor layer through the third openings.
22. The light-emitting diode of claim 21, further comprising a transparent conductive layer between the second semiconductor layer and the second insulating layer.
23. A light emitting diode, comprising:
a semiconductor laminate including a first semiconductor layer, a light emitting layer, and a second semiconductor layer laminated in this order;
a first insulating layer over the semiconductor stack, the first insulating layer having a first opening portion and a second opening portion;
a first pad in contact with the first semiconductor layer through the first opening portion, and a second pad electrically connected to the second semiconductor layer through the second opening portion;
the ratio of the total vertical projection area of the first bonding pad and the second bonding pad to the vertical projection area of the light-emitting diode is larger than 70%, and the area of the first bonding pad is larger than or equal to 2 times of the area of the second bonding pad.
24. The led of claim 23, wherein the minimum distance between the first pad and the second pad is in the range of 30-100 μm.
25. The light-emitting diode according to claim 23, wherein the minimum pitch of the second opening portion ranges from 10 μm to 25 μm.
26. A light-emitting device, comprising:
a plurality of light emitting diodes including a first pad and a second pad;
the packaging substrate comprises a plurality of first electrode pads and second electrode pads, wherein the number of the first electrode pads is 2 times that of the second electrode pads; the first electrode pad is bonded with the first bonding pad, and the second electrode pad is bonded with the second bonding pad;
wherein, the light-emitting diode comprises the light-emitting diode as set forth in any one of claims 1 to 25.
27. The light-emitting device according to claim 26, wherein a minimum distance between the first electrode pad and the second electrode pad is in a range of 30 μm to 100 μm.
CN202211206040.2A 2022-09-30 2022-09-30 Light-emitting diode and light-emitting device Pending CN115939298A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202211206040.2A CN115939298A (en) 2022-09-30 2022-09-30 Light-emitting diode and light-emitting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211206040.2A CN115939298A (en) 2022-09-30 2022-09-30 Light-emitting diode and light-emitting device

Publications (1)

Publication Number Publication Date
CN115939298A true CN115939298A (en) 2023-04-07

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Country Status (1)

Country Link
CN (1) CN115939298A (en)

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