CN115528164A - Light-emitting diode - Google Patents
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- CN115528164A CN115528164A CN202211211499.1A CN202211211499A CN115528164A CN 115528164 A CN115528164 A CN 115528164A CN 202211211499 A CN202211211499 A CN 202211211499A CN 115528164 A CN115528164 A CN 115528164A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/64—Heat extraction or cooling elements
- H01L33/647—Heat extraction or cooling elements the elements conducting electric current to or from the semiconductor body
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
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- Led Devices (AREA)
Abstract
The application provides a light emitting diode which comprises a semiconductor lamination layer, a through hole and a first insulating layer which are arranged on the semiconductor lamination layer, and a first bonding pad and a second bonding pad which are arranged on the first insulating layer. The semiconductor laminate includes a first semiconductor layer, a light emitting layer, and a second semiconductor layer, the first insulating layer includes a first opening portion and a second opening portion, the first pad is electrically connected to the first semiconductor layer through the first opening portion, and the second pad is electrically connected to the second semiconductor layer through the second opening portion. The second opening part between the first bonding pad and the second bonding pad is projected, so that the injection area of the current is enlarged, the current expansion capability and the large-current driving resistance capability are enhanced, meanwhile, the transmission path of the current can be reduced during current injection, and the purpose of reducing the current congestion effect is achieved.
Description
Technical Field
The application relates to the technical field of semiconductor manufacturing, in particular to a light emitting diode.
Background
Light Emitting Diodes (LEDs) have the advantages of low cost, high Light efficiency, energy saving, environmental protection, and the like, and are widely used in the fields of vehicle-mounted lighting, backlight lighting, plant lighting, and high-power lighting lamps. Because of the requirements of large driving current, high heat dissipation requirement, low chip internal resistance requirement, high reflectivity in yellow/red light wave band, and the like, the metal Ag with the highest reflectivity is generally used as the main material of the metal reflecting layer.
The traditional LED chip is designed to be non-flat, and due to the fact that a surface bonding pad is in large-area contact with an insulating layer, in the subsequent packaging reflow soldering process, the surface bonding pad and the insulating layer are prone to breaking or separating due to warping of a packaging substrate, and then metal layers of different polarities are connected with each other to cause local short circuit. The technical scheme includes that an LED chip is designed to be flat, namely a P electrode and an N electrode are designed to be divided, a through hole extending from a P type layer to an N type layer is formed in a local position of an extending structure, surface bonding pads of the P electrode and the N electrode are arranged on the same horizontal plane, and accordingly the phenomenon that an insulating layer is broken to cause electric leakage or abnormal lamp death due to warping of a substrate is avoided. However, in order to meet the design requirement of planarization, the P-electrode current injection manner of the annular design can hinder the current expansion and cause the current congestion effect, and meanwhile, in order to ensure the smoothness of the surface pad, the surface pad can avoid the through hole, so that the area of the surface pad is compressed, and the heat dissipation capability and the large-current driving resistance capability of the LED chip are directly affected.
Therefore, how to provide a light emitting diode, which can improve the current spreading capability of the light emitting diode and reduce the congestion effect on the basis of meeting the requirement of surface planarization, and at the same time, can further improve the heat dissipation capability of the light emitting diode and meet the requirement of larger driving current, is a problem to be solved in the field.
Disclosure of Invention
The application aims to provide a light-emitting diode, which can improve the current expansion capability of the light-emitting diode on the basis of meeting the requirement of surface planarization, reduce the congestion effect, and further improve the heat dissipation capability of the light-emitting diode to meet the requirement of larger driving current.
In a first aspect, the present application provides a light emitting diode comprising:
a semiconductor laminate including a first semiconductor layer, a light emitting layer, and a second semiconductor layer laminated in this order;
the through hole penetrates through the second semiconductor layer and the light-emitting layer and exposes part of the surface of the first semiconductor layer;
a first insulating layer provided over the semiconductor stack layer and having a first opening portion and a second opening portion, the first opening portion exposing a partial surface of the first semiconductor layer;
a first pad formed on the semiconductor stack layer, electrically connected to the first semiconductor layer through the first opening, and having a projection that does not overlap with a projection of the via hole on a plane perpendicular to the semiconductor stack direction;
a second pad formed on the semiconductor stack and electrically connected to the second semiconductor layer through the second opening, a projection of the second pad and a projection of the through hole not overlapping each other on a plane perpendicular to the semiconductor stack direction;
wherein the first pad includes a first pad connection portion and a plurality of first pad extension portions extending toward the second pad, and the second pad includes a second pad connection portion and a plurality of second pad extension portions extending toward the first pad, and a projection of the second opening portion is located between a projection of the first pad extension portion and a projection of the second pad extension portion on a plane perpendicular to the semiconductor lamination direction.
In one possible embodiment, the light emitting diode further includes a first connection electrode electrically connected to the first semiconductor layer through the first opening portion, and a second connection electrode electrically connected to the second semiconductor layer through the second opening portion.
In one possible embodiment, the second connection electrode includes a second electrode connection portion and a plurality of second electrode extension portions extending toward the first pad, and a projection plane of the second opening portion is located within a projection plane of the second electrode extension portions on a plane perpendicular to the semiconductor lamination direction.
In one possible embodiment, the via hole distribution direction includes a first direction and a second direction, the first direction is the same as the extending direction of the first pad connecting portion, and the second direction is the same as the extending direction of the first pad extending portion.
In one possible embodiment, the through-holes form a plurality of first auxiliary lines in the first direction, a plurality of second auxiliary lines in the second direction, and the second openings are respectively offset from the first auxiliary lines and the second auxiliary lines.
In one possible embodiment, the second-direction via is located between the second pad extensions.
In one possible embodiment, the number of the second opening portions is the same as the number of the second pad extension portions.
In a possible embodiment, the light emitting diode further includes a second insulating layer formed on the first connecting electrode and the second connecting electrode, the second insulating layer includes a third opening to expose a partial surface of the first connecting electrode and a fourth opening to expose a partial surface of the second connecting electrode, perpendicular to the plane of the semiconductor lamination direction, a projection of the third opening is located in a projection of the first connecting electrode, and a projection of the fourth opening is located in a projection of the second connecting electrode.
In one possible embodiment, the first pad extension has a width greater than the second pad extension.
In one possible embodiment, a projection plane of the first opening portion is located within a projection plane of the through hole on a plane perpendicular to the semiconductor lamination direction.
In a possible implementation manner, the light emitting diode further includes a reflective layer and a barrier layer, the reflective layer is disposed on the second semiconductor layer, the barrier layer covers the reflective layer, the first insulating layer covers the barrier layer, and exposes a portion of the barrier layer at the second opening portion, and the second connection electrode is electrically connected to the barrier layer through the second opening portion.
In one possible embodiment, the reflective layer comprises a silver metal reflective layer.
In a possible implementation manner, the light emitting diode further includes a transparent conductive layer, the transparent conductive layer is located between the second semiconductor layer and the reflective layer, and the transparent conductive layer, the reflective layer and the conductive layer are all kept away from the through hole.
In a second aspect, the present application also provides a light emitting diode, comprising:
a semiconductor laminate including a first semiconductor layer, a light emitting layer, and a second semiconductor layer laminated in this order;
a through hole through the second semiconductor layer and the light emitting layer to expose a part of the surface of the first semiconductor layer;
a metal layer formed on the second semiconductor layer;
a first insulating layer formed over the semiconductor stack layer and including a first opening portion exposing a partial surface of the first semiconductor layer and a second opening portion exposing a partial surface of the metal layer;
a first connection electrode formed on the first insulating layer and contacting the first semiconductor layer through the first opening;
a second connection electrode formed on the second insulating layer and contacting the metal layer through the second opening;
a second insulating layer formed on the first and second connection electrodes, including third and fourth openings;
a first pad located within the third opening in electrical contact with the first semiconductor layer;
a second pad located within the fourth opening in electrical contact with the second semiconductor layer;
wherein projections of the first pad and the second pad do not overlap projections of the first opening and the second opening, respectively, on a plane perpendicular to the semiconductor stacking direction, and a projection of the second opening is located within a projection of the second connection electrode.
In one possible embodiment, the second pad includes a second pad connection portion and a plurality of second pad extension portions extending toward the first pad, a projection of the second pad extension portions is located within a projection of the second connection electrode, and a projection of the second opening portion does not overlap with a projection of the second pad extension portions.
In a possible embodiment, the first and second pads have the same minimum distance from the center line of the light emitting diode.
In one possible embodiment, the range of the pitch between the first pad and the second pad is not less than 150 μm.
In a possible embodiment, the first pad has a first distance from an opening edge of the third opening, and the first distance ranges from 5 μm to 20 μm; and a second distance is arranged between the second bonding pad and the opening edge of the fourth opening, and the range of the second distance is between 5 and 20 micrometers.
In a possible implementation manner, the proportion of the projected area of the first bonding pad to the projected area of the third opening is in a range of 90% to 100%; the proportion range of the projection area of the second bonding pad in the projection area of the fourth opening is between 90% and 100%.
In a third aspect, the present application is also directed to a light emitting diode, comprising:
a semiconductor laminate including a first semiconductor layer, a light emitting layer, and a second semiconductor layer laminated in this order;
the through hole penetrates through the second semiconductor layer and the light-emitting layer and exposes a part of the surface of the first semiconductor layer;
a metal layer formed on the second semiconductor layer;
a first insulating layer formed over the semiconductor stack layer and including a first opening portion exposing a partial surface of the first semiconductor layer and a second opening portion exposing a partial surface of the metal layer;
a first connection electrode formed on the first insulating layer and contacting the first semiconductor layer through the first opening;
a second connection electrode formed on the second insulating layer and contacting the metal layer through the second opening;
the first connection electrode includes a first electrode connection part and a plurality of first electrode extension parts extending toward the second connection electrode, and the first electrode extension parts and the second opening parts are arranged in a staggered manner.
In one possible embodiment, the second connection electrode includes a second electrode connection portion and a plurality of second electrode extension portions extending toward the first connection electrode, and the first electrode extension portions are disposed to be offset from the second electrode extension portions.
In one possible embodiment, the first electrode extension has a width less than a width of the second electrode extension.
In one possible embodiment, the second connection electrode fills the second opening, and an edge of the second connection electrode is located on an upper surface of the first insulating layer.
In a fourth aspect, the present application further provides a light emitting diode, including:
a semiconductor laminate including a first semiconductor layer, a light emitting layer, and a second semiconductor layer laminated in this order;
a through hole through the second semiconductor layer and the light emitting layer to expose a part of the surface of the first semiconductor layer;
the first insulating layer is arranged on the semiconductor lamination layer and comprises a first opening part and a second opening part, the first opening part penetrates through the first insulating layer to expose the first semiconductor layer, the second opening part is positioned on the second semiconductor layer, and the vertical projection of the second opening parts arranged at intervals on the semiconductor lamination layer covers the central line of the light-emitting diode;
a first connection electrode located on the first insulating layer and contacting the first semiconductor layer through the first opening;
a second connection electrode on the first insulating layer and filling the second opening portion to be electrically connected to the second semiconductor layer; the first connecting electrode and the second connecting electrode are separated by an annular fifth opening;
a first pad formed on the semiconductor stack layer, electrically connected to the first semiconductor layer through the first opening, and having a projection that does not overlap with a projection of the via hole on a plane perpendicular to the semiconductor stack direction;
and a second pad formed on the semiconductor stack and electrically connected to the second semiconductor layer through the second opening, wherein a projection of the second pad does not overlap a projection of the through hole on a plane perpendicular to the semiconductor stack direction.
In one possible embodiment, an opening range of the second opening portion covers at least a center position of the light emitting diode.
In a possible embodiment, the light emitting diode further includes a second insulating layer disposed on the first connection electrode and the second connection electrode, including a third opening and a fourth opening, the third opening being located on the first connection electrode, and the fourth opening being located on the second connection electrode.
In one possible embodiment, the second insulating layer fills the fifth opening portion.
In one possible embodiment, the fifth opening is a continuous annular opening, and a pitch range between the first connection electrode and the second connection electrode is not less than 20 μm.
Compared with the prior art, the beneficial effects of this application are at least as follows:
the application provides a light emitting diode, which comprises a semiconductor lamination layer, a through hole and a first insulating layer which are arranged on the semiconductor lamination layer, and a first bonding pad and a second bonding pad which are arranged on the first insulating layer. The semiconductor stack includes a first semiconductor layer, a light emitting layer, and a second semiconductor layer, the first insulating layer includes a first opening portion through which the first pad is electrically connected to the first semiconductor layer, and a second opening portion through which the second pad is electrically connected to the second semiconductor layer. The second opening part between the projection of the extension part of the first bonding pad and the projection of the extension part of the second bonding pad is utilized to enlarge the injection area of the current so as to enhance the current expansion capability and the capability of resisting large current driving, and meanwhile, the transmission path of the current can be reduced during current injection so as to achieve the purpose of reducing the current congestion effect.
The application provides a light emitting diode, the central point that its second opening's opening scope still covered light emitting diode puts, and the central point that the second connecting electrode of follow-up formation covers light emitting diode puts equally, and then makes the second opening of light emitting diode central point put not only can be used for the effect of current injection, can also play the effect of preventing the thimble region, has further improved light emitting diode's domain utilization area.
The application provides a light emitting diode, the minimum distance between a first bonding pad and a second bonding pad is controlled to be 150 mu m, and the distance from the center line of the light emitting diode is equal, so that the distance between the first bonding pad and the second bonding pad is further reduced, the integral area of the first bonding pad and the second bonding pad on the light emitting diode is equivalently enlarged, and further the heat dissipation capability of the contact surface of the light emitting diode and a packaging substrate is improved, and the driving capability of the light emitting diode for resisting large current is improved.
Drawings
To more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.
Fig. 1 is a schematic top view of a light emitting diode according to an embodiment of the present disclosure.
Fig. 2 isbase:Sub>A schematic cross-sectional view taken alongbase:Sub>A linebase:Sub>A-base:Sub>A in fig. 1 according to an embodiment of the present disclosure.
Fig. 3 is an enlarged schematic view of a portion B in fig. 1 according to an embodiment of the present disclosure.
Fig. 4 to 18 are schematic structural diagrams illustrating a manufacturing process of a light emitting diode according to an embodiment of the present application.
Illustration of the drawings:
100 a semiconductor substrate; 110a semiconductor stack; 110a through hole; 111 a first semiconductor layer; 112 a light emitting layer; 113 a second semiconductor layer; 120 a first insulating layer; 131 a first connecting electrode; 1311 a first electrode connection portion; 1312 a first electrode extension; 132 a second connection electrode; 1321 a second electrode connecting part; 1322 second electrode extensions; 141 first pad, 1411 first pad connection portion; 1412 a first pad extension; 142 a second pad; 1421 a second pad connection portion; 1422 second pad extensions; 150 a transparent conductive layer; 160 a reflective layer; 170 a barrier layer; 180 a second insulating layer; an OP1 first opening; an OP2 second opening; an OP3 third opening; an OP4 fourth opening; OP5 a fifth opening.
Detailed Description
The following description of the embodiments of the present application is provided by way of specific examples, and other advantages and effects of the present application will be readily apparent to those skilled in the art from the disclosure herein. The present application is capable of other and different embodiments and its several details are capable of modifications and variations in various respects, all without departing from the spirit of the present application.
In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the term "connected" is to be interpreted broadly, e.g. as a fixed connection, a detachable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as the case may be. Furthermore, the terms "first" and "second," etc. are used merely to distinguish one description from another, and are not to be construed as indicating or implying relative importance.
According to one aspect of the present application, a light emitting diode is provided. Referring to fig. 1 to 3, fig. 1 isbase:Sub>A schematic top view structure diagram ofbase:Sub>A light emitting diode according to an embodiment of the present disclosure, fig. 2 isbase:Sub>A schematic cross-sectional structure diagram taken alongbase:Sub>A cut-off linebase:Sub>A-base:Sub>A of fig. 1, and fig. 3 is an enlarged schematic structural diagram ofbase:Sub>A part B of fig. 1.
The embodiment of the application provides a light emitting diode includes: the semiconductor device includes a semiconductor substrate 100, a semiconductor stack 110 disposed on the semiconductor substrate 100, a via 110a and a first insulating layer 120 disposed on the semiconductor stack 110, and a first pad 141 and a second pad 142 disposed on the first insulating layer 120.
The semiconductor stack 110 includes a first semiconductor layer 111, a light emitting layer 112 and a second semiconductor layer 113 stacked in sequence from bottom to top, and the via hole 110a extends downward from a surface of a predetermined position of the second semiconductor layer 113 and penetrates through the second semiconductor layer 113 and the light emitting layer 112 until a part of the surface of the first semiconductor layer 111 is exposed.
The first insulating layer 120 is disposed on the upper surface of the semiconductor stack 110, the edge step of the semiconductor stack 110, and a portion of the surface of the semiconductor substrate 100 adjacent to the semiconductor stack 110, and is also formed on the sidewall of the through hole 110 a. The first insulating layer 120 includes a first opening OP1 and a second opening OP2, and the first opening OP1 is located at a center position of the via hole 110a and exposes a portion of the surface of the first semiconductor layer 111.
The first pad 141 and the second pad 142 are respectively formed on the semiconductor stack 110, the first pad 141 is electrically connected to the first semiconductor layer 111 through the first opening OP1, the second pad 142 is electrically connected to the second semiconductor layer 112 through the second opening OP2, and on a plane perpendicular to the direction of the semiconductor stack 110, projections of the first pad 141 and the second pad 142 and a projection of the through hole 110a are not overlapped with each other, so that the surface of the light emitting diode is planarized, which is beneficial for increasing the bonding area between the package substrate and the first pad 141 and the second pad 142 in the subsequent packaging process.
The first pad 141 further includes a first pad connection portion 1411 and a plurality of first pad extension portions 1412 extending toward the second pad 142, the second pad 142 also includes a second pad connection portion 1421 and a plurality of second pad extension portions 1422 extending toward the first pad 141, a projection of the second opening OP2 is located between a projection of the first pad extension portion 1412 and a projection of the second pad extension portion 1422 on a plane perpendicular to the direction of the semiconductor stack 110, the second pad 142 is electrically connected to the second semiconductor layer 112 through the second opening OP2 to enlarge an injection area of current, enhance current spreading capability and capability of withstanding large current driving, and reduce current congestion effect, and the second opening OP2 is disposed between the first pad 141 and the second pad 142 to effectively reduce a transmission path of current during current injection, thereby further reducing current congestion effect.
In one embodiment, the semiconductor substrate 100 is used as a growth base of the epitaxial layer 110, and a conductive material or an insulating material or a light-transmitting material having excellent thermal conductivity can be used, such as any one of a sapphire substrate, a silicon carbide substrate, a gallium nitride substrate, a zinc oxide substrate, a silicon substrate, a gallium arsenide substrate or a gallium phosphide substrate, wherein the sapphire substrate is a preferred substrate material for growing the epitaxial layer 110.
Preferably, the semiconductor substrate 100 may also be removed by a separation process in a subsequent process, so as to remove the semiconductor substrate 100. For example, the semiconductor substrate 100 is removed by a laser lift off method (LLO), a chemical lift off method (CLO), or the like.
Referring to fig. 2, in one embodiment, semiconductor stack 110 may be formed on semiconductor substrate 100 using a method including Metal Organic Chemical Vapor Deposition (MOCVD), hydride Vapor Phase Epitaxy (HVPE), molecular Beam Epitaxy (MBE), or the like. Here, the first semiconductor layer 111, the light emitting layer 112, and the second semiconductor layer 113 include a group iii gallium nitride series compound semiconductor, for example, gaN, alN, inGaN, alGaN, inAlGaN, and at least one of these groups. The first semiconductor layer 111 is connected to the semiconductor substrate 100, and may be a semiconductor layer doped with N-type dopants, for example, dopants for supplying electrons, such as Si, ge, se, te, and C. The second semiconductor layer 113 may Be a semiconductor layer doped with a P-type dopant, for example, a dopant for supplying holes, such as Mg, zn, be, ca, sr, ba, etc. The light emitting layer 112 is located between the first semiconductor layer 111 and the second semiconductor layer 113, is a layer that combines electrons provided by the first semiconductor layer 111 and holes provided by the second semiconductor layer 113 and outputs light of a constant wavelength, and may be composed of a well layer and a barrier layer that are alternately stacked, or a semiconductor thin film of a multi-layer quantum well structure.
When no voltage is applied to the light emitting diode, a PN junction having a high barrier potential is formed between the first semiconductor layer 111 and the second semiconductor layer 113, which can prevent electrons in the first semiconductor layer 111 of the first semiconductor layer 111 from diffusing into the second semiconductor layer 113, and can also prevent holes in the second semiconductor layer 113 from diffusing into the first semiconductor layer 111. When a forward bias voltage, i.e., an operating voltage, is applied to the light emitting diode, the PN junction barrier formed by the first semiconductor layer 111 and the second semiconductor layer 113 decreases, electrons in the first semiconductor layer 111 and holes in the second semiconductor layer 113 migrate and diffuse towards each other, the electrons and holes recombine in the light emitting layer 112, and energy is released in the form of light energy, i.e., light emission of the light emitting diode is achieved.
Referring to fig. 4 and 5, in one embodiment, the number of the through holes 110a includes a plurality of through holes, and the through holes are shaped as a polygon, such as a circle, a rectangle, or a hexagon, and may be distributed in a uniform or non-uniform distribution. In this embodiment, the through holes 110a are circular and are distributed on the light emitting diode at a constant interval, and after the through holes are energized, an external current is electrically connected to the first semiconductor layer 111 through the first connecting electrode 131 in the through holes 110a, and the plurality of uniformly distributed through holes 110a can improve the current spreading capability and the uniformity of current distribution, and simultaneously increase the contact area between the first connecting electrode 131 and the first semiconductor layer 111, thereby reducing the voltage and improving the light emitting efficiency of the light emitting diode.
Referring to fig. 1 and 4, preferably, the distribution directions of the through holes 110a include a first direction and a second direction, the first direction is an extending direction of the first pad connecting portion 1411, i.e., extending in the X direction in fig. 4, and the second direction is an extending direction of the first pad extending portion 1412, i.e., extending in the Y direction in fig. 4. The second opening OP2 is located between the plurality of first auxiliary lines formed in the first direction and the plurality of auxiliary lines formed in the second direction of the via hole 110a, and does not intersect any of the first auxiliary lines and the second auxiliary lines. It is to be noted that the X and Y directions are defined only for convenience of description, and are not used to define the arrangement orientation of the first pad connection portion 1411 and the first pad extension portion 1412.
Preferably, the through hole 110a in the second direction is located between the second pad extensions 1422.
Referring to fig. 6 and 7, in one embodiment, the light emitting diode further includes a transparent conductive layer 150. The transparent conductive layer 150 is formed on the second semiconductor layer 113 by a physical vapor deposition or chemical vapor deposition method, and forms an ohmic contact with the second semiconductor layer 113, for dispersedly transferring an externally injected current to a surface of the second semiconductor layer 113 in contact therewith in a horizontal direction. The transparent conductive layer 150 has excellent light transmittance, and light emitted from the light emitting layer 112 does not substantially cause energy loss when passing through the transparent conductive layer 150, and includes indium tin oxide, zinc tin oxide, gallium indium tin oxide, indium gallium oxide, fluorine-doped tin oxide, aluminum-doped zinc oxide, and the like.
Preferably, the transparent conductive layer 150 is located in a vertical projection range on the second semiconductor layer 113, and a vertical projection area range relative to the second semiconductor layer 113 is between 80% and 95%, and almost covers the entire second semiconductor layer 113. The contact area between the transparent conductive layer 150 and the second semiconductor layer 113 is increased, so that the current injected from the outside can be more uniformly transmitted to the entire second semiconductor layer 113 of the light emitting diode, and the voltage can be further reduced. The transparent conductive layer 150 is located in the vertical projection range on the second semiconductor layer 113, so that the coverage range of the transparent conductive layer 150 does not extend to the through hole 110a and the edge step of the semiconductor stacked layer 110, thereby avoiding the short circuit risk caused by the direct contact between the first semiconductor layer 111 and the second semiconductor layer 113.
Referring to fig. 8 to 11, in one embodiment, the light emitting diode further includes a metal layer formed by laminating a reflective layer 160 and a barrier layer 170. The reflective layer 160 is disposed on the transparent conductive layer 150 to reflect light, thereby further improving light extraction efficiency of the light emitting diode, and the reflective layer 160 forms ohmic contact with the transparent conductive layer 150 to diffuse current to the second semiconductor layer 113 through the transparent conductive layer 150. The barrier layer 170 is disposed on the reflective layer 160 and covers the edge of the reflective layer 160 to avoid the problem of the reflective layer 160 having a deteriorated reflectivity due to the surface oxidation of the reflective layer 160, and at the same time, the barrier layer 170 can also block the ion migration of the reflective layer 160. The edge of the reflective layer 160 may be disposed outside, inside, or coincident with the edge of the transparent conductive layer 150.
Preferably, the reflective layer 160 is located within a vertical projection range of the transparent conductive layer 150, that is, an edge of the reflective layer 160 is located inside the transparent conductive layer 150, so as to further increase a contact area between the transparent conductive layer 150 and the second semiconductor layer 113, thereby reducing the voltage. The barrier layer 170 covers the edge of the reflective layer 160 and is also located within the vertical projection range of the transparent conductive layer 150, that is, the transparent conductive layer 150, the reflective layer 160 and the barrier layer 170 are all located within the vertical projection plane of the second semiconductor layer 113, avoiding the location of the through hole 110 a. The reflective layer 160 and the barrier layer 170 are made of metal materials, the reflective layer 160 may include one or a combination of Ag, al, ti, W, ni, and other metals, and has a characteristic of reflecting light, and the light reflectivity of the reflective layer 140 is as high as 90% or more. Preferably, the reflective layer 160 is formed of metallic silver. The barrier layer 170 is made of one or more of Cr, ti, ni, au, al, pt, and the like, and has a property of blocking migration and diffusion of ions.
Specifically, when silver metal is used as the material of the reflective layer 160 and electricity is applied, the silver metal reflective layer 160 may undergo ion migration due to the influence of heat or electricity, and the silver ions migrating in a disordered or ordered state may diffuse into the semiconductor stack 110 to cause local leakage, thereby causing failure of the light emitting diode. Meanwhile, the silver metal reflective layer 160 is also easily corroded by water vapor and oxidized, which causes the deterioration of the reflectivity of the reflective layer 160, and therefore, a barrier layer 170 covering the surface and the edge of the reflective layer 160 needs to be disposed to protect the reflective layer 160. That is, the conductive combination of the transparent conductive layer 150, the reflective layer 160 and the barrier layer 170 can effectively prevent silver ions from diffusing into the light emitting diode, and can reduce the voltage drop of the transparent conductive layer 150 by utilizing the good conductive property of silver metal, and can improve the light extraction rate of the light emitting diode by utilizing the high reflectivity of silver metal.
Referring to fig. 12 and 13, in one embodiment, the first insulating layer 120 is formed on the barrier layer 170 and covers the edge step of the semiconductor stack 110 and the via hole 110a, and then the first insulating layer 120 is patterned by photolithography and etching to form a first opening OP1 and a second opening OP2.
The number of the first opening portions OP1 is plural, and the first opening portions OP1 are in one-to-one correspondence with the through holes 110a and are concentrically arranged. The first opening OP1 vertically penetrates the first insulating layer 120 to expose a portion of the surface of the first semiconductor layer 111, so as to provide a channel for electrically connecting the first connecting electrode 131 and the first semiconductor layer 111.
Preferably, on a plane perpendicular to the direction of the semiconductor stack 110, a projection plane of the first opening OP1 is located within a projection plane of the through hole 110 a. That is, the opening area of the through hole 110a needs to be larger than the opening area of the first opening OP1, so that the subsequently formed connection electrode 130 is electrically connected to only the first semiconductor layer 111 at the bottom, and is electrically isolated from other conductive layers including the second semiconductor layer 113, the transparent conductive layer 150, the reflective layer 160 and the barrier layer 170 by the first insulating layer 120.
In another embodiment, a vertical projection of the plurality of spaced second opening portions OP2 on the semiconductor stacked layer 110 covers a center line of the light emitting diode. The plurality of second opening portions OP2 are arranged at intervals along the first direction, and when the projection of the second opening portions OP2 covers the central line of the light emitting diode, the transmission path of the current can be reduced during current injection, and the effect of reducing the current congestion effect is achieved. The number of the second opening portions OP2 is the same as the number of the second pad extension portions 1422.
Preferably, the plurality of second openings OP2 may have the same or different sizes, and have a length along the first direction ranging from 120 μm to 145 μm and a width along the second direction ranging from 80 μm to 100 μm. For example, in the present embodiment, the number of the openings of the second opening portions OP2 is 5, the openings are square openings in a plan view, the width in the second direction is 91 μm, the horizontal interval between adjacent sides of adjacent second opening portions OP2 in the first direction is 138 μm, the horizontal length of two second opening portions OP2 disposed near the edge of the light emitting diode is 127 μm, and the horizontal length of three second opening portions OP2 disposed in the middle is 142 μm. The shape, number and size of the second opening OP2 are not specifically limited in this application, and those skilled in the art can flexibly adjust the shape, number and size according to the line width between the structures of the light emitting diode.
Preferably, the opening range of the second opening OP2 should also cover the center of the light emitting diode. After the subsequent connection electrode 130 covers the second opening OP2, the second opening OP2 located at the center of the led can be used for injecting current, and can also function as an anti-thimble region, thereby further improving the layout utilization rate of the led. Since the electrical property of the pin is consistent with the electrical property of the second connection electrode 132, there is no risk of electric leakage when the pin contacts the second connection electrode 132 in the second opening OP2.
Referring to fig. 14 and 15, in one embodiment, the first connection electrode 131 is positioned on the first insulating layer 120 and fills the first opening OP1 to be electrically connected to the first semiconductor layer 111, the second connection electrode 132 is positioned on the first insulating layer 120 and fills the second opening OP2 to be electrically connected to the second semiconductor layer 113, and the first connection electrode 131 and the second connection electrode 132 are spaced apart by the fifth opening OP5 having a ring shape and expose a portion of the surface of the first insulating layer 120 to insulate the first connection electrode 131 and the second connection electrode 132 from each other.
Preferably, the first connection electrode 131 includes a first electrode connection part 1311 and a plurality of first electrode extension parts 1312 extending toward the second direction, and the second connection electrode 132 includes a second electrode connection part 1321 and a plurality of second electrode extension parts 1322 extending toward the second direction. On a plane perpendicular to the stacking direction of the semiconductors, a projection plane of the second opening OP2 is located within a projection plane of the second electrode extension 1322, so that the second connection electrode 132 can fill the second opening OP2 and be electrically connected to the second semiconductor layer 113, and an edge of the second electrode extension 1322 covers a portion of the upper surface of the first insulating layer 120.
Preferably, the first electrode extension portions 1312 and the second electrode extension portions 1322 are disposed in a staggered manner, and the width of the first electrode extension portions 1312 is smaller than that of the second electrode extension portions 1322, so that the second electrode extension portions 1322 can avoid the positions of the through holes 110a, and the upper surfaces of the first connection electrodes 131 and the second connection electrodes 132 are also planarized.
Preferably, the first and second connection electrodes 131 and 132 may have a single layer or a stacked layer structure including metal materials or alloy materials having conductivity, such as Au, ti, ni, al, ag, gr, and Pt. The minimum interval range between the first and second connection electrodes 131 and 132 is not less than 20 μm, i.e., the minimum opening width of the fifth opening part OP5 is not less than 20 μm.
Referring to fig. 16 and 17, in one embodiment, the light emitting diode further includes a second insulating layer 180. The second insulating layer 180 is formed on the first and second connection electrodes 131 and 132, and the third and fourth openings OP3 and OP4 are formed by patterning the second insulating layer 180 through photolithography and etching. The third opening OP3 is positioned on the first connection electrode 131 and exposes a partial surface of the first connection electrode 131, and the fourth opening OP4 is positioned on the second connection electrode 132 and exposes a partial surface of the second connection electrode 132. The third opening OP3 and the fourth opening OP4 are used for electrically connecting the light emitting diode with the outside to provide a passage, and the larger the opening ranges of the third opening OP3 and the fourth opening OP4 are, the more the heat dissipation performance of the light emitting diode is improved.
Preferably, on a plane perpendicular to the direction of the semiconductor stack 110, a projection of the third opening OP3 is located within a projection of the first connection electrode 131, and a projection of the fourth opening OP4 is located within a projection of the second connection electrode 132.
Preferably, the second insulating layer 180 covers the upper portion of the through hole 110a and fills the fifth opening OP5, further electrically isolating the first connection electrode 131 and the second connection electrode 132 from each other. Meanwhile, the second insulating layer 180 also extends to cover the edge step of the semiconductor stack 110 to form a protection for the first connection electrode 131 covered at the edge step of the semiconductor stack 110.
Referring to fig. 18, in one embodiment, projections of the first and second pads 141 and 142 on a plane perpendicular to the direction of the semiconductor stack 110 do not overlap projections of the first and second opening portions OP1 and OP2, or projections of the first and second pads 141 and 142 on a plane perpendicular to the direction of the semiconductor stack 110 do not overlap projections of the through holes 110a, thereby preventing a possibility that the first pad 141 and the second connection electrode 132 are shorted or the second pad 142 and the first connection electrode 131 are shorted. Meanwhile, the first pad 141 and the second pad 142 are not overlapped with the projections of the first opening OP1, the second opening OP2 and the through hole 110a, so that the surface flatness of the first pad 141 and the second pad 142 can be further improved, and the effects of reducing the hole rate and increasing the reliability of the light emitting diode can be further achieved in the subsequent packaging process.
Preferably, a first distance is provided between the first pad 141 and the edge of the opening of the third opening OP3, and the first distance ranges from 5 μm to 20 μm; the second pad 142 has a second distance from the opening edge of the fourth opening OP4, and the second distance ranges from 5 μm to 20 μm. The size ranges of the first distance and the second distance are limited, so as to further expand the area ratio of the first bonding pad 141 and the second bonding pad 142 on the light emitting diode, thereby increasing the bonding area between the first bonding pad 141 and the package substrate and between the second bonding pad 142 and the package substrate in the subsequent packaging process of the light emitting diode, and improving the heat dissipation performance.
Preferably, a ratio of a vertical projection area of the first pad 141 to a vertical projection area of the third opening OP3 ranges from 90% to 100%, and a ratio of a vertical projection area of the second pad 142 to a vertical projection area of the fourth opening OP4 ranges from 90% to 100%.
Preferably, the first pad 141 and the second pad 142 are equidistant from the center line of the led, and the distance between the first pad 141 and the second pad 142 is not less than 150 μm. The distance between the first bonding pad 141 and the second bonding pad 142 is reduced, which is equivalent to further enlarging the overall area of the first bonding pad 141 and the second bonding pad 142 on the light emitting diode, thereby improving the heat dissipation capability of the contact surface of the light emitting diode and the package substrate and the driving capability of the light emitting diode for resisting large current.
Preferably, the first and second pads 141 and 142 may be formed of a single layer or a plurality of layers, and may include metal materials having conductivity, such as Au, ti, ni, al, ag, gr, and Pt.
The present application provides a light emitting diode including a semiconductor stack layer 110, a via hole 110a and a first insulating layer 120 disposed on the semiconductor stack layer 110, and a first pad 141 and a second pad 142 disposed on the first insulating layer 120. The semiconductor stack 110 includes a first semiconductor layer 111, a light emitting layer 112, and a second semiconductor layer 113, the first insulating layer 120 includes a first opening OP1 and a second opening OP2, the first pad 141 is electrically connected to the first semiconductor layer 111 through the first opening OP1, and the first pad 142 is electrically connected to the second semiconductor layer 113 through the second opening OP2. By using the second opening projected between the projections of the first pad extension portion 1412 and the second pad extension portion 1422, the current injection area is enlarged, the current expansion capability and the capability of resisting large current driving are enhanced, and at the same time, the current transmission path can be reduced during current injection, thereby achieving the purpose of reducing the current congestion effect.
The application provides a light emitting diode, the central point that its second opening OP 2's opening scope still covers light emitting diode puts, and the central point that second connecting electrode 132 of follow-up formation covers light emitting diode puts equally, and then makes the second opening OP2 of light emitting diode central point put not only can be used for the effect of electric current injection, can also play the effect of preventing the thimble region, has further improved light emitting diode's domain and has utilized the area.
The application provides a light emitting diode, the minimum distance between a first bonding pad 141 and a second bonding pad 142 is controlled to be 150 mu m, and the distance from the center line of the light emitting diode is equal, so that the distance between the first bonding pad 141 and the second bonding pad 142 is further reduced, namely the whole area of the first bonding pad 141 and the second bonding pad 142 on the light emitting diode is enlarged, and further the heat dissipation capacity of the contact surface of the light emitting diode and a packaging substrate is improved, and the driving capacity of the light emitting diode for resisting large current is improved.
In addition to the above embodiments, the light emitting diode provided by the present application can be used in the fields including, but not limited to, general indoor lighting, vehicle use, and the like. Especially in the field of automotive lighting, the reliability of light emitting diodes is more demanding.
The foregoing is only a preferred embodiment of the present application, and it should be noted that, for those skilled in the art, several modifications and substitutions can be made without departing from the technical principle of the present application, and these modifications and substitutions should also be regarded as the protection scope of the present application.
Claims (28)
1. A light emitting diode, comprising:
a semiconductor laminate including a first semiconductor layer, a light emitting layer, and a second semiconductor layer laminated in this order;
the through hole penetrates through the second semiconductor layer and the light-emitting layer, and exposes part of the surface of the first semiconductor layer;
a first insulating layer provided over the semiconductor stack layer and having a first opening portion and a second opening portion, the first opening portion exposing a partial surface of the first semiconductor layer;
a first pad formed on the semiconductor stack layer, electrically connected to the first semiconductor layer through the first opening, and having a projection that does not overlap with a projection of the via hole on a plane perpendicular to the semiconductor stack direction;
a second pad formed on the semiconductor stack and electrically connected to the second semiconductor layer through the second opening, a projection of the second pad and a projection of the through hole not overlapping each other on a plane perpendicular to the semiconductor stack direction;
wherein the first pad includes a first pad connection portion and a plurality of first pad extension portions extending toward the second pad, and the second pad includes a second pad connection portion and a plurality of second pad extension portions extending toward the first pad, and a projection of the second opening portion is located between a projection of the first pad extension portion and a projection of the second pad extension portion on a plane perpendicular to the semiconductor lamination direction.
2. The light-emitting diode according to claim 1, further comprising a first connection electrode electrically connected to the first semiconductor layer through the first opening portion and a second connection electrode electrically connected to the second semiconductor layer through the second opening portion.
3. The light-emitting diode according to claim 2, wherein the second connection electrode includes a second electrode connection portion and a plurality of second electrode extension portions extending toward the first pad, and a projection plane of the second opening portion is located within a projection plane of the second electrode extension portions on a plane perpendicular to the semiconductor lamination direction.
4. The led of claim 1, wherein the via distribution direction comprises a first direction and a second direction, the first direction is the same as the extending direction of the first pad connecting portion, and the second direction is the same as the extending direction of the first pad extending portion.
5. The light-emitting diode of claim 4, wherein the through holes form a plurality of first auxiliary lines in the first direction and a plurality of second auxiliary lines in the second direction, and the second openings are respectively offset from the first auxiliary lines and the second auxiliary lines.
6. The LED of claim 4, wherein the second direction via is located between the second pad extensions.
7. The light-emitting diode according to claim 1, wherein the number of the second opening portions is the same as the number of the second pad extension portions.
8. The light-emitting diode according to claim 2, further comprising a second insulating layer formed on the first connecting electrode and the second connecting electrode, the second insulating layer including a third opening to expose a partial surface of the first connecting electrode and a fourth opening to expose a partial surface of the second connecting electrode, on a plane perpendicular to the semiconductor lamination direction, a projection of the third opening being located within a projection of the first connecting electrode, and a projection of the fourth opening being located within a projection of the second connecting electrode.
9. The led of claim 1, wherein the first pad extension has a width greater than the second pad extension width.
10. The light-emitting diode according to claim 1, wherein a projection plane of the first opening portion is located within a projection plane of the through hole on a plane perpendicular to the semiconductor lamination direction.
11. The light-emitting diode according to claim 2, further comprising a reflective layer and a barrier layer, wherein the reflective layer is disposed on the second semiconductor layer, the barrier layer covers the reflective layer, the first insulating layer covers the barrier layer, and exposes a portion of the barrier layer at the second opening, and the second connection electrode is electrically connected to the barrier layer through the second opening.
12. The led of claim 11, wherein said reflective layer comprises a silver metal reflective layer.
13. The led of claim 12, further comprising a transparent conductive layer between the second semiconductor layer and the reflective layer, wherein the transparent conductive layer, the reflective layer and the conductive layer are all isolated from the through hole.
14. A light emitting diode, comprising:
a semiconductor laminate including a first semiconductor layer, a light emitting layer, and a second semiconductor layer laminated in this order;
a through hole through the second semiconductor layer and the light emitting layer to expose a part of the surface of the first semiconductor layer;
a metal layer formed on the second semiconductor layer;
a first insulating layer formed on the semiconductor laminate layer and including a first opening portion exposing a partial surface of the first semiconductor layer and a second opening portion exposing a partial surface of the metal layer;
a first connection electrode formed on the first insulating layer and contacting the first semiconductor layer through the first opening;
a second connection electrode formed on the second insulating layer and contacting the metal layer through the second opening;
a second insulating layer formed on the first and second connection electrodes, including third and fourth openings;
a first pad located within the third opening in electrical contact with the first semiconductor layer;
a second pad located within the fourth opening in electrical contact with the second semiconductor layer;
wherein projections of the first pad and the second pad do not overlap projections of the first opening and the second opening, respectively, on a plane perpendicular to the semiconductor stacking direction, and a projection of the second opening is located within a projection of the second connection electrode.
15. The light-emitting diode according to claim 14, wherein the second pad includes a second pad connecting portion and a plurality of second pad extending portions extending toward the first pad, a projection of the second pad extending portions is located within a projection of the second connecting electrode, and a projection of the second opening portion does not overlap with a projection of the second pad extending portions.
16. The led of claim 14, wherein the first and second bonding pads are equidistant from a centerline of the led.
17. The led of claim 14, wherein the first and second pads have a pitch in the range of not less than 150 μm.
18. The led of claim 14, wherein the first pad has a first distance from an edge of the opening of the third opening, and the first distance is in a range of 5 μm to 20 μm; and a second distance is arranged between the second bonding pad and the opening edge of the fourth opening, and the range of the second distance is between 5 and 20 micrometers.
19. The light-emitting diode of claim 14, wherein the ratio of the projected area of the first bonding pad to the projected area of the third opening is in a range of 90% to 100%; the proportion range of the projection area of the second bonding pad in the projection area of the fourth opening is between 90% and 100%.
20. A light emitting diode, comprising:
a semiconductor laminate including a first semiconductor layer, a light emitting layer, and a second semiconductor layer laminated in this order;
the through hole penetrates through the second semiconductor layer and the light-emitting layer and exposes a part of the surface of the first semiconductor layer;
a metal layer formed on the second semiconductor layer;
a first insulating layer formed on the semiconductor laminate layer and including a first opening portion exposing a partial surface of the first semiconductor layer and a second opening portion exposing a partial surface of the metal layer;
a first connection electrode formed on the first insulating layer and contacting the first semiconductor layer through the first opening;
a second connection electrode formed on the second insulating layer and contacting the metal layer through the second opening;
the first connection electrode includes a first electrode connection part and a plurality of first electrode extension parts extending toward the second connection electrode, and the first electrode extension parts and the second opening parts are arranged in a staggered manner.
21. The light-emitting diode according to claim 20, wherein the second connection electrode comprises a second electrode connection portion and a plurality of second electrode extension portions extending toward the first connection electrode, and the first electrode extension portions are arranged to be offset from the second electrode extension portions.
22. The light-emitting diode of claim 20, wherein the first electrode extension has a width that is less than a width of the second electrode extension.
23. The light-emitting diode according to claim 20, wherein the second connection electrode fills the second opening portion, and an edge of the second connection electrode is located on an upper surface of the first insulating layer.
24. A light emitting diode, comprising:
a semiconductor laminate including a first semiconductor layer, a light emitting layer, and a second semiconductor layer laminated in this order;
a through hole through the second semiconductor layer and the light emitting layer to expose a part of the surface of the first semiconductor layer;
the first insulating layer is arranged on the semiconductor lamination layer and comprises a first opening part and a second opening part, the first opening part penetrates through the first insulating layer to expose the first semiconductor layer, the second opening part is positioned on the second semiconductor layer, and the vertical projection of the second opening parts arranged at intervals on the semiconductor lamination layer covers the central line of the light-emitting diode;
a first connection electrode on the first insulating layer and contacting the first semiconductor layer through the first opening;
a second connection electrode on the first insulating layer and filling the second opening portion to be electrically connected to the second semiconductor layer; the first connecting electrode and the second connecting electrode are separated by an annular fifth opening;
a first pad formed on the semiconductor stack and electrically connected to the first semiconductor layer through the first opening, a projection of the first pad and a projection of the via hole not overlapping each other on a plane perpendicular to the semiconductor stack direction;
and a second pad formed on the semiconductor stack and electrically connected to the second semiconductor layer through the second opening, wherein a projection of the second pad does not overlap a projection of the through hole on a plane perpendicular to the semiconductor stack direction.
25. The light-emitting diode according to claim 24, wherein an opening range of the second opening portion covers at least a center position of the light-emitting diode.
26. The light-emitting diode according to claim 24, further comprising a second insulating layer provided on the first and second connection electrodes, comprising a third opening portion and a fourth opening portion, the third opening portion being located on the first connection electrode, the fourth opening portion being located on the second connection electrode.
27. The light-emitting diode according to claim 26, wherein the second insulating layer fills the fifth opening portion.
28. The light-emitting diode of claim 24, wherein the fifth opening is a continuous annular opening, and a distance between the first and second connection electrodes is not less than 20 μm.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211211499.1A CN115528164A (en) | 2022-09-30 | 2022-09-30 | Light-emitting diode |
| US18/477,021 US20240113259A1 (en) | 2022-09-30 | 2023-09-28 | Light-emitting device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211211499.1A CN115528164A (en) | 2022-09-30 | 2022-09-30 | Light-emitting diode |
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| CN115528164A true CN115528164A (en) | 2022-12-27 |
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