CN115799083A - 半导体器件和形成具有带有高电介质密封的rf天线中介层的半导体封装的方法 - Google Patents
半导体器件和形成具有带有高电介质密封的rf天线中介层的半导体封装的方法 Download PDFInfo
- Publication number
- CN115799083A CN115799083A CN202210809993.1A CN202210809993A CN115799083A CN 115799083 A CN115799083 A CN 115799083A CN 202210809993 A CN202210809993 A CN 202210809993A CN 115799083 A CN115799083 A CN 115799083A
- Authority
- CN
- China
- Prior art keywords
- encapsulant
- antenna
- substrate
- dielectric constant
- conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 107
- 238000000034 method Methods 0.000 title claims description 21
- 239000008393 encapsulating agent Substances 0.000 claims abstract description 82
- 239000000758 substrate Substances 0.000 claims abstract description 75
- 230000004888 barrier function Effects 0.000 claims abstract description 4
- 238000004519 manufacturing process Methods 0.000 claims description 10
- 239000000565 sealant Substances 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims description 2
- 239000010410 layer Substances 0.000 description 162
- 239000000463 material Substances 0.000 description 22
- 239000004020 conductor Substances 0.000 description 21
- 229910052782 aluminium Inorganic materials 0.000 description 16
- 229920000642 polymer Polymers 0.000 description 16
- 239000000945 filler Substances 0.000 description 15
- 230000008569 process Effects 0.000 description 14
- 229910000679 solder Inorganic materials 0.000 description 14
- 230000005540 biological transmission Effects 0.000 description 13
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 12
- 238000000465 moulding Methods 0.000 description 11
- 230000006870 function Effects 0.000 description 10
- 238000007639 printing Methods 0.000 description 9
- 239000002131 composite material Substances 0.000 description 8
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 description 7
- 229920002577 polybenzoxazole Polymers 0.000 description 7
- 238000012545 processing Methods 0.000 description 7
- 239000004642 Polyimide Substances 0.000 description 6
- 150000001875 compounds Chemical class 0.000 description 6
- 229920001721 polyimide Polymers 0.000 description 6
- 235000012239 silicon dioxide Nutrition 0.000 description 6
- 239000000377 silicon dioxide Substances 0.000 description 6
- 229910052681 coesite Inorganic materials 0.000 description 5
- 238000000748 compression moulding Methods 0.000 description 5
- 239000000356 contaminant Substances 0.000 description 5
- 229910052906 cristobalite Inorganic materials 0.000 description 5
- 239000003822 epoxy resin Substances 0.000 description 5
- 238000002955 isolation Methods 0.000 description 5
- 238000003475 lamination Methods 0.000 description 5
- 239000007788 liquid Substances 0.000 description 5
- 238000004806 packaging method and process Methods 0.000 description 5
- 229920000647 polyepoxide Polymers 0.000 description 5
- KCTAWXVAICEBSD-UHFFFAOYSA-N prop-2-enoyloxy prop-2-eneperoxoate Chemical compound C=CC(=O)OOOC(=O)C=C KCTAWXVAICEBSD-UHFFFAOYSA-N 0.000 description 5
- 238000004528 spin coating Methods 0.000 description 5
- 229910052682 stishovite Inorganic materials 0.000 description 5
- 238000001721 transfer moulding Methods 0.000 description 5
- 229910052905 tridymite Inorganic materials 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 4
- 238000004891 communication Methods 0.000 description 4
- 238000005553 drilling Methods 0.000 description 4
- 238000007772 electroless plating Methods 0.000 description 4
- 238000009713 electroplating Methods 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 230000004907 flux Effects 0.000 description 4
- 238000004599 local-density approximation Methods 0.000 description 4
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 3
- 229910001209 Low-carbon steel Inorganic materials 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 3
- 229910000831 Steel Inorganic materials 0.000 description 3
- 238000003491 array Methods 0.000 description 3
- 239000006229 carbon black Substances 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000008020 evaporation Effects 0.000 description 3
- 238000001704 evaporation Methods 0.000 description 3
- 239000011888 foil Substances 0.000 description 3
- 239000003292 glue Substances 0.000 description 3
- 230000002401 inhibitory effect Effects 0.000 description 3
- XWHPIFXRKKHEKR-UHFFFAOYSA-N iron silicon Chemical compound [Si].[Fe] XWHPIFXRKKHEKR-UHFFFAOYSA-N 0.000 description 3
- 238000003698 laser cutting Methods 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 238000001465 metallisation Methods 0.000 description 3
- 150000002739 metals Chemical class 0.000 description 3
- MOFOBJHOKRNACT-UHFFFAOYSA-N nickel silver Chemical compound [Ni].[Ag] MOFOBJHOKRNACT-UHFFFAOYSA-N 0.000 description 3
- 239000010956 nickel silver Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 238000007650 screen-printing Methods 0.000 description 3
- 239000010935 stainless steel Substances 0.000 description 3
- 229910001220 stainless steel Inorganic materials 0.000 description 3
- 239000010959 steel Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000005496 eutectics Effects 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229920001343 polytetrafluoroethylene Polymers 0.000 description 2
- 239000004810 polytetrafluoroethylene Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000009736 wetting Methods 0.000 description 2
- RUEIBQJFGMERJD-UHFFFAOYSA-N 1,2,3,4,5-pentachloro-6-(2-chlorophenyl)benzene Chemical compound ClC1=CC=CC=C1C1=C(Cl)C(Cl)=C(Cl)C(Cl)=C1Cl RUEIBQJFGMERJD-UHFFFAOYSA-N 0.000 description 1
- IHGSAQHSAGRWNI-UHFFFAOYSA-N 1-(4-bromophenyl)-2,2,2-trifluoroethanone Chemical compound FC(F)(F)C(=O)C1=CC=C(Br)C=C1 IHGSAQHSAGRWNI-UHFFFAOYSA-N 0.000 description 1
- 229910002601 GaN Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- WBHQEUPUMONIKF-UHFFFAOYSA-N PCB180 Chemical compound C1=C(Cl)C(Cl)=CC(Cl)=C1C1=CC(Cl)=C(Cl)C(Cl)=C1Cl WBHQEUPUMONIKF-UHFFFAOYSA-N 0.000 description 1
- -1 Polytetrafluoroethylene Polymers 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- MDPILPRLPQYEEN-UHFFFAOYSA-N aluminium arsenide Chemical compound [As]#[Al] MDPILPRLPQYEEN-UHFFFAOYSA-N 0.000 description 1
- 239000013590 bulk material Substances 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000001413 cellular effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000012778 molding material Substances 0.000 description 1
- 230000006855 networking Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- PBCFLUZVCVVTBY-UHFFFAOYSA-N tantalum pentoxide Inorganic materials O=[Ta](=O)O[Ta](=O)=O PBCFLUZVCVVTBY-UHFFFAOYSA-N 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
- 239000013585 weight reducing agent Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/52—Means for reducing coupling between antennas; Means for reducing coupling between an antenna and another structure
- H01Q1/526—Electromagnetic shields
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/645—Inductive arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/12—Supports; Mounting means
- H01Q1/22—Supports; Mounting means by structural association with other equipment or articles
- H01Q1/2283—Supports; Mounting means by structural association with other equipment or articles mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/12—Supports; Mounting means
- H01Q1/22—Supports; Mounting means by structural association with other equipment or articles
- H01Q1/24—Supports; Mounting means by structural association with other equipment or articles with receiving set
- H01Q1/241—Supports; Mounting means by structural association with other equipment or articles with receiving set used in mobile communications, e.g. GSM
- H01Q1/242—Supports; Mounting means by structural association with other equipment or articles with receiving set used in mobile communications, e.g. GSM specially adapted for hand-held use
- H01Q1/243—Supports; Mounting means by structural association with other equipment or articles with receiving set used in mobile communications, e.g. GSM specially adapted for hand-held use with built-in antennas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/36—Structural form of radiating elements, e.g. cone, spiral, umbrella; Particular materials used therewith
- H01Q1/38—Structural form of radiating elements, e.g. cone, spiral, umbrella; Particular materials used therewith formed by a conductive layer on an insulating support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/40—Radiating elements coated with or embedded in protective material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q21/00—Antenna arrays or systems
- H01Q21/06—Arrays of individually energised antenna units similarly polarised and spaced apart
- H01Q21/061—Two dimensional planar arrays
- H01Q21/065—Patch antenna array
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6661—High-frequency adaptations for passive devices
- H01L2223/6677—High-frequency adaptations for passive devices for antenna, e.g. antenna included within housing of semiconductor device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5383—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5385—Assembly of a plurality of insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Manufacturing & Machinery (AREA)
- Computer Networks & Wireless Communication (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Variable-Direction Aerials And Aerial Arrays (AREA)
- Details Of Aerials (AREA)
Abstract
一种半导体器件具有衬底和设置在衬底的表面上的电气部件。天线中介层被设置在衬底上。第一密封剂被沉积在天线中介层周围。第一密封剂具有高介电常数。天线中介层具有作为天线而操作的导电层和具有小于第一密封剂的高介电常数的低介电常数的绝缘层。天线中介层由具有多个天线中介层的天线衬底制成。凸块形成在天线衬底上,并且天线衬底被单体化以制作多个天线中介层。第二密封剂被沉积在电气部件上。第二密封剂具有小于第一密封剂的高介电常数的低介电常数。屏蔽层被设置在第二密封剂上。
Description
技术领域
本发明总体上涉及半导体器件,并且更具体地涉及一种半导体器件和形成具有带有高介电常数密封的RF天线中介层(interposer)的半导体封装的方法。
背景技术
半导体器件通常在现代电子产品中被找到。半导体器件执行宽泛范围的功能,诸如信号处理、高速计算、发射和接收电磁信号、控制电子器件、光电、以及为电视显示器创建视觉图像。半导体器件在通信、功率转换、网络、计算机、娱乐和消费产品的领域中被找到。半导体器件也在军事应用、航空、汽车、工业控制器和办公设备中被找到。
半导体器件、特别是在诸如射频(RF)无线通信之类的高频应用中通常包含一个或多个集成无源器件(IPD),以执行必要的电气功能,诸如RF信号处理。半导体器件必须连接到RF天线,以发射和接收RF信号。RF天线可以位于半导体器件的外部,例如在PCB上。替代地,RF天线可以集成在半导体封装中。集成RF天线通常在半导体封装的情况下被嵌入和/或占据该封装的相对小的面积。现有技术中已知的集成RF天线缺乏RF发射和接收性能和质量。特别地,为了诸如封装上天线(AoP)之类的高速器件中的多功能集成和信号输入/输出稳定性,衬底层的数目已经持续地增加。衬底层的较高的数目增加了制造成本和交付周期。衬底层的较高数目可能引起翘曲并且引入缺陷,从而降低产量和可靠性。
附图说明
图1a-1c图示了具有由锯道(saw street)分开的多个半导体管芯的半导体晶圆;
图2a-2h图示了形成具有高介电常数密封的RF天线中介层衬底的过程;
图3a-3h图示了形成具有半导体管芯、互连衬底和RF天线中介层的半导体封装的过程;
图4a-4b图示了对RF天线中介层进行平面化;
图5a-5e图示了形成具有半导体管芯、互连衬底和RF天线中介层的半导体封装的另一过程;
图6a-6c图示了形成具有半导体管芯、互连衬底和全宽度RF天线衬底的半导体封装的过程;
图7图示了集成的RF天线中介层以及在密封上具有密封剂凸块的半导体封装;
图8图示了集成的RF天线中介层以及在RF天线中介层上具有密封剂凸块的半导体封装;以及
图9图示了具有安装到印刷电路板(PCB)的表面的不同类型的封装的PCB。
具体实施方式
在参考附图的以下描述中,在一个或多个实施例中描述了本发明,其中类似的数字表示相同或相似的元件。虽然在实现本发明目的的最佳模式方面描述了本发明,但是本领域技术人员将领会,本发明旨在覆盖如由所附权利要求及其等同物所限定的本发明的精神和范围内可以包括的替代方案、修改和等同物,所附权利要求及其等同物由以下公开和附图支持。本文中使用的术语“半导体管芯”指代单词的单数和复数形式两者,并且因此可以指代单个半导体器件和多个半导体器件两者。
半导体器件通常使用两个复杂的制造过程来制造:前端制造和后端制造。前端制造涉及在半导体晶圆的表面上形成多个管芯。晶圆上的每个管芯包含有源和无源电气部件,其被电连接以形成功能电路。有源电气部件(诸如晶体管和二极管)具有控制电流流动的能力。无源电气部件(诸如电容器、电感器和电阻器)创建了对于执行电路功能所必要的电压与电流之间的关系。
后端制造指代将所完成的晶圆切割或单体化成个体半导体管芯,并且封装半导体管芯以用于结构支撑、电气互连和环境隔离。为了使半导体管芯单体化,沿着被称为锯道或划线的晶圆的非功能区对晶圆进行刻划和断裂。使用激光切割工具或锯片对晶圆进行单体化。在单体化之后,个体半导体管芯被安装到封装衬底,该封装衬底包括用于与其他系统部件互连的引脚或接触焊盘。然后,在半导体管芯上形成的接触焊盘连接到封装内的接触焊盘。电连接可以用导电层、凸块、螺柱凸块、导电胶或引线接合来实现。密封剂或其他成型(molding)材料被沉积在封装上,以提供物理支撑和电隔离。然后,将所完成的封装插入到电气系统中,并且使得半导体器件的功能对其他系统部件可用。
图1a示出了具有基础衬底材料102的半导体晶圆100,基础衬底材料102诸如硅、锗、磷化铝、砷化铝、砷化镓、氮化镓、磷化铟、碳化硅、或用于结构支撑的其他块体材料。多个半导体管芯或部件104形成在晶圆100上,由非有源管芯间晶圆区域或锯道106所分开。锯道106提供了切割区域以将半导体晶圆100单体化成个体半导体管芯104。在一个实施例中,半导体晶圆100具有100-450毫米(mm)的宽度或直径。
图1b示出了半导体晶圆100的一部分的截面图。每个半导体管芯104具有背部或非有源表面108和有源表面110,所述有源表面110包含被实现为有源器件、无源器件、导电层和电介质层的模拟或数字电路,所述有源器件、无源器件、导电层和电介质层形成在管芯内并且根据管芯的电气设计和功能而电气互连。例如,该电路可以包括在有源表面110内形成的一个或多个晶体管、二极管和其他电路元件,以实现模拟电路或数字电路,诸如数字信号处理器(DSP)、专用集成电路(ASIC)、存储器或其他信号处理电路。半导体管芯104还可以包含IPD(诸如,电感器、电容器和电阻器)以及用于RF信号处理的其他电路。表面108可以经受背部研磨以对半导体管芯104进行平面化。
使用PVD、CVD、电解电镀、无电镀过程或其他合适的金属沉积过程来在有源表面110上形成导电层112。导电层112可以是铝(Al)、铜(Cu)、锡(Sn)、镍(Ni)、金(Au)、银(Ag)或其他合适的导电材料的一个或多个层。导电层112作为与有源表面110上的电路电连接的接触焊盘而操作。
使用蒸发、电解电镀、无电镀、球滴或丝网印刷过程来在导电层112上沉积导电凸块材料。凸块材料可以是Al、Sn、Ni、Au、Ag、Pb、Bi、Cu、焊料及其组合,具有可选的焊剂溶液(flux solution)。例如,凸块材料可以是共晶Sn/Pb、高铅焊料或无铅焊料。使用合适的附着或接合过程将凸块材料接合到导电层112。在一个实施例中,通过将材料加热到其熔点以上来使凸块材料回流,以形成球或凸块114。在一个实施例中,凸块114形成在具有润湿层、阻挡层和粘合层的凸点下金属化(UBM)上。凸块114也可以压接或热压接至导电层112。凸块114表示可以在导电层112上形成的一种类型的互连结构。互连结构还可以使用接合线、导电胶、螺柱凸块、微凸块或其他电气互连。
在图1c中,使用锯片或激光切割工具118通过锯道106将半导体晶圆100单体化成个体半导体管芯104。个体半导体管芯104可以被检查和电测试以用于标识单体化后KGD。
图2a-2h图示了形成具有高介电常数密封的RF天线中介层衬底的过程。在图2a中,绝缘层120包含二氧化硅(SiO2)、氮化硅(Si3N4)、氮氧化硅(SiON)、五氧化二钽(Ta2O5)、氧化铝(Al2O3)、阻焊剂、聚合物、预浸渍的聚四氟乙烯(PTFE)(预浸料)、聚酰亚胺、苯并环丁烯(BCB)、聚苯并噁唑(PBO)以及具有类似绝缘和结构性质的其他材料的一个或多个层。导电层122形成在绝缘层120的表面125上。导电层122可以是Al、Cu、Sn、Ni、Au、Ag或其他合适的导电材料的一个或多个层。导电层122提供跨绝缘层120(包括表面125)的水平电气互连。由蚀刻、钻孔或LDA来通过绝缘层120形成多个通孔。用导电材料来填充通孔,以形成用于通过绝缘层120到导电层122的垂直电气互连的导电通孔124。
在图2b中,导电层126形成在绝缘层120上并且电连接到导电通孔124。导电层126可以是Al、Cu、Sn、Ni、Au、Ag或其他合适的导电材料的一个或多个层。导电层126提供跨绝缘层120的水平电气互连。绝缘层127形成在导电层126上。绝缘层127包含SiO2、Si3N4、SiON、Ta2O5、Al2O3、阻焊剂、预浸料、聚酰亚胺、聚合物、BCB、PBO以及具有类似绝缘和结构性质的其他材料的一个或多个层。由蚀刻、钻孔或LDA来通过绝缘层127形成多个通孔。用导电材料来填充通孔,以形成用于通过绝缘层127到导电层126的垂直电气互连的导电通孔128。导电层129形成在绝缘层127上,并且电连接到导电通孔128。导电层129可以是Al、Cu、Sn、Ni、Au、Ag或其他合适的导电材料的一个或多个层。在一个实施例中,导电层129提供跨绝缘层127的接地平面和水平电气互连。
在图2c中,绝缘层130形成在导电层129上。绝缘层130包含SiO2、Si3N4、SiON、Ta2O5、Al2O3、阻焊剂、预浸料、聚酰亚胺、聚合物、BCB、PBO以及具有类似绝缘和结构性质的其他材料的一个或多个层。由蚀刻、钻孔或LDA来通过绝缘层130形成多个通孔。用导电材料来填充通孔,以形成用于通过绝缘层130到导电层129的垂直电气互连的导电通孔131。导电层132形成在绝缘层130上并且电连接到导电通孔131。导电层132可以是Al、Cu、Sn、Ni、Au、Ag或其他合适的导电材料的一个或多个层。导电层132提供跨绝缘层130的水平电气互连。导电层132可以被配置为嵌入在RF天线中介层衬底138内的RF天线,类似于RF天线137。绝缘层133形成在导电层132上。绝缘层133包含SiO2、Si3N4、SiON、Ta2O5、Al2O3、阻焊剂、预浸料、聚酰亚胺、聚合物、BCB、PBO以及具有类似绝缘和结构性质的其他材料的一个或多个层。由蚀刻、钻孔或LDA来通过绝缘层133形成多个通孔。用导电材料来填充通孔,以形成用于通过绝缘层133到导电层132的垂直电气互连的导电通孔134。导电层135形成在绝缘层133的表面136上并且电连接到导电通孔134。导电层135可以是Al、Cu、Sn、Ni、Au、Ag或其他合适的导电材料的一个或多个层。导电层135作为从RF天线中介层衬底138的表面136暴露的多个RF天线137a-137b而操作。在一个实施例中,RF天线中介层衬底138具有八个或更多导电层,比如126、129、132和135,其被绝缘层所分开,比如120、127、130和133。更少数目的导电层降低了制造成本和交付周期,同时以更低的产品高度来管理翘曲,并且将其他产品缺陷最小化。绝缘层120、127、130和133具有低介电常数(Dk)和低介电因子(Df)。例如,绝缘层120、127、130和133具有3.2-3.7的Dk、以及1 GHz处的0.002~0.007的Df和10 GHz处的0.003~0.008的Df。
使用蒸发、电解电镀、无电镀、球滴或丝网印刷过程来在导电层122上沉积导电凸块材料。凸块材料可以是Al、Sn、Ni、Au、Ag、Pb、Bi、Cu、焊料及其组合,具有可选的焊剂溶液。例如,凸块材料可以是共晶Sn/Pb、高铅焊料或无铅焊料。使用合适的附着或接合过程将凸块材料接合到导电层122。在一个实施例中,通过将材料加热到其熔点以上来使凸块材料回流,以形成球或凸块123。在一个实施例中,凸块123形成在具有润湿层、阻挡层和粘合层的UBM上。凸块123也可以压接或热压接至导电层122。在一个实施例中,为了耐久性和维持其高度,凸块123是铜芯凸块。凸块123表示可以在导电层122上形成的一种类型的互连结构。互连结构还可以使用接合线、导电胶、螺柱凸块、微凸块或其他电气互连。
图2d是RF天线中介层衬底138的顶视图。导电层135包括适合于提供RF信号的发射和接收的以导电层135形式的导电材料岛的阵列,即RF天线。特别地,导电层135的岛的阵列从表面136被暴露,以改进RF发射和接收性能和质量。在一个实施例中,导电材料的第一组岛139a用作第一天线137a,其通过导电层122、126、129、132以及导电通孔124、128、131、134和凸块123电连接,以提供用于第一电气部件的RF发射和接收。导电材料的第二组岛139b用作第二天线137b,其通过导电层122、126、129、132以及导电通孔124、128、131、134和凸块123电连接,以提供用于第二电气部件的RF发射和接收。尽管出于简化描述的目的,在图2d-2e中示出了两个RF天线137a-137b,但是RF天线衬底138可以具有任何数目的RF天线中介层140。
图2e是RF天线中介层衬底138的另一实施例的顶视图。导电层135包括适合于提供RF信号的发射和接收的多个螺旋形状的导电材料。特别地,导电层135的螺旋形状从表面136被暴露,以改进RF发射和接收性能和质量。在一个实施例中,导电层135a用作第一螺旋形RF天线137a,其通过导电层122、126、129、132以及导电通孔124、128、131、134和凸块123电连接,以提供用于第一电气部件的RF发射和接收。导电层135b用作第二螺旋形RF天线137b,其通过导电层122、126、129、132以及导电通孔124、128、131、134和凸块123电连接,以提供用于第二电气部件的RF发射和接收。
图2f示出了RF天线中介层衬底138的顶视图,该衬底138具有RF天线中介层140以及使用焊球安装(SBM)在表面125上形成的凸块123。
在图2g中,使用锯片或激光切割工具141将RF天线中介层衬底138单体化为分立的RF天线中介层140。分立的RF天线中介层140可以被加载在带和卷筒上,以用于稍后组装。图2h示出了单体化后具有凸块123的分立RF天线中介层140的顶视图。
图3a-3h图示了形成具有电气部件和互连衬底以及分立RF天线中介层的半导体封装的过程。图3a示出了包括导电层143和绝缘层144的互连衬底或PCB 142的截面图。导电层143可以是Al、Cu、Sn、Ni、Au、Ag或其他合适的导电材料的一个或多个层。导电层143可以通过焊膏印刷或焊剂印刷而形成。导电层143提供跨衬底142的水平电气互连、以及衬底142的顶表面146与底表面148之间的垂直电气互连。取决于电气部件的设计和功能,导电层143的部分可以是电公共的或电隔离的。绝缘层144包含SiO2、Si3N4、SiON、Ta2O5、Al2O3、阻焊剂、预浸料、聚酰亚胺、聚合物、BCB、PBO以及具有类似绝缘和结构性质的其他材料的一个或多个层。绝缘层144提供导电层143之间的隔离。在一个实施例中,互连衬底142具有由绝缘层144分开的八个或更多导电层143。绝缘层144具有低Dk和低Df。例如,绝缘层144具有3.2-3.7的Dk、以及1 GHz处的0.002~0.007的Df和10 GHz处的0.003~0.008的Df。
在图3b中,使用利用朝向表面146而定向的凸块123的拾取和放置操作,将来自图2a-2h的分立RF天线中介层140定位在衬底142上。分立的RF天线中介层140可以使用前面提到的带和卷筒来安装。图3c示出了安装到互连衬底142的分立RF天线中介层140,其中凸块123进行与导电层143的机械和电气连接。
在图3d中,使用膏印刷、压缩成型、传递成型、液体密封剂成型、真空层压、旋涂或其他合适的施加器来在分立的RF天线中介层140和互连衬底142的表面146上沉积密封剂或模塑料(molding compound)150。密封剂150可以是聚合物复合材料,诸如具有填料的环氧树脂、具有填料的环氧丙烯酸酯或具有适当填料的聚合物。密封剂150是不导电的,提供结构支撑,并且在环境上保护半导体器件免受外部元件和污染物的影响。密封剂150具有高Dk和低Df。例如,密封剂150具有14-21的Dk和25 GHz处的0.006-0.012的Df。密封剂150的较高Dk大于绝缘层120、127、130、133和144的较低Dk。
在图3e中,来自图3d的结构被倒置,并且使用拾取和放置操作将电气部件152a-152d定位在衬底142上。电气部件152a-152d可以是分立的晶体管、二极管或IPD。电气部件152a-152d还可以是半导体管芯、半导体封装、表面安装器件或其他电气器件。例如,电气部件152d可以是来自图1c的半导体管芯104,其中有源表面110和凸块114朝向衬底142的表面146而定向并且电连接到导电层143。在一个实施例中,电气部件152a-152d是RF信号处理部件。图3f示出了安装到互连衬底142的电气部件152a-152d,其中凸块114和端子154进行与导电层143的机械和电气连接。连接器156可以是板到板(B2B)连接器。
在图3g中,使用膏印刷、压缩成型、传递成型、液体密封剂成型、真空层压、旋涂或其他合适的施加器来在电气部件152a-152d和互连衬底142的表面148上沉积密封剂或模塑料160。密封剂160可以是聚合物复合材料,诸如具有填料的环氧树脂、具有填料的环氧丙烯酸酯或具有适当填料的聚合物。密封剂160是不导电的,提供结构支撑,并且在环境上保护半导体器件免受外部元件和污染物的影响。密封剂160具有低Dk和低Df。例如,密封剂160具有3.9的Dk和在25 GHz处的0.005的Df。在任何情况下,密封剂160的Dk小于密封剂150的Dk。
电气部件152a-152d可包含易受EMI、RFI、谐波失真和器件间干扰所影响或者生成EMI、RFI、谐波失真和器件间干扰的IPD。例如,电气部件152a-152d内包含的IPD提供了对于高频应用所需要的电气特性,诸如谐振器、高通滤波器、低通滤波器、带通滤波器、对称Hi-Q谐振变压器和调谐电容器。在另一实施例中,电气部件152a-152d包含以高频开关的数字电路,这可能会干扰半导体封装中的IPD的操作。
在图3h中,通过对屏蔽材料的保形施加,在密封剂160的表面163上形成或设置电磁屏蔽层162。屏蔽层162可以是Al、Cu、Sn、Ni、Au、Ag或其他合适的导电材料的一个或多个层。替代地,屏蔽层162可以是羰基铁、不锈钢、镍银、低碳钢、硅铁钢、箔、导电树脂、炭黑、铝片、以及能够减少或抑制EMI、RFI和其他器件间干扰的影响的其他金属和复合物。此外,屏蔽层162覆盖了密封剂160的侧表面165以及半导体封装164的侧表面。
半导体封装164和分立RF天线中介层140的组合被指定为AoP 167。在被集成到AoP167中时,分立的RF天线中介层140为半导体封装164中的RF电气部件152a-152d提供天线功能。AoP 167适用于5G/毫米波RF产品。在一个实施例中,导电材料的第一组岛139a用作第一天线贴片140a,其通过导电层122、126、129、132、143以及导电通孔124、128、131、134和凸块123电连接,以提供用于半导体封装164中的第一电气部件152a-152d的RF发射和接收。导电材料的第二组岛192b用作第二天线贴片194b,其通过导电层122、126、129、132、143以及导电通孔124、128、131、134和凸块123电连接,以提供用于半导体封装164中的第二电气部件130、140、150的RF发射和接收。当被配置为RF天线时,导电层132可以通过导电层122、126、129、143以及导电通孔124、128、131和凸块123电连接,以提供用于半导体封装164中的第三电气部件152a-152d的RF发射和接收。沉积在分立RF天线中介层140周围的密封剂150具有高Dk和低Df。Dk的值越高,导电层135的天线贴片宽度就越小,并且可以在AoP 167上放置越多的天线贴片,如由等式(1)所示出。
w是天线贴片宽度
v0是光速
fr是谐振频率
Dk是介电常数。
在图4a-4b中所示的另一实施例中,通过研磨机166来去除密封剂150的一部分,以暴露密封剂150和分立的RF天线中介层140的表面168。研磨机166将半导体封装170中的密封剂150和分立RF天线中介层140的表面168平面化,如图4b中所示。
图5a-5e图示了形成具有电气部件和互连衬底以及分立RF天线中介层的半导体封装的另一过程。图5a示出了包括导电层182和绝缘层184的互连衬底或PCB 180的截面图。导电层182可以是Al、Cu、Sn、Ni、Au、Ag或其他合适的导电材料的一个或多个层。导电层182可以通过焊膏印刷或焊剂印刷而形成。导电层182提供跨衬底180的水平电气互连、以及衬底180的顶表面186与底表面188之间的垂直电气互连。取决于电气部件的设计和功能,导电层182的部分可以是电公共的或电隔离的。绝缘层184包含SiO2、Si3N4、SiON、Ta2O5、Al2O3、阻焊剂、预浸料、聚酰亚胺、聚合物、BCB、PBO以及具有类似绝缘和结构性质的其他材料的一个或多个层。绝缘层184提供导电层182之间的隔离。在一个实施例中,互连衬底180具有由绝缘层184分开的八个或更多导电层182。绝缘层184具有低Dk和低Df。例如,绝缘层184具有3.2-3.7的Dk、以及1 GHz处的0.002~0.007的Df和10 GHz处的0.003~0.008的Df。
类似于图3e-3f,使用拾取和放置操作将电气部件190a-190d定位在衬底180上。电气部件190a-190d可以是分立的晶体管、二极管或IPD。电气部件190a-190d还可以是半导体管芯、半导体封装、表面安装器件或其他电气器件。例如,电气部件190d可以是来自图1c的半导体管芯104,其中有源表面110和凸块114朝向衬底180的表面186而定向并且电连接到导电层182。在一个实施例中,电气部件190a-190d是RF信号处理部件。连接器192可以是B2B连接器。
在图5b中,使用膏印刷、压缩成型、传递成型、液体密封剂成型、真空层压、旋涂或其他合适的施加器来在电气部件190a-190d和互连衬底180的表面186上沉积密封剂或模塑料196。密封剂196可以是聚合物复合材料,诸如具有填料的环氧树脂、具有填料的环氧丙烯酸酯或具有适当填料的聚合物。密封剂196是不导电的,提供结构支撑,并且在环境上保护半导体器件免受外部元件和污染物的影响。密封剂196具有低Dk和低Df。例如,密封剂196具有3.9的Dk和在25 GHz处的0.005的Df。在另一实施例中,来自图5e的屏蔽层202可以在沉积密封剂196之后形成。
在图5c中,来自图5b的结构被倒置,并且使用利用朝向表面188而定向的凸块123的拾取和放置操作将来自图2f的分立RF天线中介层140定位在互连衬底180上,类似于图3b-3c。凸块123进行与导电层182的机械和电气连接。
在图5d中,使用膏印刷、压缩成型、传递成型、液体密封剂成型、真空层压、旋涂或其他合适的施加器来在在分立的RF天线中介层140和互连衬底180的表面188上沉积密封剂或模塑料200。密封剂200可以是聚合物复合材料,诸如具有填料的环氧树脂、具有填料的环氧丙烯酸酯或具有适当填料的聚合物。密封剂200是不导电的,提供结构支撑,并且在环境上保护半导体器件免受外部元件和污染物的影响。密封剂200具有高Dk和低Df。例如,密封剂200具有14-21的Dk和在25 GHz处的0.006~0.012的Df。在任何情况下,密封剂200的Dk分别大于密封剂196和绝缘层120、127、130和133以及144的Dk。
电气部件190a-190d可包含易受EMI、RFI、谐波失真和器件间干扰所影响或者生成EMI、RFI、谐波失真和器件间干扰的IPD。例如,电气部件190a-190d内包含的IPD提供了对于高频应用所需要的电气特性,诸如谐振器、高通滤波器、低通滤波器、带通滤波器、对称Hi-Q谐振变压器和调谐电容器。在另一实施例中,电气部件190a-190d包含以高频开关的数字电路,这可能会干扰半导体封装中的IPD的操作。
在图5e中,通过对屏蔽材料的保形施加,在密封剂196的表面204上形成或设置电磁屏蔽层202。屏蔽层202可以是Al、Cu、Sn、Ni、Au、Ag或其他合适的导电材料的一个或多个层。替代地,屏蔽层202可以是羰基铁、不锈钢、镍银、低碳钢、硅铁钢、箔、导电树脂、炭黑、铝片、以及能够减少或抑制EMI、RFI和其他器件间干扰的影响的其他金属和复合物。此外,屏蔽层202覆盖了密封剂196的侧表面206以及半导体封装210的侧表面。
半导体封装210和分立RF天线中介层140的组合被指定为AoP 214。在被集成到AoP214中时,分立的RF天线中介层140为半导体封装210中的RF电气部件190a-190d提供天线功能。沉积在分立RF天线中介层140周围的密封剂200具有高Df和低Dk。Dk的值越高,导电层135的天线贴片宽度就越小,并且可以在AoP 214上放置越多的天线贴片,如由等式(1)所示出。
在从图3a或5b继续的另一实施例中,使用利用朝向表面188而定向的凸块224的拾取和放置操作将RF天线衬底220定位在互连衬底180上,如图6a中所示。导电层226提供电气互连、接地平面和RF天线,类似于分立RF天线中介层140中的导电层122、126、129、132、135。绝缘层228提供了用于导电层226的隔离,类似于绝缘层120、127、130、133。在这种情况下,RF天线衬底220充当RF天线230。代替多个分立的RF天线中介层140,RF天线衬底220是基本上覆盖互连衬底180的单个整体主体。RF天线衬底220可以具有多个RF天线,类似于图2d和2e,以提供用于多个电气部件190a-190d 的RF发射和接收。图6b示出了安装到互连衬底180的RF天线衬底220,其中凸块224进行与导电层182的机械和电气连接。
在图6c中,使用膏印刷、压缩成型、传递成型、液体密封剂成型、真空层压、旋涂或其他合适的施加器来在RF天线衬底220和互连衬底180的表面188上沉积密封剂或模塑料240。密封剂240可以是聚合物复合材料,诸如具有填料的环氧树脂、具有填料的环氧丙烯酸酯或具有适当填料的聚合物。密封剂240是不导电的,提供结构支撑,并且在环境上保护半导体器件免受外部元件和污染物的影响。密封剂240具有高Dk和低Df。例如,密封剂240具有14-21的Dk和在25 GHz处的0.006~0.012的Df。在任何情况下,密封剂240的Dk分别大于密封剂196和绝缘层120、127、130和133以及144的Dk。
通过对屏蔽材料的保形施加,在密封剂196的表面244上形成或设置电磁屏蔽层242。屏蔽层242可以是Al、Cu、Sn、Ni、Au、Ag或其他合适的导电材料的一个或多个层。替代地,屏蔽层242可以是羰基铁、不锈钢、镍银、低碳钢、硅铁钢、箔、导电树脂、炭黑、铝片、以及能够减少或抑制EMI、RFI和其他器件间干扰的影响的其他金属和复合物。此外,屏蔽层242覆盖了密封剂196的侧表面246以及半导体封装248的侧表面。
半导体封装248和RF天线衬底220的组合被指定为AoP 250。在被集成到AoP 250中时,RF天线衬底220为半导体封装248中的RF电气部件190a-190d提供天线功能。沉积在分立RF天线中介层140周围的密封剂240具有高Df和低Dk。Dk的值越高,导电层226的天线贴片宽度就越小,并且可以在AoP 250上放置越多的天线贴片,如由等式(1)所示出。
图7示出了类似于图3h的实施例,其中密封剂凸块254形成在密封剂150中。
图8示出了类似于图4b的实施例,其中密封剂凸块260形成在分立的RF天线中介层140中。
图9图示了具有芯片载体衬底或PCB 402的电子设备400,其中在PCB 402的表面上安装了多个半导体封装,包括AoP 167、214和250。取决于应用,电子设备400可以具有一种类型的半导体封装或多种类型的半导体封装。
电子设备400可以是使用半导体封装来执行一个或多个电气功能的独立系统。替代地,电子设备400可以是更大系统的子部件。例如,电子设备400可以是平板电脑、蜂窝电话、数字相机、通信系统或其他电子设备的一部分。替代地,电子设备400可以是图形卡、网络接口卡、或可以被插入到计算机中的其他信号处理卡。半导体封装可以包括微处理器、存储器、ASIC、逻辑电路、模拟电路、RF电路、分立器件、或其他半导体管芯或电气部件。小型化和轻量化对于使产品被市场接受是至关重要的。半导体器件之间的距离可以减小,以实现更高的密度。
在图9中,PCB 402针对安装在PCB上的半导体封装的结构支撑和电气互连提供了通用衬底。使用蒸发、电解电镀、无电镀、丝网印刷或其他合适的金属沉积过程来在PCB 402的表面上或层内形成导电信号迹线404。信号迹线404提供了半导体封装中的每一个、安装的部件和其他外部系统部件之间的电气通信。迹线404还向半导体封装中的每一个提供电源和接地连接。
在一些实施例中,半导体器件具有两个封装级别。第一级封装是用于将半导体管芯机械地和电气地附接到中间衬底的技术。第二级封装涉及将中间衬底机械地和电气地附接到PCB。在其他实施例中,半导体器件可以仅具有第一级封装,其中管芯被机械地和电气地直接安装到PCB。出于说明的目的,PCB 402上示出了若干类型的第一级封装,包括接合线封装406和倒装芯片408。另外,若干类型的第二级封装被示出安装在PCB 402上,包括球栅阵列(BGA)410、凸块芯片载体(BCC)412、连接盘网格阵列(LGA)416、多芯片模块(MCM)或SIP模块418、四方无引脚扁平封装(QFN)420、四方扁平封装422、嵌入式晶圆级球栅阵列(eWLB)424和晶圆级芯片尺度封装(WLCSP)426。在一个实施例中,eWLB 424是扇出晶圆级封装(Fo-WLP),并且WLCSP 426是扇入晶圆级封装(Fi-WLP)。取决于系统要求,以第一和第二级封装风格的任何组合来配置的半导体封装的任何组合以及其他电子部件可以连接到PCB 402。在一些实施例中,电子设备400包括单个附接的半导体封装,而其他实施例要求多个互连的封装。通过在单个衬底上组合一个或多个半导体封装,制造商可以将预制部件并入到电子设备和系统中。因为半导体封装包括复杂的功能,所以可以使用较不昂贵的部件和简化的制造过程来制造电子器件。结果得到的器件较不可能发生故障并且制造起来较不昂贵,从而导致了消费者的较低成本。
虽然已经详细说明了本发明的一个或多个实施例,但是技术人员将领会,在不脱离如以下权利要求中所阐述的本发明的范围的情况下,可以作出对那些实施例的修改和改编。
Claims (15)
1.一种制作半导体器件的方法,包括:
提供衬底;
在所述衬底上设置天线中介层;以及
在所述天线中介层周围沉积第一密封剂,其中第一密封剂包括高介电常数。
2.根据权利要求1所述的方法,进一步包括在所述衬底的表面上设置电气部件。
3.根据权利要求2所述的方法,进一步包括在所述电气部件上沉积第二密封剂,其中第二密封剂包括小于第一密封剂的高介电常数的低介电常数。
4.根据权利要求3所述的方法,进一步包括在第二密封剂上设置屏蔽层。
5.一种半导体器件,包括:
衬底;
设置在所述衬底的表面上的电气部件;
设置在所述衬底上的天线中介层;以及
沉积在所述天线中介层周围的第一密封剂,其中第一密封剂包括高介电常数。
6.根据权利要求5所述的半导体器件,进一步包括沉积在所述电气部件上的第二密封剂,其中第二密封剂包括小于第一密封剂的高介电常数的低介电常数。
7.根据权利要求6所述的半导体器件,进一步包括设置在第二密封剂上的屏蔽层。
8.根据权利要求5所述的半导体器件,其中所述天线中介层包括作为天线而操作的导电层和包括小于第一密封剂的高介电常数的低介电常数的绝缘层。
9.根据权利要求8所述的半导体器件,其中所述导电层从第一密封剂被暴露。
10.一种半导体器件,包括:
衬底;
设置在所述衬底上的天线中介层;以及
沉积在所述天线中介层周围的第一密封剂,其中第一密封剂包括高介电常数。
11.根据权利要求10所述的半导体器件,进一步包括设置在所述衬底的表面上的电气部件。
12.根据权利要求11所述的半导体器件,进一步包括沉积在所述电气部件上的第二密封剂,其中第二密封剂包括小于第一密封剂的高介电常数的低介电常数。
13.根据权利要求12所述的半导体器件,进一步包括设置在第二密封剂上的屏蔽层。
14.根据权利要求10所述的半导体器件,其中所述天线中介层包括作为天线而操作的导电层和包括小于第一密封剂的高介电常数的低介电常数的绝缘层。
15.根据权利要求10所述的半导体器件,其中所述衬底包括:
包括小于第一密封剂的高介电常数的低介电常数的绝缘层;以及
在所述绝缘层上形成的导电层。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US17/447,336 US11894314B2 (en) | 2021-09-10 | 2021-09-10 | Semiconductor device and method of forming semiconductor package with RF antenna interposer having high dielectric encapsulation |
US17/447336 | 2021-09-10 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN115799083A true CN115799083A (zh) | 2023-03-14 |
Family
ID=85431299
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202210809993.1A Pending CN115799083A (zh) | 2021-09-10 | 2022-07-11 | 半导体器件和形成具有带有高电介质密封的rf天线中介层的半导体封装的方法 |
Country Status (4)
Country | Link |
---|---|
US (3) | US11894314B2 (zh) |
KR (2) | KR20230038392A (zh) |
CN (1) | CN115799083A (zh) |
TW (2) | TW202333245A (zh) |
Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20040212544A1 (en) * | 1999-03-24 | 2004-10-28 | Pennaz Thomas J. | Circuit chip connector and method of connecting a circuit chip |
US20180337148A1 (en) * | 2017-05-19 | 2018-11-22 | Samsung Electro-Mechanics Co., Ltd. | Composite antenna substrate and semiconductor package module |
US20190035749A1 (en) * | 2016-04-01 | 2019-01-31 | Intel Corporation | Package on antenna package |
CN109585428A (zh) * | 2017-09-29 | 2019-04-05 | 台湾积体电路制造股份有限公司 | 包含叠层式介电结构的半导体封装器件 |
CN110061345A (zh) * | 2018-01-18 | 2019-07-26 | 三星电机株式会社 | 天线模块 |
US20190333882A1 (en) * | 2016-07-01 | 2019-10-31 | Intel Corporation | Semiconductor packages with antennas |
CN210143007U (zh) * | 2016-08-02 | 2020-03-13 | 亚德诺半导体无限责任公司 | 射频隔离器 |
CN110943068A (zh) * | 2018-09-21 | 2020-03-31 | 日月光半导体制造股份有限公司 | 设备封装 |
US20200135669A1 (en) * | 2018-10-25 | 2020-04-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semicondcutor package and manufacturing method of semicondcutor package |
US20210091017A1 (en) * | 2019-09-20 | 2021-03-25 | Qualcomm Incorporated | Package comprising discrete antenna device |
CN113140549A (zh) * | 2020-01-16 | 2021-07-20 | 日月光半导体制造股份有限公司 | 半导体设备封装和其制造方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11502402B2 (en) * | 2019-03-15 | 2022-11-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated patch antenna having insulating substrate with antenna cavity and high-K dielectric |
US11735539B2 (en) * | 2020-11-09 | 2023-08-22 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of forming discrete antenna modules |
US11587916B2 (en) * | 2021-03-04 | 2023-02-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package structure and manufacturing method thereof |
-
2021
- 2021-09-10 US US17/447,336 patent/US11894314B2/en active Active
-
2022
- 2022-06-14 TW TW111122072A patent/TW202333245A/zh unknown
- 2022-07-11 CN CN202210809993.1A patent/CN115799083A/zh active Pending
- 2022-09-07 KR KR1020220113140A patent/KR20230038392A/ko not_active Application Discontinuation
-
2023
- 2023-05-26 KR KR1020230068370A patent/KR20230173588A/ko unknown
- 2023-06-08 TW TW112121447A patent/TW202401899A/zh unknown
- 2023-06-14 US US18/334,375 patent/US20230411831A1/en active Pending
- 2023-12-20 US US18/390,051 patent/US20240128201A1/en active Pending
Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20040212544A1 (en) * | 1999-03-24 | 2004-10-28 | Pennaz Thomas J. | Circuit chip connector and method of connecting a circuit chip |
US20190035749A1 (en) * | 2016-04-01 | 2019-01-31 | Intel Corporation | Package on antenna package |
US20190333882A1 (en) * | 2016-07-01 | 2019-10-31 | Intel Corporation | Semiconductor packages with antennas |
CN210143007U (zh) * | 2016-08-02 | 2020-03-13 | 亚德诺半导体无限责任公司 | 射频隔离器 |
US20180337148A1 (en) * | 2017-05-19 | 2018-11-22 | Samsung Electro-Mechanics Co., Ltd. | Composite antenna substrate and semiconductor package module |
CN109585428A (zh) * | 2017-09-29 | 2019-04-05 | 台湾积体电路制造股份有限公司 | 包含叠层式介电结构的半导体封装器件 |
CN110061345A (zh) * | 2018-01-18 | 2019-07-26 | 三星电机株式会社 | 天线模块 |
CN110943068A (zh) * | 2018-09-21 | 2020-03-31 | 日月光半导体制造股份有限公司 | 设备封装 |
US20200135669A1 (en) * | 2018-10-25 | 2020-04-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semicondcutor package and manufacturing method of semicondcutor package |
US20210091017A1 (en) * | 2019-09-20 | 2021-03-25 | Qualcomm Incorporated | Package comprising discrete antenna device |
CN113140549A (zh) * | 2020-01-16 | 2021-07-20 | 日月光半导体制造股份有限公司 | 半导体设备封装和其制造方法 |
Also Published As
Publication number | Publication date |
---|---|
US20240128201A1 (en) | 2024-04-18 |
KR20230173588A (ko) | 2023-12-27 |
TW202333245A (zh) | 2023-08-16 |
KR20230038392A (ko) | 2023-03-20 |
TW202401899A (zh) | 2024-01-01 |
US11894314B2 (en) | 2024-02-06 |
US20230081706A1 (en) | 2023-03-16 |
US20230411831A1 (en) | 2023-12-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR102582827B1 (ko) | 차폐층에 향상된 접촉을 갖기 위한 도전성 비아를 형성하는 반도체 디바이스 및 방법 | |
US11342294B2 (en) | Semiconductor device and method of forming protrusion e-bar for 3D SiP | |
US20230343732A1 (en) | Semiconductor Device and Method of Forming Discrete Antenna Modules | |
CN115706086A (zh) | 半导体器件和使用支撑框架来堆叠器件的方法 | |
US20230343720A1 (en) | Semiconductor Device and Method of Integrating RF Antenna Interposer with Semiconductor Package | |
US20230140748A1 (en) | Antenna-in-Package Devices and Methods of Making | |
US11894314B2 (en) | Semiconductor device and method of forming semiconductor package with RF antenna interposer having high dielectric encapsulation | |
US20230402397A1 (en) | Semiconductor Device and Method of Selective Shielding Using FOD Material | |
US20240096770A1 (en) | Integrated Antenna-In-Package Structure | |
US20230395477A1 (en) | Semiconductor Device and Method of Disposing Electrical Components Over Side Surfaces of Interconnect Substrate | |
US12009314B2 (en) | Semiconductor device and method of compartment shielding using bond wires | |
US20240030154A1 (en) | Semiconductor Device and Method of Forming Conductive Structure for EMI Shielding and Heat Dissipation | |
US20240021490A1 (en) | Semiconductor Device and Method of Forming Thin Heat Sink Using E-Bar Substrate | |
US20240021536A1 (en) | Semiconductor Device and Method of Forming EMI Shielding Material in Two-Step Process to Avoid Contaminating Electrical Connector | |
US20240063194A1 (en) | Semiconductor Device and Method of Forming Module-in-Package Structure Using Redistribution Layer | |
CN115295426A (zh) | 半导体器件和在用于系统级封装模块的包封物中嵌入电路图案的方法 | |
CN115295425A (zh) | 半导体器件和在sip模块的包封物内形成电路图案的方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |