CN115793551B

CN115793551B - Ultra-large-scale multifunctional comprehensive processing platform for space electronic load

Info

Publication number: CN115793551B
Application number: CN202310078350.9A
Authority: CN
Inventors: 柴霖; 邵龙; 贾明权; 彭智
Original assignee: CETC 10 Research Institute
Current assignee: CETC 10 Research Institute
Priority date: 2023-02-08
Filing date: 2023-02-08
Publication date: 2023-06-02
Anticipated expiration: 2043-02-08
Also published as: CN115793551A

Abstract

The invention discloses a spaceflight electronic load ultra-large scale multifunctional comprehensive processing platform, which comprises: the system comprises a plurality of FPGA type signal processing modules, a plurality of DSP type signal processing modules, 2 rapidIO high-speed network switching modules, 2 state monitoring and recording modules, a plurality of DWDM wavelength division multiplexing/demultiplexing modules, a plurality of real-time I/O and external interface modules, 2 system control modules and a plurality of secondary power supply modules. The invention adopts a module generalized design, and forms 8 standardized modules comprising an FPGA type signal processing module, a DSP type signal processing module, a rapidIO high-speed network exchange module, a state monitoring and recording module, a DWDM wavelength division multiplexing module, a real-time I/O and external interface module, a system control module, a secondary power module and the like, thereby greatly improving the integration level of hardware processing resources, and having high utilization rate of hardware resources and strong reliability.

Description

Ultra-large-scale multifunctional comprehensive processing platform for space electronic load

Technical Field

The invention belongs to the technical field of spacecraft loading, and particularly relates to a spaceflight electronic loading ultra-large scale multifunctional comprehensive processing platform.

Background

Currently, space electronic loads are in the third generation, namely the 'joint' equipment integration system era, and are characterized by system integration based on independent equipment. The functions are enclosed inside the individual devices, each device only performs one function, and the functional devices are interconnected together through a standard bus. Along with the continuous development of chips, the Internet and intelligent technologies, the modern electronic system integration design concept enters a brand-new era, namely a fourth generation 'integrated' function integration system which is a deep integrated system integration era taking a universal module as a basic unit, and is characterized by a 'universal hardware platform and a software definition function'.

The new generation of integrated system decouples hardware and functional software, breaks the limitation of traditional software and hardware binding in thinking, considers a plurality of independent functional devices as a whole, and performs deep integrated at a module level. This shift in thinking has led to tremendous benefits in the development of modern electronic information systems. On one hand, by combining the measures of similar items, module generalization, reusability, system reconfiguration and the like, the volume, weight and power consumption of system hardware are greatly reduced, and the reliability and usability of the system are obviously improved. On the other hand, with the establishment of a unified digital network and an open system architecture, the openness and the iterative development capability of the system are improved, the system becomes alive, the system is endowed with vitality, and the system can grow and stretch, the overall performance is greatly improved, and the total life cycle cost is obviously reduced.

The aerospace communication and navigation (SCaN) program of the foreign NASA performs the tasks of communication, navigation and networking reconfigurable test bed (CoNNeCT) in 2013, and performs a new software radio technology test. The main test equipment 'SCaN test bed' in the test is sent to the international space station on 7 months and 20 days in 2012, thus the software radio technology test is primarily completed, and the function of reconstructing waveforms by utilizing signal processing hardware (such as FPGA) and a General Purpose Processor (GPP) is realized. The SCaN test bed software radio test equipment is limited to S, L, ka frequency band communication function, has no large-scale high-speed switching network and no expansion capacity, is a closed and simple function integration architecture, and is far smaller than the ultra-large-scale satellite-borne integrated processing system in the function integrated scale.

The patent with the application number of CN201510908975.9, western An aviation computing technology institute Li Chengwen of China aviation industry group company, et al, discloses an advanced comprehensive processing system for aviation airborne environment, which comprises a comprehensive data processing unit, a comprehensive signal processing unit, a comprehensive graphic processing unit, a comprehensive video processing unit, a comprehensive data storage unit, a comprehensive data exchange unit and a remote intelligent interface unit, wherein the units are mutually connected to form a core processing and network module. The invention provides a deep comprehensive hardware architecture aiming at an airborne electronic platform, but does not relate to specific modularized hardware design, particularly high-speed transmission network design, and does not mention a deployment method of a plurality of functions on the same comprehensive processing platform, and the deep comprehensive hardware architecture has no engineering applicability and cannot be applied to a spacecraft platform with a severe space environment.

Disclosure of Invention

Aiming at the defects in the prior art, the ultra-large scale multifunctional comprehensive processing platform for the aerospace electronic load solves the problems of single function, low integration level, large SWaP and difficult updating and upgrading of the traditional aerospace electronic load equipment.

In order to achieve the aim of the invention, the invention adopts the following technical scheme: a kind of space electron load very large scale multi-functional comprehensive treatment platform, including: the system comprises a plurality of FPGA type signal processing modules, a plurality of DSP type signal processing modules, 2 rapidIO high-speed network switching modules, 2 state monitoring and recording modules, a plurality of DWDM wavelength division multiplexing/demultiplexing modules, a plurality of real-time I/O and external interface modules, 2 system control modules and a plurality of secondary power supply modules;

the DWDM wavelength division multiplexing/demultiplexing module is connected with the FPGA type signal processing module through a digital optical fiber and the FPGA type signal processing modules through high-speed digital optical fibers, and the FPGA type signal processing module, the DSP type signal processing module, the state monitoring and recording module, the real-time I/O and external interface module, the system control module and the secondary power module are connected through the rapidIO high-speed network switching module to meet the transmission requirement of real-time signal processing service data; the system control module is connected with the FPGA type signal processing module, the DSP type signal processing module, the state monitoring and recording module, the real-time I/O and external interface module, the secondary power module and the rapidIO high-speed network exchange module through the CAN bus to carry out monitoring instruction and module state information transmission;

the 2 independent rapidIO network switching modules form a main switching module and a standby switching module, and when one communication link fails, effective transmission of data can be ensured; the RapidIO network adopts a 4-channel mode, and the transmission rate is 2.5Gbps/3.1255Gbps/5Gbps and is configurable; the 4x rapidIO links which are mutually backed up are respectively connected into the rapidIO main exchange module and the standby exchange module, the 2 exchange modules are interconnected through one rapidIO 1x link and used for state detection and data transmission between the main exchange module and the standby exchange module, and the 2 exchange modules have completely symmetrical topological structures and connection relations.

Further: the DWDM wavelength division multiplexing/demultiplexing module is used for completing the function of multiplexing/demultiplexing tens of paths of optical signals in 1550 wave bands, forming tens of paths of different optical signals through wavelength division multiplexing after the optical signals are input into the module, and converting the optical signals into electric signals for processing through photoelectric conversion; the electric signals are subjected to electro-optic conversion, and tens of optical signals with different wavelengths in 1550 wave bands are multiplexed into one optical signal in a wavelength division multiplexer and then output to the outside of the platform.

Further: the FPGA type signal processing module and the DSP type signal processing module realize functional program loading of different tasks through software functional configuration to complete digital signal processing work; the FPGA module provides logic processing capability and is matched with a photoelectric/electro-optical conversion sub-card for use, and the photoelectric/electro-optical conversion sub-card mainly completes photoelectric and electro-optical conversion; the DSP module provides floating point processing capabilities for signal processing for computationally intensive functions.

Further: the rapidIO high-speed network exchange module is used for completing internal data interaction and external data transmission, and each processing module is connected to the rapidIO network module through the passive backboard and then is connected with other modules, so that the interconnection between any modules is completed;

the state monitoring and recording module is a rapidIO high-speed network switching module with a DDR (double data rate) caching function, the DDR caching is realized by inserting a DDR daughter card, and the state monitoring and recording module is responsible for high-speed signal transmission caching between a system FPGA module and a DSP module;

the real-time I/O and external interface module is responsible for data interface interaction with external equipment and data interface interaction between the platform expansion chassis, and comprises rapidIO network connection, CAN bus connection and discrete control line connection;

the expansion module is connected with the rapidIO network and can expand new task functions and improve signal processing performance;

the secondary power supply module outputs 100V of direct current 100V input power to the secondary power supply module of each processing unit after passing through the energy storage unit, outputs 28V of output power, and supplies power to each module in the unit at 28V of voltage;

the system control module is responsible for platform control and mainly comprises the functions of setting working parameters, configuring equipment links, monitoring the running state of equipment and deploying tasks for each module, and meanwhile, is responsible for scheduling each module to execute self-checking, testing and dynamic loading processes; the system control and interface module is responsible for the bottom layer operation of the whole comprehensive platform, and the operation and management of the configuration unit are uniformly scheduled; and carrying out data interaction with other platforms through the gigabit Ethernet interface.

Further: the FPGA type signal processing module adopts a standardized design of an FMC photoelectric conversion daughter card and a signal processing main board, the photoelectric conversion daughter card is connected with the signal processing main board through an FMC interface, the photoelectric conversion daughter card is connected with a high-speed GTH interface of 2 FPGA chips of the signal processing main board through 2 FMC connectors, 2 FPGAs are connected to a rapid IO high-speed network switching module through 1 path of 4x rapid IO, then the rapid IO high-speed network switching module externally provides 2 paths of 4x rapid IO bus interfaces, and the transmission rate is 2.5Gbps/3.1255Gbps/5Gbps and configurable.

Further: the DSP type signal processing module mainly comprises 4 multi-core DSP chips and 1 RapidIO exchange chip; the 4 DSPs are respectively connected to the rapidIO switching chip through 1 path of 4x rapidIO, and the switching chip is externally configured through 2 paths of 4x rapidIO interfaces, wherein the transmission rate is 2.5Gbps/3.1255Gbps/5 Gbps.

Further: the rapidIO high-speed network switching module mainly comprises 6 rapidIO switching chips, the module provides 32 paths of 4x rapidIO interfaces externally, and the transmission rate is 2.5Gbps/3.1255Gbps/5Gbps and is configurable.

Further: the system control module mainly comprises 1 PPC8548 and 1 Tsi578 exchange chip, provides system-level JTAG scanning capability through a JTAG time sequence TAP controller and a bridge chip meeting IEEE1149.1 specification, can directly access all chips with JTAG ports through JTAG ports, checks signal transmission quality between chips and modules through backboard interconnection, and realizes more comprehensive self-checking and more accurate fault positioning; 2 paths of 4x rapidIO ports, 2 paths of gigabit Ethernet ports and main and standby 2 paths of CAN control bus interfaces are externally provided.

Further: the working flow of the platform is as follows:

step S1: the secondary power module receives the OC instruction to turn on a power supply and powers up the system control module;

step S2: the system control module is electrified for self-checking, an embedded operating system is started, system management software is loaded, the system is actively reported to a state through the Ethernet after being ready, and the system enters a standby state to wait for task execution;

step S3: the system control module receives a task configuration instruction and controls the secondary power module to power up a resource module required by a task, and the system control module comprises a rapidIO high-speed network switching module, an FPGA (field programmable gate array) type signal processing module, a DSP (digital signal processor) type signal processing module, a real-time I/O (input/output) and an external interface module;

step S4: each resource module is electrified for self-checking, and a self-checking result is reported to a system control module through a CAN bus;

step S5: the system control module issues dynamic loading instructions to each resource module through the CAN bus according to task requirements, and each resource module locally loads functional software corresponding to the task and feeds back loading results;

step S6: after the starting of the functional software of each resource module is completed, the network management program deployed in the system control module configures virtual channel links among the functional programs through the rapidIO switching network according to the task functional thread topology, and feeds back the link establishment result;

step S7: the functional software on each resource module completes the signal information processing process and the receiving and sending of the result according to the established virtual channel communication link, completes the signal information processing task of the function according to the task planning, and outputs the processing result to the external storage unit through the real-time I/O and the external interface module;

step S8: after the execution tasks are completed, the platform uninstalls the functional software of the resource modules corresponding to all the execution tasks, closes the corresponding resource modules, and returns to the standby or shutdown state.

The beneficial effects of the invention are as follows: aiming at the overall design of an aerospace electronic load processing platform, the invention changes the traditional design method of constructing a system by taking each independent device as a basic unit, adopts a construction open system structure to deeply analyze the signal processing mechanism of each function, carries out module-level integrated design on the electronic load processing platform, and designs the aerospace electronic load ultra-large-scale multifunctional integrated processing platform, and the invention has the advantages that: the universal hardware platform has software definition functions, one-key quick upgrade and flexible resource configuration.

The software and hardware are decoupled, and functional software is dynamically deployed when tasks are executed, so that large-scale multifunctional synthesis is realized on a unified platform, and the module-level deep synthesis design of more than ten electronic equipment functions is completed.

The system hardware has strong expansion, upgrading and growth capacities, the ultra-large-scale multifunctional comprehensive processing platform constructed by the invention replaces the traditional field programmable unit (LRU) with a universal field programmable module (LRM), an open system architecture is constructed, the LRM adopts a standard VPX connector, the module technology is independent, the module technology can be arbitrarily plugged, replaced and upgraded, the ultra-large-scale multifunctional comprehensive processing platform can be synchronously developed with a semiconductor device in a longer life cycle, and the continuous upgrading of spacecraft load electronic equipment is supported.

The system function is reconfigurable, software components can be updated on line, and the spaceflight electronic load super-large-scale multifunctional comprehensive processing platform constructed by the invention can conveniently insert new task functions through flexible interconnection relations among the LRMs and interconnection of functional software in a virtual channel mode, thereby realizing function expansion and promotion of the spaceborne electronic equipment system.

The aerospace electronic load super-large-scale multifunctional comprehensive processing platform constructed by the invention has high integration level and low SWaP, adopts a module generalized design by combining similar items, forms 8 standardized modules including an FPGA type signal processing module, a DSP type signal processing module, a Rapid IO high-speed network switching module, a state monitoring and recording module, a DWDM wavelength division multiplexing module, a real-time I/O and external interface module, a system control module, a secondary power module and the like, greatly improves the integration level of hardware processing resources, has high utilization rate of hardware resources and strong reliability, reduces the hardware scale of equipment on the whole, and reduces the volume, the weight and the power consumption.

The full life cycle cost is low, and the aerospace electronic load super-large-scale multifunctional comprehensive processing platform constructed by the invention adopts an open architecture, so that when software/hardware components need to be upgraded (or have faults), the influence is limited to local parts, and the upgrading (or troubleshooting) cost is minimized; meanwhile, the software and hardware module transplanting is supported, and the development cost is reduced through reusability; the technology supporting long term is insertable and expandable, so that the system has high growth, endows 'vitality', ensures the performance index advantage of the system in the whole life cycle, and reduces the cost of the whole life cycle.

Drawings

FIG. 1 is a schematic block diagram of a spacecraft electronic load ultra-large scale multifunctional integrated processing platform of the invention;

FIG. 2 is a schematic block diagram of an FPGA-type signal processing module circuit;

FIG. 3 is a schematic block diagram of a DSP signal processing module;

FIG. 4 is a schematic block diagram of a circuit of the rapidIO high-speed network switching module;

FIG. 5 is a schematic block diagram of a system control module circuit;

FIG. 6 is a workflow diagram of a spacecraft electronic load ultra-large scale multifunctional integrated processing platform.

Detailed Description

The following description of the embodiments of the present invention is provided to facilitate understanding of the present invention by those skilled in the art, but it should be understood that the present invention is not limited to the scope of the embodiments, and all the inventions which make use of the inventive concept are protected by the spirit and scope of the present invention as defined and defined in the appended claims to those skilled in the art.

As shown in fig. 1, the aerospace electronic load super-large scale multifunctional comprehensive processing platform adopts a hardware architecture combining networked high-speed signal transmission with a general signal processing resource pool, and comprises: the system comprises a plurality of FPGA type signal processing modules, a plurality of DSP type signal processing modules, 2 rapidIO high-speed network switching modules, 2 state monitoring and recording modules, a plurality of DWDM wavelength division multiplexing modules, a plurality of real-time I/O and external interface modules, 2 system control modules and a plurality of secondary power supply modules, wherein the structure is composed of dozens of modules of 8 types, a double-row vertical plug module arrangement mode is adopted, all modules are designed according to ASAAC packaging requirements, a serialization and combination VPX connector is adopted, and each module provides mechanical and environmental interfaces of a lifting, locking and heat transfer passage; the system internal interconnection bus comprises a high-speed digital optical fiber, a rapidIO high-speed switching network and a CAN control bus; the FPGA type signal processing module is interconnected through high-speed digital optical fibers, so that the high-speed signal transmission requirement is met; the modules are arbitrarily interconnected through the rapidIO high-speed exchange network module, so that the transmission requirement of the real-time signal processing service data is met; the system control module is interconnected with all other modules through the CAN bus to transmit monitoring instructions and module state information; the rapidIO high-speed switching network adopts a double-star bus structure, two completely independent backup communication links are provided for each module, and 2 independent rapidIO network switching modules form a main switching module and a standby switching module, so that when one communication link fails, effective transmission of data can be ensured; the RapidIO network adopts a 4-channel mode, and the transmission rate is 2.5Gbps/3.1255Gbps/5Gbps and is configurable; the electrical characteristics of serial RapidIO 4x conform to the XAUI electrical interface specified in ieee802.3 ae-2002; the 4x rapidIO links which are mutually backed up are respectively connected into a rapidIO main exchange module and a standby exchange module, the 2 exchange modules are interconnected through a rapidIO 1x link and are used for state detection and data transmission between the main exchange module and the standby exchange module, and the 2 exchange modules have completely symmetrical topological structures and connection relations; the CAN control bus adopts bus topology, 2 system control modules are used as main nodes, the monitoring of the bus state is completed by the identity of a CAN bus central monitor, other modules are used as slave nodes which are connected to a network, and the slave nodes do not need to be provided with independent bus monitors and directly receive the monitoring of the main nodes through a coupler.

The DWDM dense wavelength division multiplexing/demultiplexing module completes the function of multiplexing/demultiplexing tens of wavelength division of 1550-band optical signals. After the optical signals are input into the module, tens of paths of different optical signals are formed through wave division multiplexing, and then the optical signals are converted into electric signals through photoelectric conversion for processing. The electric signal to be sent by the platform is subjected to electro-optic conversion, and tens of optical signals with different wavelengths in 1550 wave bands are multiplexed into one optical signal in the wavelength division multiplexer and then output to the outside of the platform.

The FPGA type signal processing module and the DSP type signal processing module realize functional program loading of different tasks through software functional configuration, and complete digital signal processing work. The FPGA module provides strong logic processing capability and is matched with a photoelectric/electro-optical conversion sub-card for use, and the photoelectric/electro-optical conversion sub-card mainly completes photoelectric and electro-optical conversion. The DSP module provides powerful floating point processing capability for signal processing with computationally intensive functions.

And the rapidIO high-speed network exchange module is used for completing internal data interaction and external data transmission, and each processing module is accessed to the rapidIO network module through the passive backboard and then is interconnected with other modules, so that the interconnection between any chips is completed.

The state monitoring and recording module is a rapidIO high-speed network switching module with a DDR (double data rate) caching function, the DDR caching is realized by inserting a DDR daughter card, and the caching is responsible for high-speed signal transmission between a system FPGA module and a DSP module.

The real-time I/O and external interface module is responsible for data interface interaction with external equipment and data interface interaction between the platform expansion chassis, and comprises rapidIO network connection, CAN bus connection and discrete control line connection.

And the expansion module slot is connected with the rapidIO network, so that the expansion of new task functions and the improvement of signal processing performance can be realized.

And the secondary power supply module outputs the direct-current 100V input power to the secondary power supply module of each processing unit after passing through the energy storage unit. The secondary power supply module inputs 100V and outputs 28V, and power is supplied to each module in the unit by 28V.

The system control module is responsible for platform control and mainly comprises the functions of setting working parameters for each module, configuring equipment links, monitoring the running state of equipment and deploying tasks, and is also responsible for scheduling each module to execute processes such as self-checking, testing and dynamic loading. The system control and interface module is responsible for the bottom layer operation of the whole comprehensive platform, and the operation and management of the configuration unit are uniformly scheduled; and carrying out data interaction with other platforms through the gigabit Ethernet interface.

Referring to fig. 2, the FPGA signal processing module adopts a standardized design of FMC photoelectric-electric conversion daughter card and signal processing motherboard, the daughter card and motherboard are connected by FMC interface, the motherboard includes 2 FPGAs and 1 RapidIO exchange chip; the photoelectric-electric conversion daughter card is connected with a high-speed GTH interface of 2 FPGA chips of the main board through 2 FMC connectors, 2 FPGAs are connected to a rapidIO switching chip through 1 path of 4x rapidIO, and then the switching chip externally provides 2 paths of 4x rapidIO bus interfaces, and the transmission rate is 2.5Gbps/3.1255Gbps/5Gbps and is configurable.

Referring to fig. 3, the DSP signal processing module mainly comprises 4 pieces of multi-core DSP chips and 1 piece of RapidIO exchange chip; the 4 DSPs are respectively connected to the rapidIO switching chip through 1 path of 4x rapidIO, and the switching chip is externally configured through 2 paths of 4x rapidIO interfaces, wherein the transmission rate is 2.5Gbps/3.1255Gbps/5 Gbps.

Referring to fig. 4, the RapidIO high-speed network switching module mainly comprises 6 RapidIO switching chips, the module provides 32 paths of 4x RapidIO interfaces externally, and the transmission rate is 2.5Gbps/3.1255Gbps/5Gbps and is configurable.

Referring to fig. 5, the system control module is mainly composed of 1 PPC8548 and 1 Tsi578 exchange chip, and provides JTAG scanning capability of system level through a JTAG sequential TAP controller and a bridge chip meeting IEEE1149.1 specification, and through a JTAG port, the system control module can directly access all chips with the JTAG port, check signal transmission quality between chips and modules through back plate interconnection, and realize more comprehensive self-check and more accurate fault location; 2 paths of 4x rapidIO ports, 2 paths of gigabit Ethernet ports and main and standby 2 paths of CAN control bus interfaces are externally provided.

Referring to fig. 6, a normal work flow block diagram of the aerospace electronic load super-large scale multifunctional comprehensive processing platform is shown, and the work flow is as follows:

step S3: the system control module receives a task configuration instruction and controls the secondary power module to power up a resource module required by a task, wherein the resource module comprises a rapidIO high-speed network switching module, an FPGA (field programmable gate array) type signal processing module, a DSP (digital signal processor) type signal processing module, a real-time I/O (input/output) and external interface module and the like;

Claims

1. A kind of space electron load ultra-large scale multi-functional comprehensive treatment platform, characterized by, comprising: the system comprises a plurality of FPGA type signal processing modules, a plurality of DSP type signal processing modules, 2 rapidIO high-speed network switching modules, 2 state monitoring and recording modules, a plurality of DWDM wavelength division multiplexing/demultiplexing modules, a plurality of real-time I/O and external interface modules, 2 system control modules and a plurality of secondary power supply modules;

the 2 independent rapidIO network switching modules form a main switching module and a standby switching module, and when one communication link fails, effective transmission of data can be ensured; the RapidIO network adopts a 4-channel mode, and the transmission rate is 2.5Gbps/3.1255Gbps/5Gbps and is configurable; the 4x rapidIO links which are mutually backed up are respectively connected into the rapidIO main exchange module and the standby exchange module, the 2 exchange modules are interconnected through one rapidIO 1x link and are used for state detection and data transmission between the main exchange module and the standby exchange module, and the 2 exchange modules have completely symmetrical topological structures and connection relations;

the FPGA type signal processing module adopts a standardized design of an FMC photoelectric conversion daughter card and a signal processing main board, the photoelectric conversion daughter card is connected with the signal processing main board through an FMC interface, the photoelectric conversion daughter card is connected with a high-speed GTH interface of 2 FPGA chips of the signal processing main board through 2 FMC connectors, 2 FPGAs are connected to a rapid IO high-speed network exchange module through 1 path of 4x rapid IO, then the rapid IO high-speed network exchange module externally provides 2 paths of 4x rapid IO bus interfaces, and the transmission rate is 2.5Gbps/3.1255Gbps/5Gbps and is configurable;

the DSP type signal processing module mainly comprises 4 multi-core DSP chips and 1 RapidIO exchange chip; the 4 DSPs are respectively connected to the rapidIO exchange chip through 1 path of 4x rapidIO, and the exchange chip is externally provided with 2 paths of 4x rapidIO interfaces, so that the transmission rate is 2.5Gbps/3.1255Gbps/5Gbps and is configurable;

the rapidIO high-speed network switching module mainly comprises 6 rapidIO switching chips, the module provides 32 paths of 4x rapidIO interfaces outwards, and the transmission rate is 2.5Gbps/3.1255Gbps/5Gbps and is configurable;

the system control module mainly comprises 1 PPC8548 and 1 Tsi578 exchange chip, provides system-level JTAG scanning capability through a JTAG time sequence TAP controller and a bridge chip meeting IEEE1149.1 specification, can directly access all chips with JTAG ports through JTAG ports, checks signal transmission quality between chips and modules through backboard interconnection, and realizes more comprehensive self-checking and more accurate fault positioning; 2 paths of 4x rapidIO ports, 2 paths of gigabit Ethernet ports and 2 paths of CAN control bus interfaces of a main circuit and a standby circuit are externally provided;

the working flow of the platform is as follows:

2. The ultra-large scale multifunctional comprehensive processing platform for space flight electronic load according to claim 1, wherein the DWDM wavelength division multiplexing/demultiplexing module is used for completing the function of multiplexing/demultiplexing tens of optical signals in 1550 waveband, forming tens of different optical signals through wavelength division multiplexing after the optical signals are input into the module, and converting the optical signals into electric signals for processing through photoelectric conversion respectively; the electric signals are subjected to electro-optic conversion, and tens of optical signals with different wavelengths in 1550 wave bands are multiplexed into one optical signal in a wavelength division multiplexer and then output to the outside of the platform.

3. The aerospace electronic load super-large scale multifunctional comprehensive processing platform according to claim 1, wherein the FPGA type signal processing module and the DSP type signal processing module realize functional program loading of different tasks through software functional configuration to complete digital signal processing work; the FPGA module provides logic processing capability and is matched with a photoelectric/electro-optical conversion sub-card for use, and the photoelectric/electro-optical conversion sub-card mainly completes photoelectric and electro-optical conversion; the DSP module provides floating point processing capabilities for signal processing for computationally intensive functions.

4. The aerospace electronic load ultra-large scale multifunctional comprehensive processing platform according to claim 1, wherein the rapidIO high-speed network switching module is used for completing internal data interaction and external data transmission, and each processing module is connected to the rapidIO network module through a passive backboard and then is connected with other modules, so that interconnection among any modules is completed;