CN115793551A - Space electronic load super-large scale multifunctional comprehensive processing platform - Google Patents

Abstract

The invention discloses a very large-scale multifunctional integrated processing platform for an aerospace electronic load, which comprises: the system comprises a plurality of FPGA type signal processing modules, a plurality of DSP type signal processing modules, 2 RapidIO high-speed network switching modules, 2 state monitoring and recording modules, a plurality of DWDM wavelength division multiplexing/demultiplexing modules, a plurality of real-time I/O and external interface modules, 2 system control modules and a plurality of secondary power supply modules. The system adopts a module universal design to form 8 types of standard modules including an FPGA type signal processing module, a DSP type signal processing module, a RapidIO high-speed network switching module, a state monitoring and recording module, a DWDM wavelength division multiplexing module, a real-time I/O and external interface module, a system control module, a secondary power supply module and the like, thereby greatly improving the integration level of hardware processing resources, and having high utilization rate and strong reliability of the hardware resources.

Description

Space electronic load super-large scale multifunctional comprehensive processing platform

Technical Field

The invention belongs to the technical field of spacecraft loading, and particularly relates to a super-large-scale multifunctional comprehensive processing platform for an aerospace electronic load.

Background

Currently, the aerospace electronic load is still in the third generation, namely the "combined" equipment integration system era, and is characterized by system integration performed by taking independent equipment as a basic unit. The functions are enclosed in each independent device, each device only completes one function, and the functional devices are interconnected together through a standard bus. With the continuous development of chips, internet and intelligent technology, the integration design concept of modern electronic systems enters a new era, namely a deep integrated system integration era taking universal modules as basic units, namely a fourth generation integrated system with integrated functions, and is characterized by a universal hardware platform and software defined functions.

The new-generation integrated system decouples hardware and functional software, breaks through the limit of traditional software and hardware binding in thinking, considers a plurality of independent functional devices as a whole and carries out deep integrated integration at a module level. This mental shift has brought tremendous benefit to the development of modern electronic information systems. On one hand, by combining the measures of the same item, the module generalization, the reusability, the system reconfiguration and the like, the volume, the weight and the power consumption of system hardware are greatly reduced, and the reliability and the usability of the system are obviously improved. On the other hand, with the establishment of a unified digital network and an open system architecture, the openness and the iterative development capability of the system are greatly improved, the system becomes alive, the vitality is endowed, the growth and the scalability are realized, the overall performance is greatly improved, and the cost of the whole life cycle is obviously reduced.

The aerospace communication and navigation (SCaN) plan of foreign NASA executed the task of communication, navigation and networking reconfigurable test bench (CoNNeCT) in 2013, and new software radio technology tests were performed. The main test equipment "SCaN test bench" in the test is sent to the international space station in 7, 20/2012, and the software radio technology test is primarily completed, and the test has the function of reconstructing a waveform by using signal processing hardware (such as FPGA) and a General Purpose Processor (GPP). The software radio test equipment of the 'SCaN test bed' is only limited to the S, L, ka frequency band communication function, does not have a large-scale high-speed switching network, does not have the expansion capability, is a closed and simple structure with integrated functions, and is far smaller than the ultra-large-scale satellite-borne comprehensive processing system provided by the invention in the function comprehensive scale.

The Chinese patent application number is CN201510908975.9, and the 'deep comprehensive processing system' applied by the national institute of aviation technology for computation Li Chengwen of the national institute of aviation technology, west safety, and the like of the group of aviation industries of China proposes an aviation airborne environment deep comprehensive processing system, which comprises a comprehensive data processing unit, a comprehensive signal processing unit, a comprehensive graphic processing unit, a comprehensive video processing unit, a comprehensive data storage unit, a comprehensive data exchange unit and a remote intelligent interface unit, wherein all the units are mutually connected to form a core processing and network module. The invention provides a deep comprehensive hardware architecture for an airborne electronic platform, but does not relate to specific modular hardware design, particularly high-speed transmission network design, does not mention a method for deploying a plurality of functions on the same comprehensive processing platform, does not have engineering applicability, and cannot be applied to a spacecraft platform with a severe space environment.

Disclosure of Invention

Aiming at the defects in the prior art, the space electronic load super-large-scale multifunctional comprehensive processing platform provided by the invention solves the problems of single function, low integration level, large SWaP and difficulty in updating and upgrading of the traditional space electronic load equipment.

In order to achieve the purpose of the invention, the invention adopts the technical scheme that: an aerospace electronic load super-large scale multifunctional integrated processing platform comprises: the system comprises a plurality of FPGA type signal processing modules, a plurality of DSP type signal processing modules, 2 RapidIO high-speed network switching modules, 2 state monitoring and recording modules, a plurality of DWDM wavelength division multiplexing/demultiplexing modules, a plurality of real-time I/O and external interface modules, 2 system control modules and a plurality of secondary power supply modules;

the DWDM wavelength division multiplexing/demultiplexing module is connected with the FPGA type signal processing module through a digital optical fiber, the FPGA type signal processing modules are connected with each other through a high-speed digital optical fiber, and the FPGA type signal processing module, the DSP type signal processing module, the state monitoring and recording module, the real-time I/O and external interface module, the system control module and the secondary power supply module are connected with each other through a RapidIO high-speed network switching module to meet the transmission requirement of real-time signal processing service data; the system control module is interconnected with the FPGA type signal processing module, the DSP type signal processing module, the state monitoring and recording module, the real-time I/O and external interface module, the secondary power supply module and the RapidIO high-speed network switching module through a CAN bus to transmit monitoring instructions and module state information;

the 2 independent RapidIO network switching modules form a main switching module and a standby switching module, and when one communication link fails, effective transmission of data can still be ensured; the RapidIO network adopts a 4-channel mode, and the transmission rate is 2.5Gbps/3.1255Gbps/5Gbps configurable; the 4x RapidIO links which are backups of each other are respectively connected to the RapidIO master exchange module and the RapidIO standby exchange module, the 2 exchange modules are interconnected through one RapidIO 1x link and used for state detection and data transmission between the master exchange module and the RapidIO standby exchange module, and the 2 exchange modules have completely symmetrical topological structures and connection relations.

Further: the DWDM wavelength division multiplexing/demultiplexing module is used for completing tens of paths of wavelength division multiplexing/demultiplexing functions of 1550 waveband optical signals, and optical signals are input into the DWDM module, then formed into tens of paths of different optical signals through wavelength division demultiplexing, and then converted into electric signals through photoelectric conversion for processing; the emitted electric signal is electro-optically converted, and dozens of paths of 1550 waveband optical signals with different wavelengths are multiplexed into one path of optical signal by the wavelength division multiplexer and then output to the outside of the platform.

Further: the FPGA type signal processing module and the DSP type signal processing module realize the loading of functional programs of different tasks through software function configuration to complete the digital signal processing work; the FPGA module provides logic processing capability and is matched with the photoelectric/electro-optical conversion daughter card for use, and the photoelectric/electro-optical conversion daughter card mainly completes photoelectric and electro-optical conversion; the DSP module provides floating point processing capability for use in signal processing of computationally intensive functions.

Further: the RapidIO high-speed network exchange module completes internal data interaction and external data transmission, and each processing module is accessed to the RapidIO network module through a passive backboard and then is interconnected with other modules, so that the interconnection among any modules is completed;

the state monitoring and recording module is a RapidIO high-speed network switching module with a DDR cache function, and the DDR cache is realized by inserting a DDR sub-card and is responsible for high-speed signal transmission cache between the FPGA module and the DSP module of the system;

the real-time I/O and external interface module is responsible for data interface interaction with external equipment and data interface interaction between platform expansion chassis, and comprises RapidIO network connection, CAN bus connection and discrete control line connection;

the expansion module is connected with the RapidIO network and can expand the function of a new task and improve the signal processing performance;

the secondary power supply module outputs a direct current 100V input power supply to the secondary power supply modules of each processing unit after passing through the energy storage unit, the input of the secondary power supply module is 100V, the output of the secondary power supply module is 28V, and the secondary power supply module supplies power to each module in the unit by using 28V voltage;

the system control module is responsible for platform control, mainly comprises the functions of setting working parameters for each module, configuring an equipment link, monitoring the running state of the equipment and deploying tasks, and is also responsible for scheduling each module to execute the processes of self-checking, testing and dynamic loading; the system control and interface module is responsible for the bottom operation of the whole integrated platform and uniformly schedules the operation and management of the configuration unit; and carrying out data interaction with other platforms through gigabit Ethernet interfaces.

Further: the FPGA type signal processing module adopts a standardized design of an FMC photoelectric electro-optical conversion sub-card and a signal processing main board, the photoelectric electro-optical conversion sub-card is connected with the signal processing main board through an FMC interface, the photoelectric electro-optical conversion sub-card is connected with a high-speed GTH interface of 2 FPGA chips of the signal processing main board through 2 FMC connectors, the 2 FPGAs are connected to a RapidIO high-speed network switching module through 1 path of 4x RapidIO, then the RapidIO high-speed network switching module provides 2 paths of 4x RapidIO bus interfaces to the outside, and the transmission rate is 2.5Gbps/3.1255Gbps/5Gbps configurable.

Further: the DSP type signal processing module mainly comprises 4 multi-core DSP chips and 1 RapidIO switching chip; the 4 DSP chips are respectively connected to a RapidIO switching chip through 1 path of 4x RapidIO, and then the switching chip externally passes through 2 paths of 4x RapidIO interfaces, and the transmission rate is 2.5Gbps/3.1255Gbps/5Gbps configurable.

Further: the RapidIO high-speed network switching module mainly comprises 6 RapidIO switching chips, the module provides 32-path 4x RapidIO interfaces to the outside, and the transmission rate is 2.5Gbps/3.1255Gbps/5Gbps configurable.

Further: the system control module mainly comprises 1 PPC8548 and 1 Tsi578 exchange chip, provides system-level JTAG scanning capability through a JTAG time sequence TAP controller and a bridge chip meeting IEEE1149.1 standard, can directly access all chips with JTAG ports through the JTAG ports, checks the signal transmission quality of interconnection between the chips and between the modules through a back plate, and realizes more comprehensive self-checking and more accurate fault positioning; and 2 paths of 4x RapidIO ports, 2 paths of gigabit Ethernet ports and main and standby 2 paths of CAN control bus interfaces are provided externally.

Further: the working process of the platform is as follows:

step S1: the secondary power supply module receives an OC instruction to start a power supply and power up the system control module;

step S2: the system control module is electrified and self-checked, an embedded operating system is started, system management software is loaded, the state is actively reported through the Ethernet after the system control module is ready, and the system enters a standby state and waits for a task to be executed;

and step S3: the system control module receives the task configuration instruction and controls the secondary power supply module to power up the resource module required by the task, and the system control module comprises a RapidIO high-speed network switching module, an FPGA signal processing module, a DSP signal processing module, a real-time I/O module and an external interface module;

and step S4: each resource module is electrified and self-checked, and self-checking results are reported to the system control module through the CAN bus;

step S5: the system control module sends dynamic loading instructions to each resource module through the CAN bus according to task requirements, and each resource module locally loads functional software corresponding to the task and feeds back a loading result;

step S6: after the functional software of each resource module is started, a network management program deployed in a system control module configures virtual channel links among the functional programs through a RapidIO switching network according to task functional thread topology, and feeds back link establishment results;

step S7: the functional software on each resource module completes the signal information processing process and the receiving and sending of the result according to the established virtual channel communication link, completes the signal information processing task of the function according to the task planning, and outputs the processing result to an external storage unit through the real-time I/O and external interface module;

step S8: and after the execution tasks are completed, the platform unloads the functional software of the resource modules corresponding to all the execution tasks, closes the corresponding resource modules and returns to a standby state or a shutdown state.

The invention has the beneficial effects that: the invention aims at the overall design of an aerospace electronic load processing platform, changes the traditional design method of a combined system which is constructed by taking each independent device as a basic unit, adopts an open system construction and deeply analyzes the signal processing mechanism of each function, carries out module-level integrated design on the electronic load platform, designs the aerospace electronic load super-large-scale multifunctional integrated processing platform, and has the advantages that: the universal hardware platform, the software definition function, one-key quick upgrade and flexible resource configuration.

The software and hardware are decoupled, the functional software is dynamically deployed when the task is executed, large-scale multifunctional integration is realized on a unified platform, and module-level deep integrated design of more than ten electronic equipment functions is completed.

The system hardware has strong capability of expanding, upgrading and growing, the ultra-large-scale multifunctional integrated processing platform constructed by the invention replaces the traditional field programmable unit (LRU) with a universal field programmable module (LRM) to construct an open system architecture, the LRM adopts a standard VPX connector, the module technology is independent, the LRM can be plugged, replaced and upgraded at will, the LRM can be synchronously developed with a semiconductor device in a longer life cycle, and the spacecraft load electronic equipment is continuously upgraded.

The space electronic load super-large-scale multifunctional integrated processing platform constructed by the invention can conveniently insert new task functions by flexible interconnection relation among all LRMs and interconnection among functional software in a 'virtual channel' mode, thereby realizing the function expansion and promotion of the satellite-borne electronic equipment system.

The space electronic load super-large scale multifunctional integrated processing platform constructed by the invention forms 8 types of standardized modules comprising an FPGA type signal processing module, a DSP type signal processing module, a RapidIO high-speed network switching module, a state monitoring and recording module, a DWDM wavelength division multiplexing module, a real-time I/O and external interface module, a system control module, a secondary power supply module and the like by combining the same items and adopting a module universal design, thereby greatly improving the integration level of hardware processing resources, having high utilization rate of the hardware resources and strong reliability, reducing the hardware scale of equipment as a whole and reducing the volume, the weight and the power consumption.

The full life cycle cost is low, and the aerospace electronic load super-large scale multifunctional comprehensive processing platform constructed by the invention adopts an open system structure, so that when software/hardware components need to be upgraded (or have faults), the influence is only limited to a local part, and the upgrading (or troubleshooting) cost is minimized; meanwhile, the software and hardware module transplantation is supported, and the development cost is reduced through reusability; the technology supporting long-term insertion and expansion enables the system to have high growth performance, endows vitality, and reduces the life cycle cost while ensuring the performance index advantage of the system.

Drawings

FIG. 1 is a schematic block diagram of a very large-scale multifunctional integrated processing platform for an aerospace electronic load;

FIG. 2 is a schematic block diagram of an FPGA-type signal processing module circuit;

FIG. 3 is a schematic block diagram of a DSP type signal processing module circuit;

FIG. 4 is a schematic block diagram of a RapidIO high-speed network switching module circuit;

FIG. 5 is a schematic block diagram of a system control module circuit;

FIG. 6 is a flow chart of the operation of the aerospace electronic load super-large scale multifunctional integrated processing platform.

Detailed Description

The following description of the embodiments of the present invention is provided to facilitate the understanding of the present invention by those skilled in the art, but it should be understood that the present invention is not limited to the scope of the embodiments, and it will be apparent to those skilled in the art that various changes may be made without departing from the spirit and scope of the invention as defined and defined in the appended claims, and all matters produced by the invention using the inventive concept are protected.

As shown in fig. 1, the space electronic load super-large scale multifunctional integrated processing platform adopts a hardware architecture combining networked high-speed signal transmission and a general signal processing resource pool, and includes: the system comprises a plurality of FPGA type signal processing modules, a plurality of DSP type signal processing modules, 2 RapidIO high-speed network switching modules, 2 state monitoring and recording modules, a plurality of DWDM wavelength division multiplexing modules, a plurality of real-time I/O and external interface modules, 2 system control modules and a plurality of secondary power supply modules, wherein the 8 types of the modules comprise dozens of modules, a double-row vertical-insertion module arrangement mode is adopted in the structure, all the modules are designed according to the ASAAC packaging requirement, a serialized and combinative VPX connector is adopted, and each module provides a mechanical and environmental interface for pulling, locking and heat transfer passages; the interconnection bus in the system comprises a high-speed digital optical fiber, a RapidIO high-speed switching network and a CAN control bus; the FPGA type signal processing modules are interconnected through high-speed digital optical fibers, so that the high-speed signal transmission requirement is met; all modules are arbitrarily interconnected through RapidIO high-speed switching network modules, so that the transmission requirement of real-time signal processing service data is met; the system control module is interconnected with all other modules through a CAN bus to transmit monitoring instructions and module state information; the RapidIO high-speed switching network adopts a double star-shaped bus structure, two completely independent backup communication links are provided for each module, 2 independent RapidIO network switching modules form a main switching module and a standby switching module, and when one communication link fails, effective transmission of data can still be ensured; the RapidIO network adopts a 4-channel mode, and the transmission rate is 2.5Gbps/3.1255Gbps/5Gbps configurable; the electrical characteristics of the serial RapidIO 4x conform to the XAUI electrical interface specified in IEEE802.3ae-2002; the 4x RapidIO links which are backuped with each other are respectively accessed into a RapidIO main exchange module and a RapidIO standby exchange module, 2 exchange modules are interconnected through a RapidIO 1x link and used for state detection and data transmission between the main exchange module and the standby exchange module, and the 2 exchange module has a completely symmetrical topological structure and a connection relation; the CAN control bus adopts a bus topology, 2 system control modules are used as main nodes, the monitoring of the bus state is completed by using CAN bus center monitor identities, other modules are used as slave nodes to be connected to a network, and the slave nodes are not provided with an independent bus monitor and directly receive the monitoring of the main nodes through a coupler.

The DWDM dense wavelength division multiplexing/demultiplexing module completes the wavelength division multiplexing/demultiplexing function of dozens of paths of 1550 waveband optical signals. After the optical signals are input into the module, tens of paths of different optical signals are formed by wavelength division demultiplexing and then are respectively converted into electric signals for processing through photoelectric conversion. The electric signal to be sent by the platform is subjected to electro-optical conversion, and dozens of paths of 1550 waveband optical signals with different wavelengths are multiplexed into one path of optical signal by the wavelength division multiplexer and then output to the outside of the platform.

The FPGA type signal processing module and the DSP type signal processing module realize the loading of functional programs of different tasks through software function configuration to complete the digital signal processing work. The FPGA module provides strong logic processing capacity and is matched with the photoelectric/electro-optical conversion daughter card for use, and the photoelectric/electro-optical conversion daughter card mainly completes photoelectric and electro-optical conversion. The DSP module provides powerful floating point processing capability for use in signal processing with computationally intensive functions.

And the RapidIO high-speed network exchange module completes internal data interaction and external data transmission, and each processing module is accessed to the RapidIO network module through a passive backboard and then is interconnected with other modules, so that the interconnection between any chips is completed.

The status monitoring and recording module is a RapidIO high-speed network switching module with a DDR cache function, and the DDR cache is realized by inserting a DDR sub-card and is responsible for high-speed signal transmission cache between the FPGA module and the DSP module of the system.

And the real-time I/O and external interface module is responsible for data interface interaction with external equipment and data interface interaction between platform expansion cabinets, and comprises RapidIO network connection, CAN bus connection and discrete control line connection.

And the expansion module slot is connected with the RapidIO network, so that the function expansion of a new task and the signal processing performance improvement can be realized.

And the direct current 100V input power passes through the energy storage unit and is output to the secondary power module of each processing unit. The input of the secondary power supply module is 100V, the output of the secondary power supply module is 28V, and the secondary power supply module supplies power to each module in the unit at the voltage of 28V.

The system control module is responsible for platform control, mainly comprises the functions of setting working parameters, configuring equipment links, monitoring the running state of equipment and deploying tasks for each module, and is also responsible for scheduling each module to execute the processes of self-checking, testing, dynamic loading and the like. The system control and interface module is responsible for the bottom operation of the whole integrated platform and uniformly schedules the operation and management of the configuration unit; and carrying out data interaction with other platforms through gigabit Ethernet interfaces.

Referring to fig. 2, the FPGA type signal processing module adopts a standardized design of an FMC photoelectric electro-optical converter daughter card and a signal processing main board, the daughter card is connected with the main board by an FMC interface, and the main board includes 2 FPGAs and 1 RapidIO switching chip; the photoelectric electro-optical conversion daughter card is connected with a high-speed GTH interface of 2 FPGA chips of the mainboard through 2 FMC connectors, the 2 FPGAs are connected to a RapidIO exchange chip through 1 path of 4x RapidIO, then the exchange chip provides 2 paths of 4x RapidIO bus interfaces to the outside, and the transmission rate is 2.5Gbps/3.1255Gbps/5Gbps configurable.

Referring to fig. 3, the DSP type signal processing module is mainly composed of 4 multi-core DSP chips and 1 RapidIO switch chip; the 4 DSPs are respectively connected to a RapidIO switching chip through 1 path of 4x RapidIO, and then the switching chip externally passes through a 2 path of 4x RapidIO interface, and the transmission rate is 2.5Gbps/3.1255Gbps/5Gbps configurable.

Referring to fig. 4, the RapidIO high-speed network switch module mainly comprises 6 RapidIO switch chips, the module provides 32-way 4x RapidIO interfaces to the outside, and the transmission rate is 2.5Gbps/3.1255Gbps/5Gbps configurable.

Referring to fig. 5, the system control module mainly comprises 1 PPC8548 and 1 Tsi578 switch chip, and provides a system-level JTAG scan capability through a JTAG timing TAP controller and a bridge chip meeting IEEE1149.1 specifications, and through a JTAG port, the system control module can directly access all chips having the JTAG port, and check the signal transmission quality between the chips and between the modules through the interconnection of a backplane, thereby realizing more comprehensive self-inspection and more accurate fault location; and 2 paths of 4x RapidIO ports, 2 paths of gigabit Ethernet ports and main and standby 2 paths of CAN control bus interfaces are provided externally.

Referring to fig. 6, a normal work flow block diagram of the aerospace electronic load super-large scale multifunctional integrated processing platform is shown, and the work flow is as follows:

step S1: the secondary power supply module receives an OC instruction to start a power supply and power up the system control module;

step S2: the system control module is electrified and self-checked, an embedded operating system is started, system management software is loaded, the state is actively reported through the Ethernet after the system control module is ready, and the system enters a standby state and waits for a task to be executed;

and step S3: the system control module receives a task configuration instruction and controls the secondary power supply module to power up a resource module required by a task, wherein the resource module comprises a RapidIO high-speed network switching module, an FPGA signal processing module, a DSP signal processing module, a real-time I/O and external interface module and the like;

and step S4: each resource module is electrified and self-checked, and self-checking results are reported to the system control module through the CAN bus;

step S5: the system control module sends dynamic loading instructions to each resource module through the CAN bus according to task requirements, and each resource module locally loads functional software corresponding to the task and feeds back a loading result;

step S6: after the functional software of each resource module is started, a network management program deployed in a system control module configures virtual channel links among the functional programs through a RapidIO switching network according to task functional thread topology, and feeds back link establishment results;

step S7: the functional software on each resource module completes the signal information processing process and the receiving and sending of the result according to the established virtual channel communication link, completes the signal information processing task of the function according to the task planning, and outputs the processing result to an external storage unit through the real-time I/O and external interface module;

step S8: and after the platform finishes executing the tasks, unloading the functional software of the resource modules corresponding to all the executed tasks, closing the corresponding resource modules, and returning to a standby state or a shutdown state.

Claims (9)

1. The utility model provides a multi-functional comprehensive processing platform of space flight electron load super large-scale which characterized in that includes: the system comprises a plurality of FPGA type signal processing modules, a plurality of DSP type signal processing modules, 2 RapidIO high-speed network switching modules, 2 state monitoring and recording modules, a plurality of DWDM wavelength division multiplexing/demultiplexing modules, a plurality of real-time I/O and external interface modules, 2 system control modules and a plurality of secondary power supply modules;

the DWDM wavelength division multiplexing/demultiplexing module is connected with the FPGA type signal processing module through a digital optical fiber, the FPGA type signal processing module is connected with each other through a high-speed digital optical fiber, and the FPGA type signal processing module, the DSP type signal processing module, the state monitoring and recording module, the real-time I/O and external interface module, the system control module and the secondary power supply module are connected with each other through a RapidIO high-speed network switching module to meet the transmission requirement of real-time signal processing service data; the system control module is interconnected with the FPGA type signal processing module, the DSP type signal processing module, the state monitoring and recording module, the real-time I/O and external interface module, the secondary power supply module and the RapidIO high-speed network switching module through a CAN bus to transmit monitoring instructions and module state information;

the 2 independent RapidIO network switching modules form a main switching module and a standby switching module, and when one communication link fails, effective transmission of data can still be ensured; the RapidIO network adopts a 4-channel mode, and the transmission rate is 2.5Gbps/3.1255Gbps/5Gbps configurable; the 4x RapidIO links which are backups of each other are respectively connected to the RapidIO master exchange module and the RapidIO standby exchange module, the 2 exchange modules are interconnected through one RapidIO 1x link and used for state detection and data transmission between the master exchange module and the RapidIO standby exchange module, and the 2 exchange modules have completely symmetrical topological structures and connection relations.

2. The aerospace electronic load very-large-scale multifunctional comprehensive processing platform according to claim 1, wherein the DWDM wavelength division multiplexing/demultiplexing module is configured to perform a wavelength division multiplexing/demultiplexing function on dozens of optical signals in 1550 bands, and after the optical signals are input to the module, the optical signals are demultiplexed into dozens of different optical signals, and then the optical signals are converted into electrical signals through photoelectric conversion for processing; the emitted electric signal is electro-optically converted, and dozens of paths of 1550 waveband optical signals with different wavelengths are multiplexed into one path of optical signal by the wavelength division multiplexer and then output to the outside of the platform.

3. The space electronic load very-large-scale multifunctional comprehensive processing platform according to claim 1, wherein the FPGA type signal processing module and the DSP type signal processing module are configured by software functions to realize functional program loading of different tasks and complete digital signal processing work; the FPGA module provides logic processing capability and is matched with the photoelectric/electro-optical conversion daughter card for use, and the photoelectric/electro-optical conversion daughter card mainly completes photoelectric and electro-optical conversion; the DSP module provides floating point processing capability for use in signal processing for computationally intensive functions.

4. The space electronic load very-large-scale multifunctional integrated processing platform according to claim 1, wherein the RapidIO high-speed network exchange module completes internal data interaction and external data transmission, and each processing module is connected to the RapidIO network module through a passive backboard and then is connected with other modules, so as to complete interconnection between any modules;

the state monitoring and recording module is a RapidIO high-speed network switching module with a DDR cache function, and the DDR cache is realized by inserting a DDR sub-card and is responsible for high-speed signal transmission cache between the FPGA module and the DSP module of the system;

the real-time I/O and external interface module is responsible for data interface interaction with external equipment and data interface interaction between platform extension cabinets, and comprises RapidIO network connection, CAN bus connection and discrete control line connection;

the expansion module is connected with the RapidIO network and can expand the function of a new task and improve the signal processing performance;

the direct current 100V input power passes through the energy storage unit and is output to the secondary power modules of the processing units, the input voltage of the secondary power modules is 100V, the output voltage of the secondary power modules is 28V, and the secondary power modules supply power to the modules in the units by 28V voltage;

the system control module is responsible for platform control, mainly comprises the functions of setting working parameters, configuring equipment links, monitoring the running state of equipment and deploying tasks for each module, and is also responsible for scheduling each module to execute self-checking, testing and dynamic loading processes; the system control and interface module is responsible for the bottom operation of the whole integrated platform and uniformly schedules the operation and management of the configuration unit; and carrying out data interaction with other platforms through a gigabit Ethernet interface.

5. The space flight electronic load ultra-large scale multifunctional integrated processing platform according to claim 1, characterized in that the FPGA type signal processing module adopts a standardized design of an FMC photoelectric electro-optical conversion daughter card and a signal processing main board, the photoelectric electro-optical conversion daughter card is connected with the signal processing main board through an FMC interface, the photoelectric electro-optical conversion daughter card is connected with a high-speed GTH interface of 2 FPGA chips of the signal processing main board through 2 FMC connectors, the 2 FPGAs is connected to a RapidIO high-speed network switching module through 1 path of 4x RapidIO, and the RapidIO high-speed network switching module provides a 2 path of 4x RapidIO bus interface to the outside, and the transmission rate is configurable to 2.5Gbps/3.1255Gbps/5 Gbps.

6. The space electronic load ultra-large scale multifunctional integrated processing platform according to claim 1, wherein the DSP type signal processing module mainly comprises 4 multi-core DSP chips and 1 RapidIO switching chip; the 4 DSP chips are respectively connected to a RapidIO switching chip through 1 path of 4x RapidIO, and then the switching chip externally passes through 2 paths of 4x RapidIO interfaces, and the transmission rate is 2.5Gbps/3.1255Gbps/5Gbps configurable.

7. The aerospace electronic load very-large-scale multifunctional comprehensive processing platform according to claim 1, wherein the RapidIO high-speed network switch module mainly comprises 6 RapidIO switch chips, the module provides 32-path 4x RapidIO interfaces to the outside, and the transmission rate is 2.5Gbps/3.1255Gbps/5Gbps configurable.

8. The space flight electronic load very large scale multifunctional integrated processing platform according to claim 1, characterized in that the system control module mainly comprises 1 PPC8548 and 1 Tsi578 switch chip, system level JTAG scanning capability is provided by JTAG time sequence TAP controller and bridge chip meeting IEEE1149.1 standard, through JTAG port, the system control module can directly access all chips with JTAG port, and check signal transmission quality of interconnection between chips and modules through backboard, so as to realize more comprehensive self-checking and more accurate fault location; and 2 paths of 4x RapidIO ports, 2 paths of gigabit Ethernet ports and main and standby 2 paths of CAN control bus interfaces are provided externally.

9. The space electronic load very-large-scale multifunctional comprehensive processing platform according to claim 1, characterized in that the working process of the platform is as follows:

step S1: the secondary power supply module receives an OC instruction to start a power supply and power up the system control module;

step S2: the system control module is electrified and self-checked, an embedded operating system is started, system management software is loaded, the state is actively reported through the Ethernet after the system control module is ready, and the system enters a standby state and waits for a task to be executed;

and step S3: the system control module receives the task configuration instruction and controls the secondary power supply module to power up the resource module required by the task, and the system control module comprises a RapidIO high-speed network switching module, an FPGA signal processing module, a DSP signal processing module, a real-time I/O module and an external interface module;

and step S4: each resource module is electrified and self-checked, and self-checking results are reported to the system control module through the CAN bus;

step S5: the system control module sends dynamic loading instructions to each resource module through the CAN bus according to task requirements, and each resource module locally loads functional software corresponding to the task and feeds back a loading result;

step S6: after the functional software of each resource module is started, a network management program deployed in a system control module configures virtual channel links among the functional programs through a RapidIO switching network according to task functional thread topology, and feeds back link establishment results;

step S7: the functional software on each resource module completes the signal information processing process and the receiving and sending of the result according to the established virtual channel communication link, completes the signal information processing task of the function according to the task planning, and outputs the processing result to an external storage unit through the real-time I/O and external interface module;

step S8: and after the platform finishes executing the tasks, unloading the functional software of the resource modules corresponding to all the executed tasks, closing the corresponding resource modules, and returning to a standby state or a shutdown state.

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