CN114697321A - Distributed comprehensive reconfigurable electronic system platform architecture - Google Patents
Distributed comprehensive reconfigurable electronic system platform architecture Download PDFInfo
- Publication number
- CN114697321A CN114697321A CN202210032686.7A CN202210032686A CN114697321A CN 114697321 A CN114697321 A CN 114697321A CN 202210032686 A CN202210032686 A CN 202210032686A CN 114697321 A CN114697321 A CN 114697321A
- Authority
- CN
- China
- Prior art keywords
- data
- network
- processing
- module
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/01—Protocols
- H04L67/10—Protocols in which an application is distributed across nodes in the network
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
- G06F15/17306—Intercommunication techniques
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/01—Protocols
- H04L67/12—Protocols specially adapted for proprietary or special-purpose networking environments, e.g. medical networks, sensor networks, networks in vehicles or remote metering networks
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/08—Protocols for interworking; Protocol conversion
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/22—Parsing or analysis of headers
Abstract
The distributed comprehensive reconfigurable electronic system platform architecture disclosed by the invention has the characteristics of high safety, reconfigurability and capability of growing. The invention is realized by the following technical scheme: each minimum particle unit is combined with a cross grouping switch device and is organized together through a plurality of point-to-point communication links, so that any interconnection and concurrent transmission among all chips or modules are realized; wired/wireless network communication is carried out between the core node unit and each minimum particle unit based on TTE Ethernet protocol to form the minimum particle unit and the core node unit, information interaction and resource sharing are realized through the wired/wireless communication units on the respective network exchange modules, and an open type cross switch network SwitchFabric integrated electronic integrated system is formed; the core node unit is used as a control center of the integrated electronic system platform, dynamically loads service reconstruction according to the task instruction of the upper computer, and performs network communication and data distribution based on the open functional application service interface.
Description
Technical Field
The invention relates to a distributed comprehensive reconfigurable electronic system platform architecture which is mainly used in the fields of aerospace, aviation and communication and is suitable for resource reconfiguration.
Background
Integrated electronic systems originated in the aviation industry first. The integrated electronic system is a complete and universal multifunctional electronic system which organically combines electronic equipment of different types, different models, different frequency bands and different purposes on a single or a plurality of platforms. The method is characterized in that the whole system is logically divided into a plurality of nodes, and each node can access local memory resources and also can access remote memory resources. Although the comprehensive design of the comprehensive electronic system, the comprehensive utilization of information resources and the comprehensive management and control of electronic resources are outstanding, the comprehensive integration of various electronic functions is realized, and electronic information can be provided for equipment which moves and is static on the ground. Its system connectivity is optimized through modular, open architecture design and industry standard interfaces. But access to local memory resources is much faster than remote memory resources. The distributed integrated electronic system architecture provides a set of function situational awareness and post analysis equipment for collecting more data in real time through being connected with a signal/data recorder, a direction finder and a radio, realizes the tight coupling on the physics (high integration of hardware composition) in the multi-module integration process, and simultaneously can keep the loose coupling on the logic (high flexibility of software architecture), and performs the integrated integration on the module level. At present, system equipment is limited by installed elements or function division, and when a single case cannot complete integration of all functional items of a system, a simple application of a module-based system integration method has certain limitation.
With the continuous maturity of the aviation integrated electronic system technology, each aerospace company introduces the technology into the design and development of a satellite platform to form a satellite integrated electronic system. The satellite integrated electronic system is a system for collecting, processing, distributing and storing information of an integrated electronic system, and is a system for integrating information and functions of a complex aerospace electronic system with high density under the condition of severe space limitation. The microsatellite integrated electronic system bears most functions of the satellite, is a center for processing and controlling tasks of the satellite, and can meet the requirements of new intelligent application, constellation application, communication service and the like in the future by the satellite, thereby providing new requirements for the integrated electronic system. The typical small satellite integrated electronic system has the characteristics of high function integration degree, most functions integrated in one computer and satellite function software. The integrated structure of the integrated electronic system based on software definition is designed, the hardware adopts highly integrated modular design, the software adopts layered and componentized design, the system functions are layered, and the functions and services of each layer are realized by defining components through the software. The high-function-density integrated electronic system is composed of a generalized high-performance hardware platform and various loadable APP software, and can expand functions such as autonomous task management, inter-satellite networking, load management and the like besides traditional functions, so that the integration level and the function density of a satellite are greatly improved, the function reconstruction of the satellite can be realized, the purposes of one-satellite-multiple-use and one-satellite-multiple-function are achieved, and the rapid construction and application of the satellite system in an emergency period are facilitated. At present, a unified platform does not exist in a microsatellite integrated electronic system, the system is diversified, and the integration level and the standardization are not enough, so that the software development is challenged, and the application and the popularization of the integrated electronic system are not facilitated. With the increasing demands for flight application capability, quality and efficiency, the expansion of avionics system functions, information organization and environment composition become increasingly complex. Avionics systems are typically a complex system integrating applications, processing, and capabilities in the face of complex flight application organizations, system functional organizations, and equipment resource organizations. For such complex systems, modern avionics systems must employ a system that is a comprehensive integration of architecture, capabilities, and management that targets applications, capabilities, devices, objects, processes, and practices. The traditional method for directly coupling the operation requirements, conditions, processing and results of an avionics system cannot meet the requirements of comprehensive optimization of the goals, environment, capacity, efficiency, effect and effectiveness of a complex system. Because the avionics system has the background of complex environment, multitask and multiple targets, numerous elements, complex relationships and different weight organizations exist, and resources with different types, different capabilities and different performances are organized by adopting a plurality of treatments of different specialties, different technologies and different methods. A single system organization, process and management approach cannot meet and achieve system organizational performance, efficiency and efficiency capabilities. Currently, the research on the avionics system integrated technology mainly stays on the basis of organization and composition of the traditional avionics system. The method is mainly characterized in that the method is oriented to an organization mode of an independent avionics system, such as an organization structure of each independent avionics subsystem; oriented to independent avionics system functional modes, such as independent functional capabilities provided by each avionics subsystem; the method is formed by facing to independent avionic system resources, such as each independent avionic subsystem resource platform or IMA general processing platform; the integration of independent applications, capabilities and equipment of the avionics system is achieved. The application organization, the function processing and the resource operation of the independent system are comprehensively integrated only by considering local conditions and factors, the comprehensive capacity of the system is greatly limited, the benefit of the system integration is directly influenced, and the problem of the system integration and the benefit analysis and evaluation are also limited. At present, satellite ground station equipment systems in China are various and show the situation of self-formation system and strip block division. As the power consumption density increases with the increase of the scale of the integrated circuit, the gap between the speed of the processor and the speed of the memory increases, and the delay of the memory limits the development of the performance of the computer with a comprehensive system. Since the single processor is limited by the controlling computing unit and amdahl's law states that instruction level parallelism depends on the degree of parallelism that the program can perform, an integrated electronic system consisting of several independent nodes connected by a high-speed private network cannot effectively increase the speed of the computer.
Disclosure of Invention
Aiming at the defects existing in the prior art, the invention provides a modularized, generalized, multitasked, high-safety, fully dynamic, reconfigurable, upgradable, expandable and growth-capable distributed comprehensive reconfigurable electronic system platform architecture.
The above object of the present invention can be achieved by the following measures: a distributed integrated reconfigurable electronic system platform architecture, comprising: minimum granule unit interconnected by wireless communication/wired communication and distributed around core node unit, characterized in that: each minimum particle unit is combined with a cross grouping switch device and is organized together through a plurality of point-to-point communication links, so that any interconnection and concurrent transmission among all chips or modules are realized; wired/wireless network communication is carried out between each core node unit and the minimum particle unit based on a TTE (time to live) Ethernet protocol, an equipment set which is formed by the minimum particle unit and the core node units, realizes information interaction and resource sharing through wired/wireless communication units on respective network exchange modules, realizes wireless transmission power supply of a power supply through respective power supply modules, and forms an open type cross switch network SwitchFabric integrated electronic integrated system through a high-speed serial bus and chip-level interconnection standardized modules; the minimum particle unit completes radar pulse compression, target detection, real-time imaging, electroscope signal detection, parameter measurement, signal sorting, signal pairing, modulation identification, communication signal waveform demodulation, coding/decoding, protocol processing, interference suppression, frequency hopping synchronization, spread spectrum despreading, measurement parameter processing and deblurring and signal processing work of various functional applications, completes multi-source information fusion processing by loading a data processing program and data processing of a typical target identification information layer by combining a signal processing result and other source detection information, obtains a data result required by each functional application operation, and forwards a service data stream to the core node unit; the core node unit is used as a control center of the integrated electronic system platform, detects and manages software and hardware resources of the system according to upper computer task instructions and oriented to test and application tasks, dynamically loads service reconstruction, and realizes resource management, network management, external interaction, waveform loading, interface adaptation, control information interaction and bus exchange of the whole platform; based on the open functional application service interface of the high-speed interconnection network, a gigabit network, a RS422 interface and a 1553B interface are provided for the outside to carry out network communication and data distribution.
Compared with the prior art, the invention has the following beneficial effects:
the invention is based on the open, expandable hardware architecture of the high-speed interconnection network, form the open comprehensive electronic integrated system through technology such as standardized module, high-speed serial bus, chip-level interconnection, SwitchFabric network management, etc., the architecture can be based on general standard module, open system architecture and integrate multiple missile-borne terminal functions in a apparatus according to the system in the hardware and software architecture, the multiple functions of the apparatus can be reconstructed as required, expand flexibly, thus reduce the apparatus quantity of the measurement system, reduce the volume, weight, power consumption, etc. of the apparatus, improve the reliability of the system. The hardware system structure system based on the interconnection of the 'SwitchFabric' network (RapidIO + TTEthernet) avoids the defects of limited system bus bandwidth, tight coupling between application function and function, mutual competition, uncertain system response time, low reliability and low expansibility when the traditional parallel buses such as VEM or PCI and the like construct a system. Meanwhile, each core node unit and the minimum particle unit of the system communicate with each other through a wired/wireless network based on a TTE Ethernet protocol to realize data transmission and resource sharing, so that each device in a system device set is separated in a physical position but logically forms a whole, each subsystem can independently or mutually cooperate to complete a certain task, and the system can meet the task requirements of different scales by additionally arranging a plurality of core node units and minimum particle units. Through remote calling cooperative work, any interconnection and concurrent transmission among all chips or modules can be realized, and the system bandwidth is multiplied. By means of a network virtual and SDN technical system, entity resources are sliced and separated from multiple dimensions such as frequency, storage and calculation, fine optimized use of single resources and cooperative optimized scheduling of cluster resources are achieved, and utilization efficiency of limited ground station resources is remarkably improved.
The invention adopts a building block type structure approach to replace the traditional single integrated electronic equipment with the minimum particle unit set based on wired/wireless connection, thereby reducing the complexity of the design of a large-scale integrated electronic system. Each particle can support the capabilities of instruction and control, data processing, signal processing and the like, and meanwhile, some particles can also duplicate the functions of other particles, and each particle is structurally independent but can realize the sharing and distribution processing of data resources through a high-speed switching network so as to complete the tasks born by large-scale monomer integrated electronic equipment. The new generation of integrated electronic system disperses each function task to each 'separated' small-sized particle and has scalable and modifiable fault-tolerant distributed computing capability, thereby having the characteristics of light weight, high reliability, flexibility, self-adaptation and the like and meeting the development requirements of large-scale complex integrated electronic systems. On one hand, with the continuous improvement of the generalization, reusability and reconfigurable capability of system hardware modules, the volume, the quality and the power consumption of the system are greatly reduced, and the reliability and the usability of the system are obviously improved; on the other hand, with the establishment of a unified digital network, the system can be expanded and can grow into an open system architecture, the technical performance indexes of the system are greatly improved, and the cost of the whole life cycle of the system is obviously reduced.
The invention supports communication waveforms of different systems, different standards and different systems and supports the expansion of waveform application and the modularization, generalization, multitasking, high safety, full dynamic, reconfigurable, upgradable, expandable and growth of the transplanted new generation of integrated electronic system platform through advanced design concepts and efficient design means. The platform can meet the requirements of the current planned test and task of the integrated electronic information application system, can also meet the requirements of new test tasks which are developed and continuously expanded in the future, and supports the rolling and iterative development of the integrated electronic information application system.
Drawings
FIG. 1 is a schematic diagram of the platform architecture of the distributed integrated reconfigurable electronic system of the present invention.
Fig. 2 is a schematic diagram of an embodiment of the planar architecture of an integrated electronic system of fig. 1.
Detailed Description
See fig. 1. In an exemplary preferred embodiment described below, a distributed integrated reconfigurable electronic system platform architecture includes: and the minimum particle unit is interconnected through wireless communication/wired communication and distributed around the core node unit. Each minimum particle unit is combined with a cross grouping switch device and is organized together through a plurality of point-to-point communication links, so that any interconnection and concurrent transmission among all chips or modules are realized; wired/wireless network communication is carried out between each core node unit and the minimum particle unit based on a TTE (time to live) Ethernet protocol, an equipment set which is formed by the minimum particle unit and the core node units, realizes information interaction and resource sharing through wired/wireless communication units on respective network exchange modules, realizes wireless transmission power supply of a power supply through respective power supply modules, and forms an open type cross switch network SwitchFabric integrated electronic integrated system through a high-speed serial bus and chip-level interconnection standardized modules; the minimum particle unit completes radar pulse compression, target detection, real-time imaging, electroscope signal detection, parameter measurement, signal sorting, signal pairing, modulation identification, communication signal waveform demodulation, coding/decoding, protocol processing, interference suppression, frequency hopping synchronization, spread spectrum despreading, measurement parameter processing and deblurring and signal processing work of various functional applications, completes multi-source information fusion processing by loading a data processing program and data processing of a typical target identification information layer by combining a signal processing result and other source detection information, obtains a data result required by each functional application operation, and forwards a service data stream to the core node unit; the core node unit is used as a control center of the integrated electronic system platform, detects and manages software and hardware resources of the system according to upper computer task instructions and oriented to test and application tasks, dynamically loads service reconstruction, and realizes resource management, network management, external interaction, waveform loading, interface adaptation, control information interaction and bus exchange of the whole platform; based on the open functional application service interface of the high-speed interconnection network, a gigabit network, a RS422 interface and a 1553B interface are provided for the outside to carry out network communication and data distribution.
In an optional embodiment, the distributed integrated electronic system platform comprises an equipment set composed of a plurality of core node units and a plurality of minimum particle units, wherein the minimum particle units complete signal processing of various functional applications such as radar pulse compression, target detection, real-time imaging, electroscope signal detection, parameter measurement, signal sorting, signal pairing, modulation identification, communication signal waveform demodulation, coding/decoding, protocol processing, interference suppression, frequency hopping synchronization, spread spectrum despreading, measurement parameter processing and ambiguity resolution, and the minimum particle units complete data processing of information levels such as multi-source information fusion processing and typical target identification by loading a data processing program and obtaining data results required by running of various functional applications.
In addition to the high-speed backplane and chassis and structural accessories, 5 standard modules are placed in each bay of the core node chassis.
The digital case adopts a 5-slot frame. The slot generalization modules are defined as follows:
groove position 1: the channel module is used for finishing the processing of down-conversion, amplification and the like of the signal;
and (4) groove position 2: the data storage and forwarding module is used for finishing the storage and forwarding of the service data and the like and providing a gigabit network interface to the outside;
a system control module which completes the control of the whole system platform and mainly comprises the steps of setting working parameters for each module, carrying out equipment configuration, monitoring the running state of equipment and task configuration, and is responsible for dispatching each equipment of the system to carry out the work of self-checking, testing, dynamic loading and the like, managing and monitoring the network in real time, capturing and recording the key information of the network, the bus and the wired/wireless communication network in the case and the like;
and (4) groove position: and the network switching module is used for finishing internal data interaction and external data transmission. The RapidIO data exchange between modules in the equipment is realized through a RapidIO exchange chip on the module, and the data interaction between the equipment is realized through a wired/wireless communication unit on the module;
and (5) groove position: and the power supply module is used for supplying power to the equipment.
See fig. 2. The core node unit includes: the core node unit comprises a channel module for transmitting data through TTE Ethernet, a data storage and forwarding module, a node network switching module, a system control module and a power supply module for providing power supply, wherein data exchange and sharing are realized among all modules of the core node unit through the TTE Ethernet and a control bus RapidIO high-speed switching network, and data are sent through a functional application service interface.
The channel module divides the received signals into unipolar codes and bipolar codes according to frequency scale signals and B codes received by a control bus and signal synchronization signals between a transmitting end and a receiving end, the unipolar codes use a level, positive or negative voltage represents data, positive level represents '1', zero level represents '0', in return-to-zero RZ coding, the positive level represents logic 1, the negative level represents logic 0, clock signals are self-synchronized by return-to-zero coding, a receiver regenerates synchronization signals from the received data through sampling recovery at the same speed as a transmitter, a wireless channel control algorithm is adopted to simulate a multi-channel environment under the Ethernet environment to simulate a communication environment of a wireless self-organizing network node to send signals, and after the channel module finishes up-down frequency conversion and amplification processing of the signals, and the signal data flows to the data storage and forwarding module through TTE Ethernet in the equipment.
The data storage and forwarding module acquires data transmission and large-capacity storage in a system, stores large-capacity data into the pc in real time, adopts parallel data transmission, and realizes data transmission in an SPI mode through software coding, including a serial clock. Data input and output, data storage, replacement and forwarding are completed while data receiving and sending are carried out, stored data from an internal bus interface are sent to an internal bus interface of a corresponding node network switching module, data transmission and node real-time control are carried out among networks, data storage and forwarding system control modules are used for realizing data interaction and resource management, network management, external interaction, waveform loading, interface adaptation and control information interaction of the whole platform through a TTE Ethernet and a RapidIO network, and the data are switched to the node network switching module through a bus.
The wired/wireless communication unit in the node network switching module receives the signal service data stream and the equipment state information transmitted by each minimum particle unit, disassembles the network into network branches, divides the network data stream, isolates faults occurring in the branches, and logically divides the actual LAN infrastructure into a plurality of subnets, completes the confirmation of the input information stream by an Ethernet switch, then classifies the information stream and distributes corresponding priority, and the forwarding is realized according to the priority.
The node network switching module verifies the address information of the data packet header through a data link layer to determine whether the data packet is received or not, searches an address comparison table in a memory, determines which port a network card (NIC) of a hardware address (MAC) of a target network card is hung on, quickly transmits a data packet to the target port through an internal switching matrix, broadcasts the data packet to all ports if the target MAC does not exist, and learns a new address by an Ethernet switch after the response of the receiving port and adds the new address into the internal MAC address table. The data information flow of each network branch is reduced, so that each network is more effective, and the efficiency of the whole network is improved. Through the filtering and forwarding of the switch, the collision domain can be effectively reduced. Therefore, the method can overcome the defects that the traditional point-to-multipoint communication mode wastes bandwidth, is easy to generate delay and congestion, and even generates some useless broadcast messages to bring negative influence on the system performance.
The node network exchange module calculates the command related to the node signaling and the exchange data, the related information of each slot position module can be inquired and set through the commands, a channel is established in the exchange network according to the outgoing line address according to the requirements of different exchange modes, an available channel passing through a plurality of exchange units is established in the exchange network, the information flow needing to be exchanged flows from the incoming line to the outgoing line along the established channel, the wired/wireless communication unit in the exchange network exchange module receives the signal service data flow and the equipment state information transmitted by each minimum particle unit, and the signal service data flow and the equipment state information are forwarded to each minimum particle unit through the TTE Ethernet.
Each minimum particle unit comprises: the system comprises a signal preprocessing module, a data processing/control module, a particle network switching module and a power supply module, wherein the signal preprocessing module is connected with the signal processing module through an optical fiber, and the data processing/control module transmits data through a TTE Ethernet and a RapidIO network; the core node unit processes signal data to be processed through TTE Ethernet in the equipment, flows to a signal preprocessing module through a RapidIO network for preprocessing, purification processing and extraction of metadata information of network pages, and is sent to the signal processing module through an optical fiber after AD sampling, serial-parallel conversion and other processing for digital baseband signal processing, signal waveform generation, digital beam forming, signal waveform modulation/demodulation of baseband digital signals with various task functions are completed, down conversion, protocol analysis, protocol conversion, PDXP code conversion operation, framing processing, data distribution and application processing of service data are completed through data processing/control module coding/decoding, down conversion, protocol analysis, protocol conversion, PDXP code conversion operation, framing processing, data distribution and application processing of the service data, the service data flow is sent to a particle network switching module after spread spectrum/de-spread spectrum and interference suppression processing, the particle network switching module is completed through hardware to form a network bridge, and filtering is completed through software, The task of the learning and forwarding process is to forward the transmit data to all ports to the core node unit via the wired/wireless communication unit.
In an optional embodiment, 2 minimum particle units and 1 core node unit form a new generation integrated electronic system platform, and the modules of the minimum particle units realize data exchange and sharing with the core node unit through a RapidIO network, a TTE Ethernet and a control bus, so as to complete the signal processing task of 2 receiving and 2 sending.
The above detailed description of the embodiments of the present invention has been presented in terms of specific embodiments and is intended only to facilitate the understanding of the method and apparatus of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (10)
1. A distributed integrated reconfigurable electronic system platform architecture, comprising: minimum granule unit interconnected by wireless communication/wired communication and distributed around core node unit, characterized in that: each minimum particle unit is combined with a cross grouping switch device and is organized together through a plurality of point-to-point communication links, so that any interconnection and concurrent transmission among all chips or modules are realized; wired/wireless network communication is carried out between each core node unit and the minimum particle unit based on a TTE (time to live) Ethernet protocol, an equipment set which is formed by the minimum particle unit and the core node units, realizes information interaction and resource sharing through wired/wireless communication units on respective network exchange modules, realizes wireless transmission power supply of a power supply through respective power supply modules, and forms an open type cross switch network SwitchFabric integrated electronic integrated system through a high-speed serial bus and chip-level interconnection standardized modules; the minimum particle unit completes radar pulse compression, target detection, real-time imaging, electroscope signal detection, parameter measurement, signal sorting, signal pairing, modulation identification, communication signal waveform demodulation, coding/decoding, protocol processing, interference suppression, frequency hopping synchronization, spread spectrum despreading, measurement parameter processing and deblurring and signal processing work of various functional applications, completes multi-source information fusion processing by loading a data processing program and data processing of a typical target identification information layer by combining a signal processing result and other source detection information, obtains a data result required by each functional application operation, and forwards a service data stream to the core node unit; the core node unit is used as a control center of the integrated electronic system platform, detects and manages software and hardware resources of the system according to upper computer task instructions and oriented to test and application tasks, dynamically loads service reconstruction, and realizes resource management, network management, external interaction, waveform loading, interface adaptation, control information interaction and bus exchange of the whole platform; based on the open functional application service interface of the high-speed interconnection network, a gigabit network and RS422 and 1553B interfaces are provided for external use to perform network communication and data distribution.
2. The distributed integrated reconfigurable electronic system platform architecture of claim 1, wherein: the distributed integrated electronic system platform is composed of a plurality of core node units and a plurality of minimum particle units, wherein the minimum particle units complete signal processing of various functional applications such as radar pulse compression, target detection, real-time imaging, electrical detection signal detection, parameter measurement, signal sorting, signal pairing, modulation identification, communication signal waveform demodulation, coding/decoding, protocol processing, interference suppression, frequency hopping synchronization, spread spectrum despreading, measurement parameter processing and deblurring, and the minimum particle units complete data processing of information layers such as multi-source information fusion processing and typical target identification by combining signal processing results and other source detection information and loading data processing programs to obtain data results required by running of various functional applications.
3. The distributed integrated reconfigurable electronic system platform architecture of claim 1, wherein: the core node unit includes: the core node unit comprises a channel module for transmitting data through TTE Ethernet, a data storage and forwarding module, a node network switching module, a system control module and a power supply module for providing power supply, wherein data exchange and sharing are realized among all modules of the core node unit through the TTE Ethernet and a control bus RapidIO high-speed switching network, and data are sent through a functional application service interface.
4. The distributed integrated reconfigurable electronic system platform architecture of claim 2, wherein: the channel module divides the received signals into unipolar codes and bipolar codes according to frequency scale signals and B codes received by a control bus and signal synchronization signals between a transmitting end and a receiving end, the unipolar codes use a level, positive or negative voltage represents data, positive level represents '1', zero level represents '0', in return-to-zero RZ coding, the positive level represents logic 1, the negative level represents logic 0, clock signals are self-synchronized by return-to-zero coding, a receiver regenerates synchronization signals from the received data through sampling recovery at the same speed as a transmitter, a wireless channel control algorithm is adopted to simulate a multi-channel environment under the Ethernet environment to simulate a communication environment of a wireless self-organizing network node to send signals, and after the channel module finishes up-down frequency conversion and amplification processing of the signals, the signal data flows to the data store-and-forward module through the TTE ethernet within the device.
5. The distributed integrated reconfigurable electronic system platform architecture of claim 3, wherein: the data storage and forwarding module acquires data transmission and large-capacity storage in a system, the large-capacity data is stored in a pc in real time, parallel data transmission is adopted, SPI mode data transmission is realized through software coding, data input and data output are included, data storage, replacement and forwarding are completed while data receiving and sending are carried out, the stored data from an internal bus interface is sent to an internal bus interface of a corresponding node network switching module, node real-time data transmission and node real-time data control between networks are carried out, and data storage and forwarding system control modules are controlled through a TTE Ethernet and a RapidIO network, so that data interaction, resource management of the whole platform, network management, external interaction, waveform loading, interface adaptation and control information interaction are realized, and the data are exchanged into the node network switching module through a bus.
6. The distributed integrated reconfigurable electronic system platform architecture of claim 2, wherein: the wired/wireless communication unit in the node network switching module receives the signal service data stream and the equipment state information transmitted by each minimum particle unit, disassembles the network into network branches, divides the network data stream, isolates faults occurring in the branches, and logically divides the actual LAN infrastructure into a plurality of subnets, completes the confirmation of the input information stream by an Ethernet switch, then classifies the information stream and distributes corresponding priority, and the forwarding is realized according to the priority.
7. The distributed integrated reconfigurable electronic system platform architecture of claim 1, wherein: the node network switching module verifies the address information of the data packet header through a data link layer to determine whether the data packet is received or not, searches an address comparison table in a memory, determines which port a network card (NIC) of a hardware address (MAC) of a target network card is hung on, quickly transmits a data packet to the target port through an internal switching matrix, broadcasts the data packet to all ports if the target MAC does not exist, and learns a new address by an Ethernet switch after the response of the receiving port and adds the new address into the internal MAC address table.
8. The distributed integrated reconfigurable electronic system platform architecture of claim 1, wherein: the node network switching module verifies the address information of the data packet header through a data link layer to determine whether the data packet is received or not, searches an address comparison table in a memory, determines which port a network card (NIC) of a hardware address (MAC) of a target network card is hung on, quickly transmits a data packet to the target port through an internal switching matrix, broadcasts the data packet to all ports if the target MAC does not exist, and learns a new address by an Ethernet switch after the response of the receiving port and adds the new address into the internal MAC address table.
9. The distributed integrated reconfigurable electronic system platform architecture of claim 1, wherein: the node network exchange module calculates the command related to the node signaling and the exchange data, the related information of each slot position module can be inquired and set through the commands, a channel is established in the exchange network according to the outgoing line address according to the requirements of different exchange modes, an available channel passing through a plurality of exchange units is established in the exchange network, the information flow needing to be exchanged flows from the incoming line to the outgoing line along the established channel, the wired/wireless communication unit in the exchange network exchange module receives the signal service data flow and the equipment state information transmitted by each minimum particle unit, and the signal service data flow and the equipment state information are forwarded to each minimum particle unit through the TTE Ethernet.
10. The distributed integrated reconfigurable electronic system platform architecture of claim 1, wherein: each minimum particle unit includes: the system comprises a signal preprocessing module, a data processing/control module, a particle network switching module and a power supply module, wherein the signal preprocessing module is connected with the signal processing module through an optical fiber, and the data processing/control module transmits data through a TTE Ethernet and a RapidIO network; the core node unit processes signal data to be processed through TTE Ethernet in the equipment, flows to a signal preprocessing module through a RapidIO network for preprocessing, purification processing and extraction of metadata information of network pages, and is sent to the signal processing module through an optical fiber after AD sampling, serial-parallel conversion and other processing for digital baseband signal processing, signal waveform generation, digital beam forming, signal waveform modulation/demodulation of baseband digital signals with various task functions are completed, down conversion, protocol analysis, protocol conversion, PDXP code conversion operation, framing processing, data distribution and application processing of service data are completed through data processing/control module coding/decoding, down conversion, protocol analysis, protocol conversion, PDXP code conversion operation, framing processing, data distribution and application processing of the service data, the service data flow is sent to a particle network switching module after spread spectrum/de-spread spectrum and interference suppression processing, the particle network switching module is completed through hardware to form a network bridge, and filtering is completed through software, The task of the learning and forwarding process is to forward the transmit data to all ports to the core node unit via the wired/wireless communication unit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210032686.7A CN114697321B (en) | 2022-01-12 | 2022-01-12 | Distributed comprehensive reconfigurable electronic system platform architecture |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210032686.7A CN114697321B (en) | 2022-01-12 | 2022-01-12 | Distributed comprehensive reconfigurable electronic system platform architecture |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114697321A true CN114697321A (en) | 2022-07-01 |
| CN114697321B CN114697321B (en) | 2023-05-12 |
Family
ID=82136691
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210032686.7A Active CN114697321B (en) | 2022-01-12 | 2022-01-12 | Distributed comprehensive reconfigurable electronic system platform architecture |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114697321B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115793551A (en) * | 2023-02-08 | 2023-03-14 | 中国电子科技集团公司第十研究所 | Space electronic load super-large scale multifunctional comprehensive processing platform |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104133734A (en) * | 2014-07-29 | 2014-11-05 | 中国航空无线电电子研究所 | Distributed integrated modular avionic system hybrid dynamic reconfiguration system and method |
| CN105549460A (en) * | 2016-03-10 | 2016-05-04 | 中国电子科技集团公司第十研究所 | Satellite-borne electronic equipment comprehensive management and control system |
| CN106919153A (en) * | 2017-01-12 | 2017-07-04 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Electronic equipment on satellite Integrated system management and control framework |
| CN107636626A (en) * | 2015-05-29 | 2018-01-26 | 高通股份有限公司 | Predictive for the conversion of MMU (MMU) prefetches |
| US20190052637A1 (en) * | 2017-08-10 | 2019-02-14 | Patroness, LLC | Secure systems architecture for integrated motorized mobile systems |
| CN110138440A (en) * | 2019-04-30 | 2019-08-16 | 中国空间技术研究院 | Space intelligent aircraft cloud side cooperative information processing framework |
| CN111464339A (en) * | 2020-03-19 | 2020-07-28 | 中国电子产品可靠性与环境试验研究所（（工业和信息化部电子第五研究所）（中国赛宝实验室）） | Heterogeneous industrial network interconnection method based on dynamic reconfiguration and universal wired communication module |
| CN112804121A (en) * | 2021-01-08 | 2021-05-14 | 中国商用飞机有限责任公司北京民用飞机技术研究中心 | TTE network transmission delay test system and method |
| CN214480655U (en) * | 2021-01-28 | 2021-10-22 | 杭州瓦良格智造有限公司 | Embedded equipment compatible with definable deterministic communication Ethernet |
-
2022
- 2022-01-12 CN CN202210032686.7A patent/CN114697321B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104133734A (en) * | 2014-07-29 | 2014-11-05 | 中国航空无线电电子研究所 | Distributed integrated modular avionic system hybrid dynamic reconfiguration system and method |
| CN107636626A (en) * | 2015-05-29 | 2018-01-26 | 高通股份有限公司 | Predictive for the conversion of MMU (MMU) prefetches |
| CN105549460A (en) * | 2016-03-10 | 2016-05-04 | 中国电子科技集团公司第十研究所 | Satellite-borne electronic equipment comprehensive management and control system |
| CN106919153A (en) * | 2017-01-12 | 2017-07-04 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Electronic equipment on satellite Integrated system management and control framework |
| US20190052637A1 (en) * | 2017-08-10 | 2019-02-14 | Patroness, LLC | Secure systems architecture for integrated motorized mobile systems |
| CN110138440A (en) * | 2019-04-30 | 2019-08-16 | 中国空间技术研究院 | Space intelligent aircraft cloud side cooperative information processing framework |
| CN111464339A (en) * | 2020-03-19 | 2020-07-28 | 中国电子产品可靠性与环境试验研究所（（工业和信息化部电子第五研究所）（中国赛宝实验室）） | Heterogeneous industrial network interconnection method based on dynamic reconfiguration and universal wired communication module |
| CN112804121A (en) * | 2021-01-08 | 2021-05-14 | 中国商用飞机有限责任公司北京民用飞机技术研究中心 | TTE network transmission delay test system and method |
| CN214480655U (en) * | 2021-01-28 | 2021-10-22 | 杭州瓦良格智造有限公司 | Embedded equipment compatible with definable deterministic communication Ethernet |
Non-Patent Citations (3)
| Title |
|---|
| E ANDROULAKI,A BARGER,V BORTNIKOV,C CACHIN: "Hyperledger fabric:a distributed operating system for permissioned blockchains" * |
| 刘伟伟;程博文;汪路元;于敏芳;: "一种分布式航天器综合电子系统设计" * |
| 杨军祥;韩强;王纯委;杨涛;: "基于TTFC网络的分布式综合化处理系统平台研究" * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115793551A (en) * | 2023-02-08 | 2023-03-14 | 中国电子科技集团公司第十研究所 | Space electronic load super-large scale multifunctional comprehensive processing platform |
| CN115793551B (en) * | 2023-02-08 | 2023-06-02 | 中国电子科技集团公司第十研究所 | Ultra-large-scale multifunctional comprehensive processing platform for space electronic load |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114697321B (en) | 2023-05-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN112929077B (en) | Satellite data fusion processing information system and method | |
| CN105549460A (en) | Satellite-borne electronic equipment comprehensive management and control system | |
| CN104618207B (en) | The FC-AE-1553 network systems and exchange method of a kind of heterogeneous | |
| CN105786620A (en) | Integrated reconfigurable summarized information processing loading system | |
| CN114696468B (en) | Digital power distribution network edge calculation control device and method | |
| CN110928694B (en) | Computer system | |
| CN106375480A (en) | Electric energy data real-time acquisition system and method based on distributed system | |
| CN114697321A (en) | Distributed comprehensive reconfigurable electronic system platform architecture | |
| CN104133795A (en) | Multi-channel high-speed synchronous sampling and quadrature modulation system | |
| CN103973489A (en) | Centralized monitoring system for heterogeneous devices | |
| CN111865551B (en) | Device and method for coordinated management of multistage system based on fast bus | |
| CN114861379A (en) | Military training system based on LVC simulation | |
| CN105049110A (en) | Distributed microsatellite group management system | |
| Wang et al. | Design and implementation of FC-AE-ASM data acquisition and forwarding system | |
| CN111010419A (en) | Ubiquitous electric field data acquisition system and method | |
| CN203882182U (en) | PCM and Ethernet mixed structure-based real-time data configuration loading system | |
| CN114189832A (en) | Train wireless intelligent gateway system, data processing method and gateway | |
| CN110069430B (en) | Data acquisition system of chrysanthemum chain structure and self-adaptive transmission method | |
| CN114448493A (en) | Satellite integrated data interaction system | |
| CN115426026B (en) | Intensive ground measurement and control test system suitable for satellite constellation parallel test | |
| CN215990842U (en) | Data network system based on TTE bus and EtherCAT bus | |
| CN113300756B (en) | Interstar link mesh routing system based on CCSDS specification | |
| Chi et al. | Overview of fractionated spacecraft technology | |
| Mingnuan et al. | The Resource Dynamic Recombination and Its Technology Development of Space TT&C Equipment | |
| Wang et al. | Design of distributed heterogeneous general signal processing platform architecture |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |