CN114448493A - Satellite integrated data interaction system - Google Patents
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Abstract
The application discloses satellite integration data interaction system, this system includes: the system comprises a high-speed data interaction architecture, a medium-speed data interaction architecture and a low-speed data interaction architecture, wherein the high-speed data interaction architecture comprises at least one computing node, a first switch and at least one first device so as to realize high-speed data interaction between the computing node and the first device; the medium-speed data interaction architecture comprises a first switch, a second switch and at least one second device, so as to realize medium-speed data interaction between the first device and the second device; the medium-speed data interaction architecture comprises at least one computing node and at least one third device, so that low-speed data interaction between the computing node and the third device is realized through a 1553B bus. The data transmission method and the data transmission device solve the technical problem that data transmission capacity is insufficient in the prior art.
Description
Technical Field
The application relates to the technical field of spacecraft communication, in particular to a satellite integrated data interaction system.
Background
With the rapid development of spacecraft communication technology, satellite communication is widely applied to various fields due to the advantages of large communication range, high reliability, multiple access and the like, and the types and functions of satellites are more and more abundant. For different functions and requirements, the satellite is provided with various types of loads and computing nodes, for example, the loads include satellite sensitivity, ground sensitivity, image processing equipment, data processing equipment and the like, and the computing nodes include intelligent computing nodes, logic computing nodes, digital signal processing computing nodes and the like. In order to realize data processing and information transmission, data interaction is carried out between a load in the satellite and a computing node.
At present, in order to realize data interaction between the loads and the computing nodes, the computing nodes and the loads in the satellite can be connected through a 1553B bus or an SWP bus, but the data transmission rate of the SWP bus does not exceed 200Mbit/s at most because the 1553B bus is suitable for low-speed data transmission (1 Mbit/s). In the future, with the increase of the demand for intelligent processing of satellites, high-speed information exchange between loads and computing nodes is required, and the speed of the exchange is as high as several Gbits/s, even tens of Gbits/s, but the data transmission rate of the existing satellite communication system cannot meet the demand, so how to realize high-speed data transmission becomes an urgent problem to be solved.
Disclosure of Invention
The technical problem that this application was solved is: the method aims at the defect of insufficient data transmission capability in the prior art. According to the scheme provided by the embodiment of the application, a mode that a plurality of data interaction architectures including a high-speed data interaction architecture, a medium-speed data interaction architecture and a low-speed data interaction architecture coexist is adopted, on one hand, transmission of high-speed data is supported, so that the satellite system supports high-speed data transmission capacity, and the problem that the data interaction rate of the current satellite system is low is solved; on the other hand, the method supports the coexistence of various data transmission rates, provides access capability for other high-speed, medium-speed and low-speed buses, and improves the adaptability of the satellite system.
In a first aspect, an embodiment of the present application provides a satellite-integrated data interaction system, where the system includes: a high-speed data interaction architecture, a medium-speed data interaction architecture, and a low-speed data interaction architecture, wherein,
the high-speed data interaction architecture comprises at least one computing node, a first switch and at least one first device, wherein one end of the first switch is connected with the at least one computing node through a RapidIO bus, and the other end of the first switch is connected with the at least one first device through the RapidIO bus so as to realize high-speed data interaction between the computing node and the first device, wherein the first device is a device for transmitting data by using the RapidIO bus;
the medium-speed data interaction architecture comprises a first switch, a second switch and at least one second device, wherein one end of the second switch is connected with the at least one second device through an SWP bus, and the other end of the second switch is connected with the first switch so as to realize medium-speed data interaction between the first device and the second device, wherein the second device is a device for transmitting data by using the SWP bus;
the medium-speed data interaction architecture comprises at least one computing node and at least one third device, wherein each computing node is connected with at least one third device through a 1553B bus so as to realize low-speed data interaction between the computing node and the third device through the 1553B bus, and the third device is a remote terminal RT of the 1553B bus.
Optionally, the at least one first device comprises a device internal to the satellite for transmitting data using a RapidIO bus and/or a device external to the satellite for transmitting data using a RapidIO bus.
Optionally, the low-speed data interaction architecture further includes: at least one remote terminal RT of the CSB bus, the at least one remote terminal being connected to one or more second devices via the CSB bus.
Optionally, the at least one second device includes one or more primary remote terminals and one or more secondary remote terminals, where each primary remote terminal is directly connected to the second switch through an SWP bus, and each secondary remote terminal is connected to the primary remote terminal through an SWP bus.
Optionally, data interaction is performed between the first switch and the at least one first device, and between the first switch and each computing node through one or more RapidIO channels.
Optionally, the second switch and the at least one second device perform data interaction through one or more SWP channels.
Optionally, each computing node is specifically configured to:
acquiring low-speed data from at least one third device through a 1553B bus, or acquiring medium-speed data from at least one second device through an SWP bus, or acquiring high-speed data from at least one first device through a RapidIO bus;
processing the low-speed data, the medium-speed data or the high-speed data to obtain processed data, wherein the processed data comprises the processed low-speed data, the processed medium-speed data or the processed high-speed data;
sending the processed data low-speed data to at least one second device or at least one first device; or sending the processed medium-speed data to at least one first device or at least one third device; or transmitting the processed high-speed data to at least one first device or at least one second device.
Optionally, the processing the low-speed data, the medium-speed data, or the high-speed data to obtain processed data includes:
for the transmission between the medium-speed data interaction architecture and the high-speed data interaction architecture, carrying out protocol conversion on medium-speed data to obtain processed medium-speed data, or carrying out protocol conversion on high-speed data to obtain processed high-speed data, wherein the processed medium-speed data supports a RapidIO bus protocol, and the processed high-speed data supports an SWP bus protocol;
for the transmission from the low-speed data interaction architecture to the high-speed data interaction architecture, acquiring the transport layer protocol segment data in the low-speed data, encapsulating the transport layer protocol segment data into data in a VCDU format, and taking the encapsulated data as the processed low-speed data.
Optionally, the computing node is further configured to: selecting a channel for data interaction with each first device according to the states of one or more RapidIO channels;
and selecting a channel for data interaction with each second device according to the states of one or more SWP channels.
Optionally, if the processed low-speed data is sent to the at least one first device, the computing node is further configured to cache the processed low-speed data.
Compared with the prior art, the embodiment of the application has at least the following beneficial effects:
in the scheme provided by the embodiment of the application, a mode of coexistence of a plurality of data interaction architectures, namely a high-speed data interaction architecture, a medium-speed data interaction architecture and a low-speed data interaction architecture, is adopted, so that on one hand, transmission of high-speed data is supported, a satellite system supports high-speed data transmission capability, and the problem of low data interaction rate of the current satellite system is solved; on the other hand, the method supports the coexistence of various data transmission rates, provides access capability for other high-speed, medium-speed and low-speed buses, and improves the adaptability of the satellite system.
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Fig. 1 is a schematic structural diagram of a satellite-integrated data interaction system according to an embodiment of the present disclosure;
fig. 2 is a schematic diagram of data transmission between different data interaction architectures according to an embodiment of the present application;
fig. 3 is a schematic diagram of data mutual transmission in different data interaction architectures according to an embodiment of the present application.
Detailed Description
In the solutions provided in the embodiments of the present application, the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In order to better understand the technical solutions, the technical solutions of the present application are described in detail below with reference to the drawings and specific embodiments, and it should be understood that the specific features in the embodiments and examples of the present application are detailed descriptions of the technical solutions of the present application, and are not limitations of the technical solutions of the present application, and the technical features in the embodiments and examples of the present application may be combined with each other without conflict.
Referring to fig. 1, a schematic structural diagram of a satellite-integrated data interaction system provided in an embodiment of the present application is shown. In fig. 1 the system comprises: the data communication method comprises a high-speed data interaction architecture, a medium-speed data interaction architecture and a low-speed data interaction architecture, wherein the high-speed data interaction architecture comprises at least one computing node, a first switch and at least one first device, one end of the first switch is connected with the at least one computing node through a RapidIO bus, the other end of the first switch is connected with the at least one first device through the RapidIO bus, so that high-speed data interaction between the computing node and the first device is realized, and the first device is a device for transmitting data by using the RapidIO bus; the medium-speed data interaction architecture comprises a first switch, a second switch and at least one second device, wherein one end of the second switch is connected with the at least one second device through an SWP (space wire) bus, and the other end of the second switch is connected with the first switch so as to realize medium-speed data interaction between the first device and the second device, wherein the second device is a device for transmitting data by using the SWP bus; the medium-speed data interaction architecture comprises at least one computing node and at least one third device, wherein each computing node is connected with at least one third device through a 1553B bus so as to realize low-speed data interaction between the computing node and the third device through the 1553B bus, and the third device is a remote terminal RT of the 1553B bus.
Specifically, in the solution provided in the embodiment of the present application, each satellite includes one or more computing nodes, and the computing nodes include, but are not limited to, a Digital Signal Processing (DSP) computing unit, a cost computing unit, a Field Programmable Gate Array (FPGA) computing unit, a high reliability computing unit, and the like. Each computing node in the satellite can perform data interaction with other devices inside the satellite or with devices outside the satellite. Namely, the data interaction in the satellite comprises two layers: one layer is that the computing node performs data interaction with equipment inside the satellite, and the other layer is that the computing node performs data interaction with equipment outside the satellite. In the solution provided in the embodiment of the present application, in order to implement data interaction inside a satellite or between satellites, a data interaction system is divided into three domains according to a data transmission rate, where the three domains are a high-speed data interaction architecture, a medium-speed data interaction architecture, and a low-speed data interaction architecture, and the data transmission rate in the three architectures is, in order from high to low, a high-speed data interaction architecture, a medium-speed data interaction architecture, and a low-speed data interaction architecture, where the high-speed data interaction architecture supports a data transmission rate greater than 200Mbit/s, the medium-speed data interaction architecture supports a data transmission rate not greater than 200Mbit/s at most, and the low-speed data interaction architecture supports a data transmission rate of 1 Mbps. Each of the architectures will be briefly described below to facilitate understanding.
1. High-speed data interaction architecture
Specifically, in the scheme provided in the embodiment of the present application, the high-speed data interaction architecture is composed of at least one computing node, a first switch and at least one first device, where the first switch is an SRIO switch, that is, a switch supporting a RapidIO bus protocol.
Further, the high-speed data interaction architecture takes the SRIO switch as a core, and performs data interaction with a first device having high-speed data processing and transmission requirements, for example, the first device is an inter-satellite transceiver, a data transmission unit, and the like. In the high-speed data interaction process, the computing node in the high-speed data interaction architecture needs to process the received data, and simultaneously, the processed data is sent to equipment in other interaction architectures or different computing nodes connected with the computing node, so as to meet the requirements of heterogeneous computing. The computing nodes (such as processors) carried on the satellite can adopt the forms of SPARC/PowerPC/FPGA/ARM and the like.
Further, in a possible implementation, the at least one first device comprises a device for transmitting data inside the satellite using the RapidIO bus and/or a device for transmitting data outside the satellite using the RapidIO bus.
By way of example, in the scheme provided by the embodiment of the application, a high-speed data interaction architecture is constructed through two different expressions, namely an external bus and an internal bus. In addition, if equipment in other physical positions has high-speed data exchange requirements, the high-speed data exchange architecture can be accessed by increasing the number of the SRIO switches, namely the high-speed data exchange architecture has one or more SRIO switches and using a remote terminal connected with the SRIO switches.
Further, in a possible implementation manner, data interaction is performed between the first switch and the at least one first device, and between the first switch and each computing node through one or more RapidIO channels.
As an example, in order to guarantee data transmission between the first switch and the first device and between the first switch and the computing node, the device between the first switch and the at least one first device sets one or more RapidIO channels, for example, sets 8 RapidIO channels; one or more RapidIO channels are also provided between the first switch and each compute node, for example, 2 RapidIO channels are provided between the first switch and each compute node.
Further, in order to ensure data transmission between the first switch and the first equipment, the computing node also selects a channel for data interaction with each first equipment according to the states of one or more RapidIO channels connected with the first equipment.
2. Medium-speed data interaction architecture
Specifically, in the solution provided in the embodiment of the present application, the medium-speed data interaction architecture is composed of a first switch, a second switch, and at least one second device, where one end of the second switch is connected to the at least one second device through an SWP bus, and the other end of the second switch is connected to the first switch, so as to implement medium-speed data interaction between the first device and the second device, where the second device is a device that transmits data using the SWP bus. By way of example, the second switch is an SWP switch, i.e., the second switch is a switch supporting an SWP bus protocol, e.g., the SWP switch may use the RMAP protocol.
Furthermore, the medium-speed data interaction architecture takes the SPW switch as a core, one end of the SPW switch is connected with the SRIO switch by using an SRIO bus, the other end of the SPW switch is provided with a plurality of SPW interfaces, and the SPW interfaces are connected with at least one second device which is transmitted by the SPW bus on the satellite. In a high-performance integrated electronic system, a second device using the SPW bus accounts for a large proportion, and for example, the second device includes an integrated star sensor, an on-board image processing unit, and the like. In the medium-speed data interaction process, the computing node in the medium-speed data interaction architecture needs to process the received data, and simultaneously sends the processed data to devices or different computing nodes in other interaction architectures connected with the computing node, so as to meet the requirements of heterogeneous computing.
Further, in a possible implementation manner, the at least one second device includes one or more primary remote terminals and one or more secondary remote terminals, where each primary remote terminal is directly connected to the second switch through the SWP bus, and each secondary remote terminal is connected to the primary remote terminal through the SWP bus.
In the solution provided in the embodiment of the present application, in the medium-speed data interaction architecture, part of functions of the computing node, for example, analog quantity acquisition, direct instruction output, matrix instruction, telemetry, and the like, may also be accessed to the SPW network in the form of a remote terminal, and the computing node performs data processing and control. The SPW bus adopts an end-to-end transmission mode, and if the on-satellite access requirement is high, the SPW bus can be connected with the SPW switch in a multi-stage remote terminal mode so as to expand the number of access terminals. As an example, the multi-stage remote terminals include two-stage remote terminals, which are a first-stage remote terminal directly connected to the second switch through the SWP bus and a second-stage remote terminal connected to the first-stage remote terminal through the SWP bus.
Further, in a possible implementation manner, the second switch and the at least one second device perform data interaction through one or more SWP channels.
As an example, in order to ensure data transmission between the second switch and the second device, the device between the second switch and the at least one second device is provided with one or more SWP channels, for example, 3 SWP channels.
Further, in order to ensure data transmission between the second switches and the second devices, the computing node further selects a channel for data interaction with each second device according to the states of the one or more SWP channels.
3. Low-speed data interaction architecture
Specifically, in the solution provided in the embodiment of the present application, the medium-speed data interaction architecture includes at least one computing node and at least one third device, where each computing node is connected to at least one third device through a 1553B Bus, so as to implement low-speed data interaction between the computing node and the third device through the 1553B Bus, and the third device is a Bus Control terminal (BC).
Further, the low-speed data interaction architecture takes 1553B _ BC as a core. Since the 1553B bus is command-responsive and requires a BC port, 1553B _ BC is also integrated inside the satellite, one port is controlled by the compute node, and the other port is connected to the 1553B bus as the BC port. In addition, in the transmission process of the 1553B bus, equipment with low-speed data transmission requirements is taken as a Remote Terminal (RT) to be hung on the 1553B bus, and the Remote Terminal is a power supply controller, a load power distribution interface unit, a component health assessment instrument, a satellite-borne photoelectric processor, a mechanical parameter measuring instrument and the like.
Further, in the solution provided in the embodiment of the present application, the low-speed data interaction architecture further includes: at least one remote terminal RT of the CSB bus, the at least one remote terminal being connected to one or more second devices via the CSB bus.
In the solution provided in the embodiment of the present application, in the low-speed data interaction architecture, a remote terminal may also be used as a remote terminal BC in a 1553B bus, and the remote terminal may also be connected to a second device in the medium-speed data interaction architecture, so as to perform low-speed data acquisition and conversion on a load only having low-speed data transmission. By way of example, the remote terminal may be connected to the second device via a CSB bus.
For the convenience of understanding, the functions of the computing nodes in the above satellite-integrated data interaction system will be briefly described below.
In one possible implementation, each computing node is specifically configured to: acquiring low-speed data from at least one third device through a 1553B bus, or acquiring medium-speed data from at least one second device through an SWP bus, or acquiring high-speed data from at least one first device through a RapidIO bus; processing the low-speed data, the medium-speed data or the high-speed data to obtain processed data, wherein the processed data comprises the processed low-speed data, the processed medium-speed data or the processed high-speed data; sending the processed data low-speed data to at least one second device or at least one first device; or sending the processed medium-speed data to at least one first device or at least one third device; or transmitting the processed high-speed data to at least one first device or at least one second device.
In the solution provided in the embodiment of the present application, data in the high-speed data interaction architecture, the medium-speed data interaction architecture, and the low-speed data interaction architecture may be transmitted to each other, for example, the computing node receives high-speed data from any first device through the first switch, and may transmit the high-speed data to one or more third devices through a 1553B bus connected to the computing node, that is, the data is transmitted from the high-speed data interaction architecture to the low-speed data interaction architecture; alternatively, the computing node sends the high-speed data to one or more second devices through a second switch connected to the first switch, i.e., the data is transmitted from the high-speed data interaction architecture to the medium-speed data interaction architecture. Specifically, referring to fig. 2, a schematic diagram of data transmission between different data interaction architectures provided in the embodiment of the present application is shown, where in fig. 2, a high-speed data interaction architecture is abbreviated as a high-speed data interaction architecture, a medium-speed data interaction architecture is abbreviated as a medium-speed data interaction architecture, and a low-speed data interaction architecture is abbreviated as a low-speed data interaction architecture; the high-speed data interaction architecture sends data through an SRIO interface, the medium-speed data interaction architecture sends data through an SWP bus, and the low-speed data interaction architecture sends data through a 1553B bus and an Asynchronous Receiver/Transmitter (URAT). For convenience of explanation, the first switch is referred to as a high-speed switching SRIO switch and the second switch is referred to as a medium-speed switching SWP switch in fig. 2. The compute nodes include, but are not limited to, functions such as intelligent computing, logical computing, floating point computing, and general purpose computing.
Because the buses supported by the devices in different data interaction architectures are different, for example, the RapidIO bus is supported by the first device in the high-speed data interaction architecture, and the SWP bus is supported by the second device in the medium-speed data interaction architecture, when the computing node transmits data from one data interaction architecture to another data interaction architecture, the received data to be transmitted needs to be processed to obtain processed data.
For example, in a possible implementation manner, processing low-speed data, medium-speed data, or high-speed data to obtain processed data includes:
for the transmission between the medium-speed data interaction architecture and the high-speed data interaction architecture, carrying out protocol conversion on medium-speed data to obtain processed medium-speed data, or carrying out protocol conversion on high-speed data to obtain processed high-speed data, wherein the processed medium-speed data supports a RapidIO bus protocol, and the processed high-speed data supports an SWP bus protocol;
for the transmission from the low-speed data interaction architecture to the high-speed data interaction architecture, acquiring the transport layer protocol segment data in the low-speed data, encapsulating the transport layer protocol segment data into data in a VCDU format, and taking the encapsulated data as the processed low-speed data.
In the solution provided in the embodiment of the present application, for data transmission between devices in the high-speed data interaction architecture and the medium-speed data interaction architecture, when a computing node processes data, it mainly performs conversion between SPW and SRIO. For Data entering the high-speed Data interaction architecture from the low-speed Data interaction architecture, the Data may be implemented in a form of re-encapsulating a packet in a transport layer protocol Data segment, and for example, the encapsulated Data is in a Virtual Channel Data Unit (VCDU) format. Further, in the data encapsulation process, if the difference of the data transmission quantity is large, the data encapsulation can be realized by a data filling mode.
For example, in one possible implementation, if the processed low-speed data is sent to the at least one first device, the computing node is further configured to cache the processed low-speed data.
In the scheme provided by the embodiment of the application, data entering a low-speed data interaction architecture from a high-speed data interaction architecture must be transmitted in a cache manner, and if data continuity is required, the data of the high-speed data interaction architecture cannot be transmitted completely. Therefore, the transmission period of the data which needs to enter the low-speed data interaction architecture from the high-speed data interaction architecture needs to be considered, the high-speed data interaction architecture supports the SRIO transmission protocol, the SRIO data sent to the SPW switch should be in a resolvable form, and a proper cache space is set. In contrast, the transmission protocols of the medium-speed data interaction architecture and the low-speed data interaction architecture have relatively high time redundancy, and therefore, data stability and reliability should be considered. Specifically, referring to fig. 3, a schematic diagram of data interaction in different data interaction architectures provided in the embodiment of the present application is shown, where the high-speed data interaction architecture and the medium-speed data interaction architecture may be bridged by SRIO-SWP.
It should be understood that the satellite integration referred to in the embodiments of the present application refers to the integration of one or more computing nodes, part or all of at least one first device, at least one second device and at least one third device, a first switch, a second switch, etc. inside a satellite.
In the scheme provided by the embodiment of the application, a mode that a plurality of data interaction architectures of a high-speed data interaction architecture, a medium-speed data interaction architecture and a low-speed data interaction architecture coexist is adopted, so that on one hand, transmission of high-speed data is supported, a satellite system supports high-speed data transmission capability, and the problem that the data interaction rate of the current satellite system is low is solved; on the other hand, the method supports the coexistence of various data transmission rates, provides access capability for other high-speed, medium-speed and low-speed buses, and improves the adaptability of the satellite system.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.
Claims (10)
1. A satellite-integrated data interaction system, comprising: a high-speed data interaction architecture, a medium-speed data interaction architecture, and a low-speed data interaction architecture, wherein,
the high-speed data interaction architecture comprises at least one computing node, a first switch and at least one first device, wherein one end of the first switch is connected with the at least one computing node through a RapidIO bus, and the other end of the first switch is connected with the at least one first device through the RapidIO bus so as to realize high-speed data interaction between the computing node and the first device, wherein the first device is a device for transmitting data by using the RapidIO bus;
the medium-speed data interaction architecture comprises a first switch, a second switch and at least one second device, wherein one end of the second switch is connected with the at least one second device through an SWP bus, and the other end of the second switch is connected with the first switch so as to realize medium-speed data interaction between the first device and the second device, wherein the second device is a device for transmitting data by using the SWP bus;
the medium-speed data interaction architecture comprises at least one computing node and at least one third device, wherein each computing node is connected with at least one third device through a 1553B bus so as to realize low-speed data interaction between the computing node and the third device through the 1553B bus, and the third device is a remote terminal RT of the 1553B bus.
2. A system as claimed in claim 1, characterised in that the at least one first device comprises a device for transmitting data internally of the satellite using the RapidIO bus and/or a device for transmitting data externally of the satellite using the RapidIO bus.
3. The system of claim 2, wherein the low-speed data interaction architecture further comprises: at least one remote terminal RT of the CSB bus, the at least one remote terminal being connected to one or more second devices via the CSB bus.
4. The system of claim 3, wherein the at least one second device comprises one or more primary remote terminals and one or more secondary remote terminals, wherein each primary remote terminal is directly connected to the second switch via an SWP bus and each secondary remote terminal is connected to the primary remote terminal via an SWP bus.
5. The system of claim 4 wherein data interaction between the first switch and the at least one first device, and between the first switch and each of the compute nodes, occurs via one or more RapidIO channels.
6. The system of claim 5, wherein the second switch interacts data with the at least one second device via one or more SWP channels.
7. The system of claim 6, wherein each compute node is specifically configured to:
acquiring low-speed data from at least one third device through a 1553B bus, or acquiring medium-speed data from at least one second device through an SWP bus, or acquiring high-speed data from at least one first device through a RapidIO bus;
processing the low-speed data, the medium-speed data or the high-speed data to obtain processed data, wherein the processed data comprises the processed low-speed data, the processed medium-speed data or the processed high-speed data;
sending the processed data low-speed data to at least one second device or at least one first device; or sending the processed medium-speed data to at least one first device or at least one third device; or transmitting the processed high-speed data to at least one first device or at least one second device.
8. The system of claim 7, wherein processing the low-speed data, the medium-speed data, or the high-speed data to obtain processed data comprises:
for the transmission between the medium-speed data interaction architecture and the high-speed data interaction architecture, carrying out protocol conversion on medium-speed data to obtain processed medium-speed data, or carrying out protocol conversion on high-speed data to obtain processed high-speed data, wherein the processed medium-speed data supports a RapidIO bus protocol, and the processed high-speed data supports an SWP bus protocol;
for the transmission from the low-speed data interaction architecture to the high-speed data interaction architecture, acquiring the transport layer protocol segment data in the low-speed data, encapsulating the transport layer protocol segment data into data in a VCDU format, and taking the encapsulated data as the processed low-speed data.
9. The system of claim 8, wherein the compute node is further configured to: selecting a channel for data interaction with each first device according to the states of one or more RapidIO channels;
and selecting a channel for data interaction with each second device according to the states of one or more SWP channels.
10. The system of claim 9, wherein the compute node is further configured to cache the processed low-speed data if the processed low-speed data is sent to the at least one first device.
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