CN114697321B - Distributed comprehensive reconfigurable electronic system platform architecture - Google Patents
Distributed comprehensive reconfigurable electronic system platform architecture Download PDFInfo
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- CN114697321B CN114697321B CN202210032686.7A CN202210032686A CN114697321B CN 114697321 B CN114697321 B CN 114697321B CN 202210032686 A CN202210032686 A CN 202210032686A CN 114697321 B CN114697321 B CN 114697321B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/01—Protocols
- H04L67/10—Protocols in which an application is distributed across nodes in the network
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
- G06F15/17306—Intercommunication techniques
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/01—Protocols
- H04L67/12—Protocols specially adapted for proprietary or special-purpose networking environments, e.g. medical networks, sensor networks, networks in vehicles or remote metering networks
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
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- H04L69/08—Protocols for interworking; Protocol conversion
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
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Abstract
The distributed comprehensive reconfigurable electronic system platform framework disclosed by the invention has the characteristics of high safety, reconfigurability and growth. The invention is realized by the following technical scheme: each minimum particle unit is combined with a cross packet switching device and organized together through a plurality of point-to-point communication links, so that any interconnection and concurrent transmission among all chips or modules are realized; the core node units and the minimum particle units are in wired/wireless network communication based on a TTE (time-to-talk) Ethernet protocol to form the minimum particle units and the core node units, and information interaction and resource sharing are realized through the wired/wireless communication units on the network switching modules to form an open cross switch network switching fabric comprehensive electronic integrated system; the core node unit is used as a management and control center of the integrated electronic system platform, dynamically loads service reconstruction according to the task instruction of the upper computer, and performs network communication and data distribution based on the open function application service interface.
Description
Technical Field
The invention relates to a distributed comprehensive reconfigurable electronic system platform framework which is mainly used in the fields of aerospace, aviation and communication and can be suitable for resource reconfiguration.
Background
Integrated electronic systems originate from the aerospace industry. The integrated electronic system is to combine different kinds, different models, different frequency ranges and different purpose electronic devices on a single platform or a plurality of platforms into a complete and universal multifunctional electronic system. The system is characterized in that the whole system is logically divided into a plurality of nodes, and each node can access local memory resources and also can access remote memory resources. Although the comprehensive electronic system has outstanding comprehensive design, comprehensive utilization of information resources and comprehensive management and control of electronic resources, the comprehensive electronic system realizes multiple electronic functions and can provide electronic information for own ground movement and static equipment. The system connection is optimized through modular, open architecture design and industry standard interfaces. But access to local memory resources is much faster than to remote memory resources. The distributed integrated electronic system architecture provides a set of functional situational awareness and post-hoc analysis devices for collecting more data in real time through integration with, for example, signal/data recorders, direction finder and radios, achieving physically tight coupling (high integration of hardware components) in a multi-module integration process while maintaining logically loose coupling (high flexibility of software architecture), and integrated at the module level. Currently, when system equipment is limited by installed elements or function division and a single chassis cannot complete the integration of all functional items of a system, a simple module-based system integration method has a certain limitation.
With the continuous maturity of the technology of the aviation comprehensive electronic system, each spaceflight company introduces the technology into the design and development of a satellite platform to form the satellite comprehensive electronic system. The satellite comprehensive electronic system is a system for acquiring, processing and dividing comprehensive electronic system configuration and storage of information, and is a system for integrating information and functions of a highly dense and complex space electronic system under the condition of severe space limitation. The microsatellite integrated electronic system bears most of satellite functions, is a center for satellite task processing and control, and needs such as new intelligent application, constellation application, communication service and the like are executed by the satellite in the future, so that new requirements are put forward on the integrated electronic system. The typical small satellite comprehensive electronic system has the characteristics of high functional integration degree, multiple functions concentrated in one computer and satellite function software. The integrated structure of the integrated electronic system based on software definition is designed, the hardware adopts a highly integrated modularized design, the software adopts a layered and componentized design, the system functions are layered, and the functions and services of each layer are realized in a mode of the software definition component. The high-functional density integrated electronic system consists of a generalized high-performance hardware platform and various loadable APP software, and besides the traditional functions, functions such as autonomous task management, inter-satellite networking and load management can be expanded, so that the integration level and functional density of the satellite are greatly improved, the function reconstruction of the satellite can be realized, the purposes of one-satellite multiple use and one-satellite multiple use are achieved, and the rapid construction and application of the satellite system in an emergency period are facilitated. At present, a unified platform of a microsatellite integrated electronic system does not exist, the system is various, the integration level and the standardization are insufficient, the software development is challenged, and the application and popularization of the integrated electronic system are not facilitated. With the continuous increase of flight application capability, quality and efficiency requirements, the expansion of avionics system functions, information organization and environmental organization are increasingly complex. Avionics systems are typically complex systems that integrate application, processing, and capability into one for complex flight application organizations, system function organizations, and equipment resource organizations. For such complex systems, modern avionics systems must employ systems that integrate application-targeted, function-targeted, device-targeted, process-targeted, and run-practiced systems, architectures, capabilities, and management. The traditional method for directly coupling the requirements, conditions, treatments and results of the operation of the avionics system cannot realize the requirements of comprehensive optimization of the targets, environments, capabilities, efficiency, effects and effectiveness of the complex system. Because avionics systems have the background of complex environments, multitasking, and multiple targets, there are numerous organizations of elements, complex relationships, and different weights, and multiple treatments with different professions, different technologies, and different methods are adopted, so that the avionics systems have resource organizations with different types, different capabilities, and different performances. A single system organization, process, and management approach fails to meet and achieve system organization performance, efficiency, and availability capabilities. At present, the comprehensive technical research of the avionics system is mainly remained on the basis of the organization and the constitution of the traditional avionics system. The main characteristic is the organization mode of the independent avionics system, such as the organization architecture of each independent avionics subsystem; an independent avionics system functional mode, such as independent functional capability provided by each avionics subsystem; the system is formed by facing to independent avionics system resources, such as independent avionics subsystem resource platforms or IMA general processing platforms; the integration of independent applications, capabilities and devices of the avionics system is achieved. The independent system application organization, function processing and resource operation are integrated by considering only local conditions and factors, the comprehensive capacity of the system is greatly limited, the comprehensive benefits of the system are directly influenced, and the comprehensive problems and benefits analysis and evaluation of the system are also limited. The satellite ground station equipment in China is various in system, and has the situations of self-forming system and bar block segmentation, the systems are poor in openness, the interconnection and interworking interoperability is insufficient, and the management system has a system and technical system barrier. As integrated circuit scale grows, the power consumption density increases, the speed of the processor and the speed of the memory diverge more and more, and the memory delay limits the development of the performance of the integrated system computer. Since the single processor is limited by the control computing unit and amdahl's law states that instruction level parallelism depends on the parallelism of the program, an integrated electronic system consisting of several independent nodes connected by a high-speed private network cannot effectively increase the speed of the computer.
Disclosure of Invention
The invention aims at overcoming the defects of the prior art, and provides a modular, generalized, multi-task, high-safety, full-dynamic, reconfigurable, upgradeable, expandable and growth-type distributed comprehensive reconfigurable electronic system platform architecture.
The above object of the present invention can be achieved by the following means: a distributed integrated reconfigurable electronic system platform architecture, comprising: a minimum particle unit interconnected by wireless/wired communication and distributed around a core node unit, characterized by: each minimum particle unit is combined with a cross packet switching device and organized together through a plurality of point-to-point communication links, so that any interconnection and concurrent transmission among all chips or modules are realized; the core node units and the minimum particle units are in wired/wireless network communication based on a TTE (time-to-talk) Ethernet protocol, so that information interaction and resource sharing are realized by the minimum particle units and the core node units through wired/wireless communication units on respective network switching modules, and a device set for wireless transmission and power supply of a power supply is realized through respective power supply modules, and the device set forms an open cross switch network switching fabric comprehensive electronic integrated system through a high-speed serial bus and a chip-level interconnection standardized module; the method comprises the steps of finishing radar pulse compression, target detection, real-time imaging by a minimum particle unit, performing electric detection signal detection, parameter measurement, signal sorting, signal pairing, modulation identification, communication signal waveform demodulation, coding/decoding, protocol processing, interference suppression, frequency hopping synchronization, spread spectrum despreading, measurement parameter processing, defuzzification and signal processing work of various functional applications, combining signal processing results and other source detection information, finishing multi-source information fusion processing by loading a data processing program, performing data processing on a typical target identification information layer, obtaining data results required by operation of various functional applications, and forwarding service data streams to a core node unit; the core node unit is used as a management and control center of the integrated electronic system platform, and is oriented to test and application tasks according to an upper computer task instruction, and is used for detecting and managing system software and hardware resources and dynamically loading service reconstruction, so that resource management, network management, external interaction, waveform loading, interface adaptation, control information interaction and bus exchange of the whole platform are realized; an open function application service interface based on a high-speed interconnection network provides a tera-meganetwork, a gigabit network and RS422 and 1553B interfaces to the outside for network communication and data distribution.
Compared with the prior art, the invention has the following beneficial effects:
the invention is based on the open and expandable hardware architecture of the high-speed interconnection network, and forms an open comprehensive electronic integrated system by the technologies of standardized modules, high-speed serial buses, chip-level interconnection, switch fabric network management and the like. The hardware system structure system based on the switch fabric network (rapidio+TTEthernet) interconnection avoids the defects of limited system bus bandwidth, tight coupling among application function functions, mutual competition, uncertain system response time, low reliability and low expansibility when the traditional VEM or PCI parallel bus structure system exists. Meanwhile, all core node units and the minimum particle units of the system communicate through a wired/wireless network based on a TTE Ethernet protocol, so that data transmission and resource sharing are realized, all devices in the system equipment set are separated in physical positions but logically form a whole, all subsystems can independently or mutually cooperate to complete a certain task, and the system can adapt to task requirements of different scales by adding a plurality of core node units and the minimum particle units. Through remote call cooperative work, arbitrary interconnection and concurrent transmission among all chips or modules can be realized, and the system bandwidth is increased by times. The method relies on network virtual and SDN technical system to slice and separate entity resources from frequency, storage, calculation and other multidimensional degrees, thereby realizing fine optimization use of single resources and collaborative optimization scheduling of cluster resources and remarkably improving the utilization efficiency of limited ground station resources.
The invention adopts a new generation comprehensive electronic system architecture for distributed design of computing resources, adopts a building block type structure approach, replaces traditional monomer comprehensive electronic equipment with a minimum particle unit set based on wired/wireless connection, and reduces the complexity of the design of a large-scale comprehensive electronic integrated system. Each particle can support the capabilities such as instruction and control, data processing, signal processing and the like, and meanwhile, some particles can replicate the functions of other particles, and each particle is structurally independent but can realize the sharing and distribution of data resources through a high-speed exchange network so as to complete the tasks born by the large-sized monomer integrated electronic equipment. The new generation of comprehensive electronic system distributes each functional task to each 'separated' small particle, and simultaneously has upgradeable and modifiable fault-tolerant distributed computing capacity, thereby having the characteristics of light weight, high reliability, multiple flexibility, self-adaption and the like, and meeting the development requirement of a large complex comprehensive electronic system. On one hand, with the continuous improvement of the universalization, reusability and reconfigurability of the hardware modules of the system, the volume, the quality and the power consumption of the system are greatly reduced, and the reliability and the usability of the system are obviously improved; on the other hand, with the unified digital network, the extensible and growth-capable open system architecture is established, the technical performance index of the system is improved, and the total life cycle cost of the system is obviously reduced.
The invention supports communication waveforms of various different systems, different standards and different systems through advanced design concept and efficient design means, and supports the new generation of comprehensive electronic system platform with the advantages of modularization, generalization, multitasking, high safety, full dynamics, reconfigurability, upgradability, expandability and growth of waveform application extension and transplantation. The platform can meet the requirements of the current planned test and task of the comprehensive electronic information application system, and also meet the requirements of new test tasks which are developed in the future and continuously expanded, and supports the rolling and iterative development of the comprehensive electronic information application system.
Drawings
FIG. 1 is a schematic diagram of a distributed integrated reconfigurable electronic system platform architecture according to the present invention.
FIG. 2 is a schematic diagram of an embodiment of the integrated electronics system planar architecture of FIG. 1.
Detailed Description
See fig. 1. In an exemplary preferred embodiment described below, a distributed integrated reconfigurable electronic system platform architecture comprises: interconnection is achieved by wireless/wired communication and is distributed around the smallest particle unit of the core node unit. Each minimum particle unit is combined with a cross packet switching device and organized together through a plurality of point-to-point communication links, so that any interconnection and concurrent transmission among all chips or modules are realized; the core node units and the minimum particle units are in wired/wireless network communication based on a TTE (time-to-talk) Ethernet protocol, so that information interaction and resource sharing are realized by the minimum particle units and the core node units through wired/wireless communication units on respective network switching modules, and a device set for wireless transmission and power supply of a power supply is realized through respective power supply modules, and the device set forms an open cross switch network switching fabric comprehensive electronic integrated system through a high-speed serial bus and a chip-level interconnection standardized module; the method comprises the steps of finishing radar pulse compression, target detection, real-time imaging by a minimum particle unit, performing electric detection signal detection, parameter measurement, signal sorting, signal pairing, modulation identification, communication signal waveform demodulation, coding/decoding, protocol processing, interference suppression, frequency hopping synchronization, spread spectrum despreading, measurement parameter processing, defuzzification and signal processing work of various functional applications, combining signal processing results and other source detection information, finishing multi-source information fusion processing by loading a data processing program, performing data processing on a typical target identification information layer, obtaining data results required by operation of various functional applications, and forwarding service data streams to a core node unit; the core node unit is used as a management and control center of the integrated electronic system platform, and is oriented to test and application tasks according to an upper computer task instruction, and is used for detecting and managing system software and hardware resources and dynamically loading service reconstruction, so that resource management, network management, external interaction, waveform loading, interface adaptation, control information interaction and bus exchange of the whole platform are realized; an open function application service interface based on a high-speed interconnection network provides a tera-meganetwork, a gigabit network and RS422 and 1553B interfaces to the outside for network communication and data distribution.
In an alternative embodiment, the distributed integrated electronic system platform is an equipment set formed by a plurality of core node units and a plurality of minimum particle units, wherein the minimum particle units complete radar pulse compression, target detection, real-time imaging, electric detection signal detection, parameter measurement, signal sorting, signal pairing, modulation recognition, signal processing of various functional applications such as communication signal waveform demodulation, coding/decoding, protocol processing, interference suppression, frequency hopping synchronization, spread spectrum despreading, measurement parameter processing, defuzzification and the like, and meanwhile, the minimum particle units combine signal processing results and other source detection information, and data processing procedures on the information level such as multi-source information fusion processing and typical target recognition are completed through loading data processing programs, so that data results required by operation of various functional applications are obtained.
The core node chassis houses 5 standard modules per jack except for the high-speed backplane and chassis and structural attachments.
The digitizing machine case adopts a 5-slot frame. The definition of each slot generalization module is as follows:
slot 1: the channel module is used for completing the processing of signal down conversion, amplification and the like;
slot 2: the data storage and forwarding module is used for completing the operations such as storage and forwarding of service data and providing a tera-meganetwork interface to the outside;
the slot 3 is a system control module for completing the control of the whole system platform, and mainly comprises the steps of setting working parameters for each module, carrying out equipment configuration, monitoring the running state of equipment, configuring tasks, simultaneously being responsible for scheduling each equipment of the system to execute the works of self-checking, testing, dynamic loading and the like, managing and monitoring a network in real time, capturing and recording key information of a network in a case, a bus, a wired/wireless communication network and the like;
slot 4: and the network exchange module is used for completing internal data interaction and external data transmission. The method comprises the steps that rapidIO data exchange among internal modules of the equipment is realized through a rapidIO exchange chip on the module, and data interaction among the equipment is realized through a wired/wireless communication unit on the module;
slot 5: and the power supply module is used for supplying power to the self equipment.
See fig. 2. The core node unit includes: the system comprises a channel module for transmitting data through a TTE Ethernet, a data storage forwarding module, a node network switching module, a system control module and a power module for providing power, wherein the modules of a core node unit realize data exchange and sharing through the TTE Ethernet and a control bus rapidIO high-speed switching network, and data are transmitted through a function application service interface.
The channel module divides the signal into a unipolar code and a bipolar code according to a digital coding mode of a received signal according to a frequency standard signal and a B code received by a control bus and a signal synchronization signal between two receiving and transmitting ends, the unipolar code uses a level, positive or negative voltage represents data, a positive level represents 1 and a zero level represents 0, in the zeroing code RZ coding, the positive level represents logic 1, the negative level represents logic 0, a clock signal finishes self-synchronization by zeroing coding, the synchronous signal is regenerated from the received data through sampling recovery at the same speed as a transmitter at a receiver, a wireless channel control algorithm is adopted to simulate a multi-channel environment in an Ethernet environment, a wireless self-organizing network node communication environment is simulated to send signals, and after the channel module finishes up-down conversion and amplification processing of the signals, the signal data flows to a data storage and forwarding module through a TTE Ethernet in equipment.
The data storage and forwarding module collects data transmission and large-capacity storage in the system, stores large-capacity data in the pc in real time, adopts parallel transmission data, and realizes SPI mode data transmission through software coding, wherein the SPI mode data transmission comprises a serial clock. The data input and output, the data receiving and transmitting are completed, the data storage, replacement and forwarding are completed at the same time, the stored data from the internal bus interface is sent to the internal bus interface of the corresponding node network switching module, the data are transmitted in real time between the nodes and controlled in real time by the nodes, the data storage and forwarding system control module is used for realizing the data interaction and the resource management, network management, external interaction, waveform loading, interface adaptation and control information interaction of the whole platform through the TTE Ethernet and Rapid IO network, and the data interaction and the resource management, network management, external interaction, waveform loading, interface adaptation and control information interaction are exchanged to the node network switching module through the bus.
The wired/wireless communication unit in the node network exchange module receives the signal service data stream and the equipment state information transmitted by each minimum particle unit, disassembles the network into network branches, partitions the network data stream, isolates faults occurring in the branches, partitions the actual LAN infrastructure into a plurality of subnets from a logic angle, completes confirmation of the input information stream by means of an Ethernet switch, classifies the information stream and distributes corresponding priority, and realizes forwarding according to the priority.
The node network switching module verifies the address information of the data packet head through the data link layer to determine whether to receive or not, searches an address comparison table in a memory, determines which port a network card (NIC) of a hardware address (MAC) of a target network card is connected to, rapidly transmits the data packet to the target port through an internal switching matrix, broadcasts the target MAC to all ports if the target MAC does not exist, and an Ethernet switch learns a new address and adds the new address into an internal MAC address table after the receiving port responds. So as to reduce the data information flow of each network branch, make each network more effective, and improve the whole network efficiency. By filtering and forwarding by the switch, the collision domain can be effectively reduced. Therefore, the traditional point-to-multipoint communication mode can be overcome, bandwidth is wasted, delay and congestion are easy to generate, and even useless broadcast messages are generated, so that the system performance is negatively affected.
The node network exchange module calculates the command related to node signaling and exchange data, through which the relevant information of each slot position module can be queried and set, according to the requirements of different exchange modes, a channel is built in the exchange network according to the outgoing line address, an available channel through a plurality of exchange units is built in the exchange network, the information flow to be exchanged is completed from the incoming line to the outgoing line along the built channel, the wired/wireless communication units in the exchange network exchange module receive the signal service data flow and the equipment state information transmitted by each minimum particle unit, and the signal service data flow and the equipment state information are forwarded to each minimum particle unit through the TTE Ethernet.
Each minimum particle unit includes: the system comprises a signal preprocessing module, a data processing/control module, a particle network switching module and a power supply module, wherein the signal preprocessing module is connected with the signal processing module through an optical fiber, and the data processing/control module, the particle network switching module and the power supply module are used for transmitting data through a TTE (time to Ethernet) and a rapidIO (Internet of things) network; the core node unit carries out pretreatment on signal data to be processed through TTE Ethernet in the equipment, flows to a signal pretreatment module through a Rapid IO network, carries out purification treatment and extraction of webpage metadata information, carries out AD sampling, serial-parallel conversion and the like, carries out digital baseband signal processing through an optical fiber, completes signal waveform generation, digital beam forming and signal waveform modulation/demodulation of baseband digital signals of each task function, carries out data processing/control module coding/decoding, completes down-conversion, protocol analysis, protocol conversion, PDXP code conversion operation, framing treatment, data distribution and application treatment of service data, carries out spread spectrum/despreading and interference suppression treatment, then carries out service data streaming to a particle network exchange module, completes tasks of filtering, learning and forwarding processes through software by adopting hardware by the particle network exchange module, and forwards sent data to all ports through a wire/wireless communication unit to the core node unit.
In an alternative embodiment, 2 minimum particle units and 1 core node unit form a new generation comprehensive electronic system platform, and each module of the minimum particle units realizes data exchange and sharing with the core node unit through a rapidIO network, a TTE Ethernet and a control bus to complete the signal processing task of 2 receiving and 2 transmitting.
The foregoing describes in detail embodiments of the present invention, which are described herein using specific embodiments, the description of the embodiments being merely intended to aid in the understanding of the methods and apparatus of the present invention; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present invention, the present description should not be construed as limiting the present invention in view of the above.
Claims (9)
1. A distributed integrated reconfigurable electronic system platform, comprising: a minimum particle unit interconnected by wireless/wired communication and distributed around a core node unit, characterized by: each minimum particle unit is combined with a cross packet switching device and organized together through a plurality of point-to-point communication links, so that any interconnection and concurrent transmission among all chips or modules are realized; the core node units and the minimum particle units are in wired/wireless network communication based on a TTE (time-to-talk) Ethernet protocol, so that information interaction and resource sharing are realized by the minimum particle units and the core node units through wired/wireless communication units on respective network switching modules, and a device set for wireless transmission and power supply of a power supply is realized through respective power supply modules, and the device set forms an open cross switch network switching fabric comprehensive electronic integrated system through a high-speed serial bus and a chip-level interconnection standardized module; the method comprises the steps of finishing radar pulse compression, target detection, real-time imaging by a minimum particle unit, performing electric detection signal detection, parameter measurement, signal sorting, signal pairing, modulation identification, communication signal waveform demodulation, coding/decoding, protocol processing, interference suppression, frequency hopping synchronization, spread spectrum despreading, measurement parameter processing, defuzzification and signal processing work of various functional applications, combining signal processing results and other source detection information, finishing multi-source information fusion processing by loading a data processing program, performing data processing on a typical target identification information layer, obtaining data results required by operation of various functional applications, and forwarding service data streams to a core node unit; the core node unit is used as a management and control center of the integrated electronic system platform, and is oriented to test and application tasks according to an upper computer task instruction, and is used for detecting and managing system software and hardware resources and dynamically loading service reconstruction, so that resource management, network management, external interaction, waveform loading, interface adaptation, control information interaction and bus exchange of the whole platform are realized; an open function application service interface based on a high-speed interconnection network provides a tera-meganetwork, a gigabit network and RS422 and 1553B interfaces to the outside for network communication and data distribution.
2. The distributed integrated reconfigurable electronic system platform of claim 1, wherein: the distributed integrated electronic system platform is an equipment set formed by a plurality of core node units and a plurality of minimum particle units, wherein the minimum particle units complete radar pulse compression, target detection, real-time imaging, electric detection signal detection, parameter measurement, signal sorting, signal pairing, modulation recognition, communication signal waveform demodulation, encoding/decoding, protocol processing, interference suppression, frequency hopping synchronization, spread spectrum despreading, measurement parameter processing, defuzzification and other signal processing of various functional applications, and meanwhile, the minimum particle units combine signal processing results and other source detection information, and complete multi-source information fusion processing, typical target recognition and other information-level data processing through loading data processing programs, so that data results required by operation of various functional applications are obtained.
3. The distributed integrated reconfigurable electronic system platform of claim 1, wherein: the core node unit includes: the system comprises a channel module for transmitting data through a TTE Ethernet, a data storage forwarding module, a node network switching module, a system control module and a power module for providing power, wherein the modules of a core node unit realize data exchange and sharing through the TTE Ethernet and a control bus rapidI0 high-speed switching network, and data are transmitted through a function application service interface.
4. The distributed integrated reconfigurable electronic system platform of claim 2, wherein: the channel module divides the signal into a unipolar code and a bipolar code according to a digital coding mode of a received signal according to a frequency standard signal and a B code received by a control bus and a signal synchronization signal between two receiving and transmitting ends, the unipolar code uses a level, positive or negative voltage represents data, a positive level represents 1 and a zero level represents 0, in the zeroing code RZ coding, the positive level represents logic 1, the negative level represents logic 0, a clock signal finishes self-synchronization by zeroing coding, the synchronous signal is regenerated from the received data through sampling recovery at the same speed as a transmitter at a receiver, a wireless channel control algorithm is adopted to simulate a multi-channel environment in an Ethernet environment, a wireless self-organizing network node communication environment is simulated to send signals, and after the channel module finishes up-down conversion and amplification processing of the signals, the signal data flows to a data storage and forwarding module through a TTE Ethernet in equipment.
5. A distributed integrated reconfigurable electronic system platform according to claim 2 or 3, wherein: the data storage and forwarding module acquires data transmission and large-capacity storage in the system, stores large-capacity data in a pc machine in real time, adopts parallel transmission data, realizes SPI mode data transmission through software coding, comprises a serial clock, inputs and outputs the data, completes data storage, replacement and forwarding when carrying out data receiving and transmitting, sends the stored data from an internal bus interface to an internal bus interface of a corresponding node network switching module, carries out node real-time data transmission and node real-time control on the data between networks, and realizes data interaction and resource management, network management, external interaction, waveform loading, interface adaptation and control information interaction of the whole platform through a TTE Ethernet and a Rapid I0 network.
6. The distributed integrated reconfigurable electronic system platform of claim 2, wherein: the wired/wireless communication unit in the node network exchange module receives the signal service data stream and the equipment state information transmitted by each minimum particle unit, disassembles the network into network branches, partitions the network data stream, isolates faults occurring in the branches, partitions the actual LAN infrastructure into a plurality of subnets from a logic angle, completes confirmation of the input information stream by means of an Ethernet switch, classifies the information stream and distributes corresponding priority, and realizes forwarding according to the priority.
7. The distributed integrated reconfigurable electronic system platform of claim 1, wherein: the node network switching module verifies the address information of the data packet head through the data link layer to determine whether to receive or not, searches an address comparison table in a memory, determines which port a network card (NIC) of a hardware address (MAC) of a target network card is connected to, rapidly transmits the data packet to the target port through an internal switching matrix, broadcasts the target MAC to all ports if the target MAC does not exist, and an Ethernet switch learns a new address and adds the new address into an internal MAC address table after the receiving port responds.
8. The distributed integrated reconfigurable electronic system platform of claim 1, wherein: the node network exchange module calculates the command related to node signaling and exchange data, through which the relevant information of each slot position module can be queried and set, according to the requirements of different exchange modes, a channel is built in the exchange network according to the outgoing line address, an available channel through a plurality of exchange units is built in the exchange network, the information flow to be exchanged is completed from the incoming line to the outgoing line along the built channel, the wired/wireless communication units in the exchange network exchange module receive the signal service data flow and the equipment state information transmitted by each minimum particle unit, and the signal service data flow and the equipment state information are forwarded to each minimum particle unit through the TTE Ethernet.
9. The distributed integrated reconfigurable electronic system platform of claim 1, wherein: each minimum particle unit includes: the system comprises a signal preprocessing module, a data processing/control module, a particle network switching module and a power supply module, wherein the signal preprocessing module is connected with the signal processing module through an optical fiber, and the data processing/control module, the particle network switching module and the power supply module are used for transmitting data through a TTE (time-to-Ethernet) and a rapidI0 network; the core node unit carries out pretreatment, purification treatment and extraction of webpage metadata information through a rapid I0 network flow signal pretreatment module through TTE Ethernet in the equipment, carries out digital baseband signal treatment through optical fibers after AD sampling, serial-parallel conversion and other treatments, completes signal waveform generation, digital beam forming and signal waveform modulation/demodulation of baseband digital signals of each task function, carries out data processing/control module coding/decoding, completes down-conversion, protocol analysis, protocol conversion, PDXP code conversion operation, framing treatment, data distribution and application treatment of service data, carries out frequency spreading/despreading and interference suppression treatment, carries out service data flow into a particle network exchange module, completes tasks of filtering, learning and forwarding processes through software by adopting hardware by the particle network exchange module, and forwards transmission data to all ports through a wire/wireless communication unit to the core node unit.
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