CN212515401U - Rocket-borne full-redundancy comprehensive electronic system - Google Patents
Rocket-borne full-redundancy comprehensive electronic system Download PDFInfo
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- CN212515401U CN212515401U CN202021688600.9U CN202021688600U CN212515401U CN 212515401 U CN212515401 U CN 212515401U CN 202021688600 U CN202021688600 U CN 202021688600U CN 212515401 U CN212515401 U CN 212515401U
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Abstract
The utility model provides an arrow carries full redundant integrated electronic system, wherein the arrow carries full redundant integrated electronic system and adopts VPX backplate framework, should synthesize the electronic system and include: the system comprises a main control module with a multi-mode redundancy architecture, a power supply module and a plurality of service modules, wherein the main control module is arranged in the center of a VPX backboard and used for sending control instructions to each service module to manage and control each service module; the power supply module is arranged on one side face of the VPX backboard and used for supplying power to the main control module and each service module; and the service modules are sequentially arranged on the VPX backboard according to a preset ordering requirement and used for executing corresponding service according to the control instruction sent by the main control module. The utility model adopts the VPX back plate framework to interconnect the modules with the multi-mode redundancy framework into a whole machine, which is easy to expand; and each module with independent functions is a multi-mode framework, so that a single-point fault mode does not exist, and the reliability of the system is improved.
Description
Technical Field
The utility model relates to a carrier rocket electrical system technical field, concretely relates to arrow carries full redundant electronic system that synthesizes.
Background
The rocket-borne computer is a core device of an electrical system of a carrier rocket (or a guided missile weapon), the development and production cost of the carrier rocket (or the guided missile weapon) is high, the flight reliability of the rocket-borne computer is required to be extremely high, and the rocket-borne integrated electronic system is called as a rocket (missile) borne single machine in the traditional carrier rocket (or guided missile weapon), belongs to a distributed structure, consists of a plurality of single machines, and generally comprises the rocket-borne computer, an integrated controller, a time schedule controller, a power distributor, an inertial navigation device, a satellite navigation receiver and other equipment. Each single machine has independent and complete functions, the interior of each single machine comprises a structural part, a plurality of printed boards and application software, and the single machines carry out instruction control and data communication through a system bus. The functional modules in the existing rocket-borne integrated electronic system are integrated through a custom framework, the structural form is custom, the interconnection bus is custom, the randomness is high, and the expandability is poor.
SUMMERY OF THE UTILITY MODEL
In view of this, the embodiment of the utility model provides an arrow carries full redundancy and synthesizes electronic system solves among the prior art and synthesizes among the electronic system that structural style is self-defined, interconnection bus is self-defined, and the randomness is higher, the poor problem of scalability.
According to a first aspect, the embodiment of the utility model provides an arrow carries full redundant integrated electronic system, arrow carries full redundant integrated electronic system adopts VPX backplate framework, arrow carries full redundant integrated electronic system includes: the system comprises a main control module with a multi-mode redundancy architecture, a power supply module and a plurality of service modules, wherein the main control module is arranged in the center of the VPX backboard and used for sending control instructions to each service module to manage and control each service module; the power supply module is arranged on one side surface of the VPX backboard and used for supplying power to the main control module and each service module; and each service module is sequentially arranged on the VPX backboard according to a preset ordering requirement and used for executing corresponding service functions according to the control instruction sent by the main control module.
Optionally, the main control module and each redundant module in each service module and the main control module and each service module are connected in pairs by using GTX high-speed serial transceivers to perform communication between the modules, communication between the redundant modules in each module and communication between systems.
Optionally, the power module is formed by connecting a plurality of power modules in parallel, an input end of the power module is connected with an external power supply, and an output end of the power module is respectively connected with the main control module and each service module through a VPX backplane; the power module is formed by sequentially connecting an EMC filter circuit, an EMI filter circuit and a secondary power module in series, and the EMC filter circuit and the EMI filter circuit filter power provided by an external power supply and then convert the power into a plurality of paths of direct-current power supplies through the secondary power module according to preset power supply requirements.
Optionally, the main control module includes: the system comprises three single-mode computers, a three-to-two reset selection circuit, a clock synchronization circuit and an inter-mode high-speed bus communication circuit, wherein three input ends of the three-to-two reset selection circuit are respectively connected with the three single-mode computers, and three output ends of the three-to-two reset selection circuit are respectively connected with reset ports of the three single-mode computers, and are used for resetting and restarting the single-mode computer with the current fault after any single-mode computer fails; the clock synchronization circuit is used for realizing the synchronism of the operation of the processors in the three single-mode computers; the intermode high-speed bus communication circuit is used for realizing data communication between any two single-mode computers.
Optionally, the master control module is composed of three completely independent MPSoC chips.
Optionally, the main control module further includes: and each data storage module is connected with the MPSoC chip and is used for storing data corresponding to the single-mode computer in the main control module according to different preset data types.
Optionally, the service module includes: the device comprises an acquisition module, a power distribution module, a time sequence module, a satellite guide module and a telemetry module.
Optionally, a plurality of control modules are arranged in the service module, and are used for selecting a corresponding redundant module according to the control instruction of the main control module.
Optionally, the embodiment of the utility model provides an arrow carries full redundancy and synthesizes electronic system still includes: and the extension module is used for carrying out function extension on the rocket-borne full-redundancy comprehensive electronic system according to a preset requirement.
Optionally, the main control module, the power supply module and the plurality of service modules all adopt a VPX daughter board structure.
The utility model discloses technical scheme has following advantage:
the embodiment of the utility model provides an arrow carries full redundancy and synthesizes electronic system, through adopting VPX backplate framework to become the complete machine with the main control module, power module and a plurality of business module interconnection of multimode redundancy framework, make things convenient for each module to change and increase and decrease, easily expand; and each module with independent functions is of a multi-mode structure, so that a single-point failure mode does not exist, the reliability of the system is improved, and the requirement of medium and large carrier rockets on high reliability can be met.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the technical solutions in the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic diagram of an rocket-borne fully redundant integrated electronic system according to an embodiment of the present invention;
fig. 2 is a schematic diagram of communication connections of modules of an rocket-borne fully redundant integrated electronic system according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a power module according to an embodiment of the present invention.
Detailed Description
The technical solution of the present invention will be described clearly and completely with reference to the accompanying drawings, and obviously, the described embodiments are some, but not all embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
Furthermore, the technical features mentioned in the different embodiments of the invention described below can be combined with each other as long as they do not conflict with each other.
The embodiment of the utility model provides a rocket-borne full-redundancy synthesizes electronic system is based on following scene, because carrier rocket (or guided missile weapon) itself development and manufacturing cost are higher, and load such as satellite, airship are more expensive in addition, require the flight reliability of rocket-borne computer to reach 0.999 or even higher. The traditional rocket (missile) borne integrated electronic system has the following defects: most of modules with independent functions are single-mode architectures, a plurality of single-point failure modes exist, the system reliability is not high, and the requirement of medium and large carrier rockets on high reliability is difficult to meet; for a functional module adopting a multimode architecture, communication between modules is generally realized by adopting a low-speed bus or a Random Access Memory (RAM for short), the data bandwidth is low, a certain delay exists, and the real-time property of data processing is limited; all modules in the rocket-borne integrated electronic system are integrated through a custom framework, the structural form is custom, the interconnection bus is custom, the randomness is high, and the expandability is poor.
The embodiment of the utility model provides an arrow carries full redundant integrated electronic system, arrow carries full redundant integrated electronic system adopts VPX backplate 1 framework, as shown in FIG. 1, arrow carries full redundant integrated electronic system includes: the system comprises a main control module 2 with a multi-mode redundancy architecture, a power supply module 3 and a plurality of service modules 4, wherein the main control module 2 is arranged in the center of a VPX backboard 1 and is used for sending control instructions to the service modules 4 to manage and control the service modules 4; the power supply module 3 is arranged on one side surface of the VPX backboard 1 and used for supplying power to the main control module 2 and the plurality of service modules 4; each business module 4 is required to set gradually on VPX backplate 1 according to predetermineeing the sequencing, be used for carrying out corresponding business service according to the Control command that master Control module 2 sent, wherein VPX backplate 1 divide into different connection forms (for example: Control Plane, Control Switch, Data Plane, expand Plane, IMPC, Power etc. these are VPX backplate 1 inherent standard content, the embodiment of the utility model provides a no longer give unnecessary details), connect the form setting according to the actual functional requirement, the utility model discloses do not use this as the limit.
The rocket-borne full-redundancy integrated electronic system adopting the VPX backplane 1 framework meets the VITA65 standard, multi-mode redundancy is realized, the normal functions of the modules are not influenced under the condition that any module has an internal fault, and the operation reliability is ensured; and the problems of self-defined architecture integration, self-defined structural form, self-defined interconnection bus, high randomness and poor expandability are avoided, so that each module is easy to expand. It should be noted that, in practical applications, other backplane architectures may be selected to replace the VPX backplane 1 architecture, which is not limited by the present invention.
The embodiment of the utility model provides an in, main control module 2, power module 3 and a plurality of business module 4 inside each redundant module all adopt VPX daughter board (VPX1, VPX2 … … VPX11) structure, and in the arrow carries the full redundant comprehensive electronic system, each module interface all adopts the OpenVPX framework that accords with VITA65 standard. According to a set module sequence and considering the requirements of function wiring, power consumption and heat dissipation in the using process of each module, the main control module 2 is arranged in the middle of the VPX backboard 1 structure, the power modules such as the power module 3 are arranged on the side face of the VPX backboard 1, and the rest service modules 4 (including the power distribution module 41, the acquisition module 42, the telemetry module 43, the guard guide module 44, the plurality of time sequence modules 45 and the like) are arranged on the VPX backboard 1 structure one by one according to the functions and wiring, so that the modules are convenient to replace, increase and decrease. The plug-in unit of VPX connection is VPX produced by China-made China aviation photoelectric company, the module plug is VPX-61T8aAA8CACC8-B, and the back board socket is VPX-61Z8eIJ8IIIJ 8-A. It should be noted that the embodiment of the present invention only exemplifies the manufacturer and the plug-in type of the back plate structure, and can be selected according to the actual requirement in the practical application, the present invention is not limited thereto.
In practical application, the control FPGA of the service module 4 selects 2 completely independent K7 series FPGAs of Xilinx company as a control unit, the chip model is XC7K325T-2FFG676I, and a node IP core, a signal filtering IP and the like of a custom high-speed serial bus ispece are integrated. The FPGA is a control center of the service module 4, receives a bus control command of the main control module 2, performs operation processing, sends the operation processing to an execution circuit (namely, a corresponding module in each redundant module in the service system) to output a control signal, receives a sampling circuit signal, processes the sampling circuit signal and sends the processed sampling circuit signal to external equipment through a bus, wherein the FPGA is used as a control core, the original traditional single-mode architecture is subjected to redundancy design, a single-point fault mode existing in the original architecture is eliminated, a full redundancy system is realized, and the reliability and the overall performance of the service module 4 are improved.
As shown in fig. 2, the main control module 2 and each redundant module in each service module 4 and the main control module 2 and each service module 4 are connected in pairs by using GTX high-speed serial transceivers to perform communication between the modules, communication between the redundant modules in each module, and communication between systems. Connecting each module in the system and communicating with a single machine outside the system by a self-defined high-speed serial bus technology; integrating various mature IP cores by adopting a System On Chip (SOC) and a Field Programmable logic Chip (FPAG), and reducing the device types of an interface Chip; the solution based on Ethernet and real-time embedded operating system provides software and hardware environment for the control algorithm of the carrier rocket, ensures that the modules adopt the built-in self-defined high-speed serial bus to transmit data and instructions, and each module has an external connector to complete the signal transmission with other devices of the control system.
In the embodiment of the utility model, the SOC and the FPGA are connected in pairs by adopting a GTX high-speed serial transceiver on the hardware of the interconnection bus, and the communication among modules, the communication among modules and the communication among systems are carried out, so that the full communication structure of the integrated electronic system is realized; the full-redundancy integrated electronic system adopts electrical signals inside and optical signals outside, the optical module adopts HTG8512-MH-I002LU produced by the medium-navigation photoelectric company, the working rate of the GTX high-speed serial transceiver is 5Gbps, and an independent 10Gbps bandwidth communication link is formed in the mode of adopting X2. The GTX high-speed serial transceiver supports the realization of the current popular high-speed serial bus protocol, and is realized in SOC and FPGA in an IP form, wherein, the communication among modules adopts an SRIO bus protocol, the communication among modules and among systems adopts an iSPACE bus protocol which is independently researched and developed, an exchange IP core of the iSPACE is positioned in the SOC (SOC1, SOC2 and SOC3) of the main control module 2, and a node IP core of the iSPACE is positioned in the FPGA (FPGA1 and FPGA2) of the service module 4. Adopting GTX to ensure double redundant access on bus connection hardware; the bus software protocol adopts a standard SRIO bus protocol and a custom iSPACE bus protocol, is autonomous and controllable, is convenient to use and is easy to transplant.
It should be noted that, the embodiment of the present invention is only illustrated, the SRIO bus protocol adopted for communication between modules and the ispece bus protocol independently developed for communication between modules and between systems, and other bus protocols can be selected in practical application, the present invention is not limited to this.
In the embodiment of the present invention, as shown in fig. 3, the power module 3 is formed by connecting a plurality of power modules in parallel, the input end of the power module is connected to an external power supply, and the output end of the power module is connected to the main control module 2 and each service module 4 respectively; the power module is formed by sequentially connecting an EMC filter circuit 31, an EMI filter circuit 32 and a secondary power module 33 in series, and the EMC filter circuit 31 and the EMI filter circuit 32 filter power provided by an external power supply and then convert the power into a plurality of paths of direct current power supplies through the secondary power module 33 according to preset power supply requirements.
The power module 3 has the function of converting primary direct-current voltage into multiple paths of direct-current output with different voltages and powers through DC/DC, meets the isolation requirement, outputs the power voltage required by the main control module 2, the service module 4 and the test in the machine, adopts a multi-mode redundancy technology during design, and fully considers the reliability, the safety and the electromagnetic compatibility of products. The external +28V power supply input is firstly filtered by an EMC filter circuit 31 formed by a capacitor and an inductor, meanwhile, a transient voltage suppression diode is added to prevent the bus from generating higher voltage to damage components, and the input power passes through an EMI filter circuit 32 and then is supplied to a secondary power module 33 to carry out voltage conversion and electrical isolation and is forwarded to a power interface VPX plug-in (P0, P1 … … P6). The EMI filter circuit 32 adopts MQPI-18LP of Vicor, and the DC-DC conversion module adopts PI3109-00-HVMZ, PI3111-00-HVMZ and PI3106-00-HVMZ of Vicor.
It should be noted that, in the embodiment of the present invention, the voltage levels of the modules and the selection of the filter circuit are set according to actual needs, and the present invention is not limited thereto.
The arrow-mounted full-redundancy integrated electronic system is composed of three completely independent modules with an MPSoC chip as a core. Each module is a main control module 2 with independent functions and comprises three single-mode computers, a three-to-two reset selection circuit, a clock synchronization circuit and an inter-module high-speed bus communication circuit, wherein three input ends of the three-to-two reset selection circuit are respectively connected with the three single-mode computers, and three output ends of the three-to-two reset selection circuit are respectively connected with reset ports of the three single-mode computers; the clock synchronization circuit is used for realizing the synchronism of the operation of the processors in the three single-mode computers; the intermode high-speed bus communication circuit is used for realizing data communication between any two single-mode computers. And deploying a flight control software system based on a large embedded real-time operating system in the MPSoC. Wherein the main control module 2 further comprises: and each data storage module is connected with the MPSoC chip and is used for storing data corresponding to the single-mode computer in the main control module 2 according to different preset data types. It should be noted that, the embodiment of the present invention illustrates that the main control module 2 uses the MPSoC chip as a core, and other chips can be selected in practical application, and the present invention is not limited thereto.
For the three-out-of-two reset selection circuit, a mechanism that three-mode calculation modules of the three-out-of-two can vote mutually to perform reset reconstruction is provided, namely, the fault of any one computer can be ensured to be subjected to fault reset and system reconstruction in a majority mode through voting minority of the other two calculations, the one-mode computer of any fault can not be mistakenly reset to other two-mode computers, and the reliability of system reset reconstruction is ensured. Meanwhile, for the design of the two-out-of-three reset selection circuit, in order to ensure the reliability, a Complex Programmable Logic Device (CPLD) or a Micro Control Unit (MCU) is not adopted, and a more reliable standard gate circuit (NAND gate, OR gate and the like) is adopted for construction, so that the space reliability and the high radiation resistance of the circuit are ensured.
The embodiment of the utility model provides a system's arrow carries full redundant synthesis electronic system's host system 2 adopts 3 completely independent ZYNQ UltraScale + series MPSoc chips to constitute, and the Zynq SOC of adoption is the most advanced model series of present Xilinx, and the model is XCZU15EG, all has fine application on complicated system control and large-scale AI accelerating computing system. The performance level of the on-chip integrated 4-core Arm A53 and large-capacity FPGA (including a high-speed transceiver and a large number of calculation acceleration units such as 2000+ parallel DSP units) in the aspects of calculation and AI acceleration capability is at the leading level in the global arrow control system industry.
The embodiment of the utility model provides a single mode computer of arrow-borne full-redundancy comprehensive electronic system still includes: an interface circuit, wherein the interface circuit is used for realizing data communication between the single-mode computers and external equipment, comprising: the system comprises a double CAN bus interface, a high-speed double Ethernet interface, a photoelectric isolation IO interface, a photoelectric interface, an external high-speed bus interface, an external common interface, an internal high-speed bus interface and an internal common interface. The method is reasonably divided according to respective characteristics of a PS terminal (ARM terminal) and a PL terminal (FPGA terminal) of an XCZU15EG processor. DDR4 dynamic memory RAM, large capacity eMMC flash memory, SPI configuration memory, CAN bus interface, Ethernet interface, etc. are connected to the PS end (ARM end) of XCZU15 processor; a high-speed bus interface, a switching value IO interface, synchronization and reset logic and the like are hung at a PL end (FPGA end) of the XCZU15EG processor.
In the embodiment of the utility model, the DDR4 memory adopts MT40A512M16JYE dynamic DDR4 chips of Micron company, 2 chips are connected in parallel, the total bit width is 32bit, and the capacity is 2 GB; EMMC FLASH the data memory is realized by MTFC64GAKAEEY large-capacity EMMC flash memory of Micron company, with capacity of 64 GB; QSPI FLASH adopts the MT25QU01GBBB8E12 of Micron company, the capacity is 128 MB; the EEPROM is AT24C256C from ATMEL company with the capacity of 32 MB. The main control module 2 needs a plurality of power supply rails of 0.85V, 1.2V, 1.5V, 1.8V, 2.5V, 3.3V, 5V, etc., and is generated by using the LTM4627, LTM4622 power supply ummodule, the TPS54525, the TPS7a8101, the TPS74401 linear power supply of the TI, and the DDR dedicated power supply TPS51200 of the TI. The crystal oscillator adopts SIT5156-FD-33N0-33.333333 type temperature compensation crystal oscillator of SiTime company as a PS end master clock, and meets the index requirement of 5 ppm; SiT8103AI-23-33E-50.000T type crystal oscillator of SiTime company is selected as a standby clock of a PL terminal, and LTC2802CDE of Linear company is adopted for level conversion of an RS232 serial port for debugging.
Wherein, the PS end interface is provided with a double CAN bus interface and a high-speed double Ethernet interface; the PL end interfaces a high-speed custom bus interface and a photoelectric isolation IO interface. The CAN bus interface is realized by a CAN bus IP core at the PS end of an XCZU15EG processor and an external CAN transceiver chip, and the CAN transceiver is a TJA1040T interface chip of NXP company; the realization of the double network ports is realized by ETH0 and ETH1 interfaces at PS ends of an XCZU15EG processor, the two controllers respectively correspond to 88E1111 of MARVAL company, and the transformer is H5007NL of PULSE company.
By adopting the core processor of the fully programmable SOC, the original traditional triple-modular redundancy architecture is optimized, weak links existing in the original architecture are eliminated, particularly a single-point mode of arbitration judgment is eliminated, a full redundancy system is realized, and the reliability and the overall performance of the main control module 2 are improved.
The embodiment of the utility model provides an arrow carries full redundant integrated electronic system still includes: and the expansion module 5 is used for performing function expansion of the rocket-borne full-redundancy integrated electronic system according to preset requirements, so that the expandability and the portability of the system are further improved.
The embodiment of the utility model provides an arrow carries full redundancy and synthesizes electronic system, through adopting VPX backplate framework to become the complete machine with the main control module, power module and a plurality of business module interconnection of multimode redundancy framework, make things convenient for each module to change and increase and decrease, easily expand; each module with independent functions is of a multi-mode structure, and a single-point failure mode does not exist, so that the reliability of the system is improved, and the requirement of medium and large carrier rockets on high reliability can be met; the MPSoC is used as a CPU of the module, a plurality of ARM cores and a large-capacity FPGA are integrated on a chip of the MPSoC, the CPU main frequency can reach more than 1GHz, and the MPSoC has powerful functions on the aspects of computing capacity and AI acceleration capacity; and the communication among modules in the modules is realized by adopting a GTX high-speed serial transceiver, so that the data transmission rate is ensured.
The above embodiments are only used for illustrating the technical solutions of the present invention and not for limiting the same, and although the present invention is described in detail with reference to the above embodiments, those of ordinary skill in the art should understand that: modifications and equivalents may be made to the embodiments of the invention without departing from the spirit and scope of the invention, which should be construed to be within the scope of the claims.
Claims (10)
1. An rocket-borne full-redundancy integrated electronic system, wherein the rocket-borne full-redundancy integrated electronic system adopts a VPX backplane architecture, and the rocket-borne full-redundancy integrated electronic system comprises: a main control module with multi-mode redundant architecture, a power supply module and a plurality of service modules, wherein,
the master control module is arranged in the center of the VPX backboard and used for sending control instructions to each service module so as to manage and control each service module;
the power supply module is arranged on one side surface of the VPX backboard and used for supplying power to the main control module and each service module;
and each service module is sequentially arranged on the VPX backboard according to a preset ordering requirement and used for executing corresponding service functions according to the control instruction sent by the main control module.
2. The rocket-borne fully redundant integrated electronic system according to claim 1, wherein GTX high-speed serial transceivers are used to connect two by two between said main control module and each redundant module in each said service module and between said main control module and each said service module for communication between modules, communication between redundant modules in each module and communication between systems.
3. The rocket-borne full-redundancy integrated electronic system according to claim 1, wherein the power module is formed by connecting a plurality of power modules in parallel, the input ends of the power modules are connected with an external power supply, and the output ends of the power modules are respectively connected with the main control module and each service module through a VPX backplane;
the power module is formed by sequentially connecting an EMC filter circuit, an EMI filter circuit and a secondary power module in series, and the EMC filter circuit and the EMI filter circuit filter power provided by an external power supply and then convert the power into a plurality of paths of direct-current power supplies through the secondary power module according to preset power supply requirements.
4. The rocket-borne fully redundant integrated electronic system according to claim 1, wherein said master control module comprises: three single-mode computers, a three-to-two reset selection circuit, a clock synchronization circuit and an inter-mode high-speed bus communication circuit,
three input ends of the two-out-of-three reset selection circuit are respectively connected with three single-mode computers, and three output ends of the two-out-of-three reset selection circuit are respectively connected with reset ports of the three single-mode computers, and are used for resetting and restarting the single-mode computer with the current fault after any single-mode computer has the fault;
the clock synchronization circuit is used for realizing the synchronism of the operation of the processors in the three single-mode computers;
the intermode high-speed bus communication circuit is used for realizing data communication between any two single-mode computers.
5. The rocket-borne fully redundant integrated electronic system according to claim 1, wherein the master control module is composed of three completely independent MPSoC chips.
6. The rocket-borne fully redundant integrated electronic system according to claim 5, wherein said master control module further comprises: and each data storage module is connected with the MPSoC chip and is used for storing data corresponding to the single-mode computer in the main control module according to different preset data types.
7. The rocket-borne fully redundant integrated electronic system according to claim 1, wherein said business module comprises: the device comprises an acquisition module, a power distribution module, a time sequence module, a satellite guide module and a telemetry module.
8. The rocket-borne fully redundant integrated electronic system according to claim 2, wherein a plurality of control modules are disposed in the service module, and are configured to select a corresponding redundant module according to a control instruction of the main control module.
9. The rocket-borne fully redundant integrated electronic system according to claim 1, further comprising: and the extension module is used for carrying out function extension on the rocket-borne full-redundancy comprehensive electronic system according to a preset requirement.
10. The rocket-borne fully redundant integrated electronic system according to claim 1, wherein the main control module, the power supply module and the plurality of service modules all adopt a VPX daughter board structure.
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