CN115500011A - Positioning method for DPC ceramic substrate processing - Google Patents

Positioning method for DPC ceramic substrate processing Download PDF

Info

Publication number
CN115500011A
CN115500011A CN202211366644.3A CN202211366644A CN115500011A CN 115500011 A CN115500011 A CN 115500011A CN 202211366644 A CN202211366644 A CN 202211366644A CN 115500011 A CN115500011 A CN 115500011A
Authority
CN
China
Prior art keywords
exposure
substrate processing
positioning
ceramic substrate
positioning method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202211366644.3A
Other languages
Chinese (zh)
Other versions
CN115500011B (en
Inventor
孔进进
贺贤汉
李炎
王松
余龙
董明锋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sichuan Fulehua Semiconductor Technology Co ltd
Original Assignee
Sichuan Fulehua Semiconductor Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sichuan Fulehua Semiconductor Technology Co ltd filed Critical Sichuan Fulehua Semiconductor Technology Co ltd
Priority to CN202211366644.3A priority Critical patent/CN115500011B/en
Publication of CN115500011A publication Critical patent/CN115500011A/en
Application granted granted Critical
Publication of CN115500011B publication Critical patent/CN115500011B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0008Apparatus or processes for manufacturing printed circuits for aligning or positioning of tools relative to the circuit board
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0094Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement

Abstract

The invention discloses a positioning method for DPC ceramic substrate processing, relates to the field of semiconductor processing, and aims to solve the problem of no-mark point positioning during secondary exposure, and the technical scheme key points are as follows: a positioning method for DPC ceramic substrate processing comprises the following steps: a. punching a positioning hole on the ceramic chip; b. pasting a dry film on the ceramic chip; c. carrying out first exposure according to the positioning hole; d. standing for 15min after exposure for development; e. marking points are left after the development is finished; f. carrying out pattern electroplating and film removing etching; g. carrying out secondary exposure according to the left mark points and carrying out film pasting and selective exposure on the places needing thickening; h. after the exposure is finished, standing for 15 minutes again for development; i. and electroplating and thickening the exposed area after developing. The positioning method for DPC ceramic substrate processing can realize accurate positioning of secondary exposure and has good identification effect.

Description

Positioning method for DPC ceramic substrate processing
Technical Field
The invention relates to the field of DPC ceramic substrate processing, in particular to a positioning method for DPC ceramic substrate processing.
Background
DPC is also called Direct Plated Copper ceramic substrate (Direct Plated coater). The LED heat dissipation substrate is mainly applied to semiconductor refrigerators, optical communication modules, LED heat dissipation substrates, solar cell modules and the like. The process comprises the steps of firstly, preprocessing and cleaning a ceramic substrate, depositing a Ti/Cu layer on the surface of the substrate by a vacuum sputtering mode to be used as a seed layer, then, completing circuit manufacturing by photoetching, developing and etching processes, finally, increasing the thickness of a circuit by an electroplating mode, and completing substrate manufacturing after photoresist is removed.
The package substrate is a key link for connecting the internal and external heat dissipation paths, and can provide the effects of electric connection, protection, support, heat dissipation, assembly and the like for the chip. With the technology upgrading in recent years, the input power of the chip is higher and higher, and for high power products, the package substrate of the DPC ceramic substrate is required to have the characteristics of high electrical insulation, high thermal conductivity, thermal expansion coefficient matching with the chip, and the like, and the DPC ceramic substrate meets the requirement. First, the base material ceramic: compared with other metal materials or resin materials, the ceramic has the characteristics of good corrosion resistance, high mechanical strength, strong insulating property, simple processing technology and the like; in addition, the DPC adopts a special manufacturing process of magnetron sputtering and pattern electroplating: can realize a fine circuit with a diameter of 50 μm or less, and can achieve both precision and performance.
The existing DPC process is basically mature, but some industrial problems still exist, wherein the phenomenon of secondary exposure alignment dislocation is obvious, and aiming at the problem, the existing method is to grab the mark points after primary exposure after secondary film pasting, but because the surface of the product after primary exposure does not have the mark points, the alignment exposure cannot be carried out, the method is not suitable for the requirement of large-scale mass production, and the process is difficult to avoid to become the bottleneck of the whole process.
Therefore, a new solution is needed to solve this problem.
Disclosure of Invention
Aiming at the defects in the prior art, the invention aims to provide a positioning method for DPC ceramic substrate processing, which can perform mark point positioning through an initially arranged positioning hole during secondary exposure by adding a step of punching the positioning hole before pasting, and has high identification efficiency.
The technical purpose of the invention is realized by the following technical scheme: a positioning method for DPC ceramic substrate processing is characterized by comprising the following steps:
a. punching a positioning hole on the ceramic chip;
b. sticking a dry film on the ceramic chip;
c. carrying out first exposure according to the positioning hole;
d. standing for 15min after exposure for development;
e. marking points are left after the development is finished;
f. carrying out pattern electroplating and film removing etching;
g. carrying out secondary exposure according to the left mark points and carrying out film pasting and selective exposure on the places needing thickening;
h. after the exposure is finished, standing for 15 minutes again for development;
i. and electroplating and thickening the exposed area after development.
By adopting the technical scheme, the process of punching the positioning holes on the ceramic chip is added before the dry film is pasted on the ceramic chip, the positioning holes are arranged at four corners of the ceramic chip, each corner can be provided with two positioning holes, a punching drawing can be selected for punching the positioning holes before pretreatment, the positioning holes are used as mark points for first exposure after pretreatment, the phenomenon that the whole deviation of a graph area occurs, normal follow current is generated after the process, the mark points left by first exposure and development are used as references for grabbing when the secondary film pasting exposure is carried out after film stripping and etching, and the positioning is accurate.
The invention is further configured to: after the step a, punching a positioning hole, and filling rubber materials into the hole.
By adopting the technical scheme, the rubber material is filled in the positioning hole so as to avoid the shielding of the positioning hole in the subsequent step, and the mark point can not be identified with probability during the secondary exposure, so that the positioning hole can be prevented from being covered by the filling of the rubber material, and the rubber material can not be influenced by the subsequent process.
The invention is further configured to: the color of the rubber material is different from that of the ceramic chip.
By adopting the technical scheme, the color of the rubber material is set to be different from that of the ceramic chip mainly for distinguishing, if the colors are similar, the situation that the rubber material cannot be identified can still occur, so that the different colors are set for conveniently identifying the positioning holes as the marking points, the identification efficiency is improved, and the color which is greatly different from that of the ceramic chip is preferably adopted.
The invention is further configured to: the rubber material is red or black.
By adopting the technical scheme, the rubber material is ideally set to be red or black, and the red and black light reflecting effects are good and can be identified more easily; of course, other colors having high reflectivity may be used.
The invention is further configured to: after the step a, punching a positioning hole, and filling a soluble material in the hole.
Through adopting above-mentioned technical scheme, after having beaten the locating hole, at downthehole filling solubility material that can be heated, the solubility material is in order can stably fill in the locating hole when filling the locating hole, and when the material in the locating hole was got rid of to needs, can dissolve solubility material through the dissolving mode, just so can be very convenient get rid of the material in the locating hole, the solubility material can choose for use to be heated to melt or vaporize, perhaps can dissolve the reagent that runs off through chemical reagent.
The invention is further configured to: the soluble material is paraffin.
By adopting the technical scheme, the soluble material is selected as the paraffin mainly because the paraffin can not cause physical or chemical damage to the ceramic chip when filling the positioning hole, and meanwhile, when the ceramic chip is cleaned at the later stage, the paraffin can be directly dissolved and washed away by higher water temperature, so that the method is very convenient and trouble-saving.
The invention is further configured to: the color of the paraffin is red.
By adopting the technical scheme, the color of the paraffin is set to be red, which is mainly convenient to be used as a mark point for identification, and the red paraffin is easy to obtain, so that the cost is saved.
The invention is further configured to: and c, completely covering the positioning hole when the dry film is pasted in the step b.
By adopting the technical scheme, the positioning hole is completely covered when the dry film is adhered in the step b, so that the filled material can be retained in the positioning hole until the material is removed when the material is finally required to be removed.
The invention is further configured to: and (4) manually removing residues in the positioning holes after the step i.
By adopting the technical scheme, the positioning holes can be cleaned manually after the ceramic chip is processed, so that products which meet the requirements and are required by production can be obtained.
In conclusion, the invention has the following beneficial effects: through increase the step of making the locating hole before the paster, can carry out mark point location through the locating hole of initial setting when the secondary exposure, recognition efficiency is high, and pack corresponding material in this locating hole, avoid the locating hole to be covered or fuzzification when adding man-hour, no matter the material in the locating hole is rubber material or soluble material paraffin simultaneously, can not cause physics or chemical damage to the ceramic chip, simultaneously the homoenergetic enough very convenient quilt is taken out, moreover, the steam generator is simple in structure, and convenient for operation, counterpoint exposure efficiency is high like this, can accord with the demand of extensive volume production.
Detailed Description
The present invention will be described in detail with reference to examples.
The first embodiment is as follows: a positioning method for DPC ceramic substrate processing is characterized by comprising the following steps:
a. punching a positioning hole on the ceramic chip;
b. sticking a dry film on the ceramic chip;
c. carrying out first exposure according to the positioning hole;
d. standing for 15min after exposure for development;
e. marking points are left after the development is finished;
f. carrying out pattern electroplating and film removing etching;
g. carrying out secondary exposure according to the left mark points and carrying out film pasting and selective exposure on the places needing thickening;
h. after the exposure is finished, standing for 15 minutes again for development;
i. and electroplating and thickening the exposed area after developing.
The method is characterized in that a process of punching positioning holes in the ceramic chip is added before a dry film is pasted on the ceramic chip, the positioning holes are formed in four corners of the ceramic chip, two positioning holes can be formed in each corner, a punching drawing can be selected for punching the positioning holes before pretreatment, the positioning holes are used as mark points for first exposure after pretreatment, integral deviation of a graphic area is avoided, normal follow current is carried out in the later process, the mark points left by first exposure and development are used as reference for grabbing when secondary film pasting exposure is carried out after film stripping and etching, and positioning is accurate.
After the step a, punching the positioning hole, and filling a rubber material into the positioning hole, so that the rubber material is filled into the positioning hole to avoid the shielding of the positioning hole in the subsequent step, and thus, the mark point cannot be identified in the secondary exposure, so that the positioning hole can be prevented from being covered by the filling of the rubber material, and the rubber material cannot be influenced by the subsequent process; the rubber material can be red or black, and the ideal scheme is to set the rubber material to be red or black, so that the red and black light reflecting effects are good, and the rubber material is easier to identify; of course, other colors with high reflectivity can be adopted;
and completely covering the positioning hole when the dry film is pasted in the step b; b, completely covering the positioning hole when the dry film is pasted in the step b, so that the filled material can be retained in the positioning hole and removed until the material is finally removed; and (5) simultaneously, manually removing residues in the positioning holes after the step i, and cleaning the positioning holes manually after the ceramic chips are processed, so that products meeting the requirements required by production are obtained.
More than through increase the step of beating the locating hole before the paster, can carry out mark point location through the locating hole of initial setting when the secondary exposure, recognition efficiency is high, and pack corresponding material in this locating hole, avoid the locating hole to be covered or fuzzification when adding man-hour, the material in the locating hole is rubber materials simultaneously, can not cause physics or chemical damage to the ceramic chip, the quilt that the while homoenergetic is very convenient is taken out, moreover, the steam generator is simple in structure, and convenient for operation, it is efficient to counterpoint exposure like this, can accord with the demand of extensive volume production.
The second embodiment: a positioning method for DPC ceramic substrate processing is characterized by comprising the following steps:
a. punching a positioning hole on the ceramic chip;
b. sticking a dry film on the ceramic chip;
c. carrying out first exposure according to the positioning hole;
d. standing for 15min after exposure for development;
e. marking points are left after the development is finished;
f. carrying out pattern electroplating and film removing etching;
g. carrying out secondary exposure according to the left mark points and carrying out film pasting and selective exposure on the places needing thickening;
h. after the exposure is finished, standing for 15 minutes again for development;
i. and electroplating and thickening the exposed area after developing.
The process for punching the positioning holes in the ceramic chip is added before the ceramic chip is pasted with the dry film, the positioning holes are formed in four corners of the ceramic chip, each corner can be provided with two positioning holes, a punching drawing can be selected for punching the positioning holes before pretreatment, the positioning holes are used as mark points for first exposure after pretreatment, the phenomenon that a graphic area is wholly deviated is avoided, normal follow current is carried out in the later process, the mark points left by first exposure and development are used as references for grabbing during the second film pasting exposure after film stripping and etching, and the positioning is accurate.
After the step a, punching a positioning hole, and filling a soluble material in the hole; after the positioning hole is punched, a material which can be heated and dissolved is filled in the hole, the soluble material is used for being stably filled in the positioning hole when the positioning hole is filled, and when substances in the positioning hole need to be removed, the soluble material can be dissolved in a dissolving mode, so that the substances in the positioning hole can be conveniently removed, and the soluble material can be selected from a reagent which is heated to be melted or vaporized or can be dissolved and lost through a chemical reagent; of course the soluble material may be chosen to be paraffin; the paraffin does not cause physical or chemical damage to the ceramic chip when filling the positioning hole, and meanwhile, the paraffin can be directly dissolved and washed away by higher water temperature when the ceramic chip is cleaned at the later stage, so that the method is very convenient and trouble-saving; the color of the paraffin wax may be chosen to be red; the method is mainly convenient to be used as a mark point for identification, red paraffin is easy to obtain, cost is obtained, and meanwhile, the positioning hole is completely covered when the dry film is pasted in the step b; the filled material can be remained in the positioning hole until being removed finally, and the residue in the positioning hole is manually removed after the step i, so that the positioning hole is cleaned manually, and the product meeting the requirements required by production is obtained.
More than through increase the step of making the locating hole before the paster, can mark the point location through the locating hole of initial setting when the secondary exposure, recognition efficiency is high, and pack corresponding material in this locating hole, avoid the locating hole to be covered or fuzzification when adding man-hour, material dissolubility material paraffin in the locating hole simultaneously, can not cause physics or chemical damage to the ceramic chip, simultaneously homoenergetic enough very convenient quilt is taken out, moreover, the steam generator is simple in structure, and convenient for operation, counterpoint exposure efficiency is high like this, can accord with the demand of extensive volume production.
The above description is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above embodiments, and all technical solutions belonging to the idea of the present invention belong to the protection scope of the present invention. It should be noted that modifications and adaptations to those skilled in the art without departing from the principles of the present invention should also be considered as within the scope of the present invention.

Claims (9)

1. A positioning method for DPC ceramic substrate processing is characterized by comprising the following steps:
a. punching a positioning hole on the ceramic chip;
b. sticking a dry film on the ceramic chip;
c. carrying out first exposure according to the positioning hole;
d. after exposure, standing for 15min for development;
e. marking points are left after the development is finished;
f. carrying out pattern electroplating and film removing etching;
g. carrying out secondary exposure according to the left mark points and carrying out film pasting and selective exposure on the places needing to be thickened;
h. after the exposure is finished, standing for 15 minutes again for development;
i. and electroplating and thickening the exposed area after developing.
2. The positioning method for DPC ceramic substrate processing according to claim 1, wherein: after the step a, punching a positioning hole, and filling rubber materials in the hole.
3. The positioning method for DPC ceramic substrate processing according to claim 2, wherein: the color of the rubber material is different from that of the ceramic chip.
4. The positioning method for DPC ceramic substrate processing according to claim 3, wherein: the rubber material is red or black.
5. The positioning method for DPC ceramic substrate processing according to claim 1, wherein: after the step a, punching a positioning hole, and filling a soluble material in the hole.
6. The positioning method for DPC ceramic substrate processing according to claim 5, wherein: the soluble material is paraffin.
7. The positioning method for DPC ceramic substrate processing according to claim 6, wherein: the paraffin wax is red in color.
8. The positioning method for DPC ceramic substrate processing according to claim 2 or 5, wherein: and c, completely covering the positioning hole when the dry film is pasted in the step b.
9. The positioning method for DPC ceramic substrate processing according to claim 8, wherein: and (3) manually removing residues in the positioning holes after the step i.
CN202211366644.3A 2022-11-03 2022-11-03 Positioning method for DPC ceramic substrate processing Active CN115500011B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202211366644.3A CN115500011B (en) 2022-11-03 2022-11-03 Positioning method for DPC ceramic substrate processing

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211366644.3A CN115500011B (en) 2022-11-03 2022-11-03 Positioning method for DPC ceramic substrate processing

Publications (2)

Publication Number Publication Date
CN115500011A true CN115500011A (en) 2022-12-20
CN115500011B CN115500011B (en) 2023-02-03

Family

ID=85105951

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202211366644.3A Active CN115500011B (en) 2022-11-03 2022-11-03 Positioning method for DPC ceramic substrate processing

Country Status (1)

Country Link
CN (1) CN115500011B (en)

Citations (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0640064A (en) * 1992-07-23 1994-02-15 Ngk Spark Plug Co Ltd Manufacture of glazed ceramic substrate
US5710063A (en) * 1996-06-06 1998-01-20 Sun Microsystems, Inc. Method for improving the alignment of holes with other elements on a printed circuit board
JP2001251051A (en) * 2000-03-06 2001-09-14 Ibiden Co Ltd Printed wiring board and method for manufacturing printed wiring board
US20040016570A1 (en) * 2001-10-10 2004-01-29 Reo Yamamoto Substrate and method of manufacturing the same
US20050150683A1 (en) * 2004-01-12 2005-07-14 Farnworth Warren M. Methods of fabricating substrates and substrate precursor structures resulting therefrom
JP2007324301A (en) * 2006-05-31 2007-12-13 Denki Kagaku Kogyo Kk Method for manufacturing nitride ceramics circuit board
CN101460014A (en) * 2007-12-11 2009-06-17 同欣电子工业股份有限公司 Direct copper coating metallization manufacturing process for substrate
JP2014049509A (en) * 2012-08-29 2014-03-17 Ngk Spark Plug Co Ltd Wiring board manufacturing method
CN104392935A (en) * 2014-11-10 2015-03-04 北京大学东莞光电研究院 Metallization method of power device module encapsulation-used ceramic substrate
CN104600022A (en) * 2013-10-30 2015-05-06 泉州市金太阳照明科技有限公司 Method for manufacturing interconnect circuit
CN104902689A (en) * 2014-03-05 2015-09-09 立诚光电股份有限公司 Method for manufacturing circuit and a ceramic substrate having circuit pattern
JP2017005182A (en) * 2015-06-15 2017-01-05 株式会社アイン Method for manufacturing ceramic wiring board
CN108174524A (en) * 2017-12-29 2018-06-15 赛创电气(铜陵)有限公司 A kind of DPC ceramic circuit-boards and preparation method thereof
CN113891557A (en) * 2021-09-17 2022-01-04 江苏苏杭电子有限公司 Printed circuit board manufacturing method
CN113891578A (en) * 2021-09-13 2022-01-04 惠州中京电子科技有限公司 HDI board manufacturing method for local electroplating hole filling and HDI board
CN115279053A (en) * 2022-08-02 2022-11-01 深圳市星河电路股份有限公司 Processing method of aluminum nitride circuit board

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH668880A5 (en) * 1985-07-25 1989-01-31 Durgo Ag METHOD FOR PRODUCING LEVEL ELECTRICAL CIRCUITS.
JPH0614582B2 (en) * 1990-11-19 1994-02-23 日本シイエムケイ株式会社 Hole masking device
JPH11233948A (en) * 1998-02-10 1999-08-27 Hitachi Aic Inc Manufacture of printed wiring board
JP2001230517A (en) * 2000-02-16 2001-08-24 Mitsubishi Gas Chem Co Inc Method for forming hole by using carbon dioxide gas laser
JP4245365B2 (en) * 2003-02-03 2009-03-25 三洋電機株式会社 Multilayer substrate manufacturing method and circuit device manufacturing method using the same
JP2007128954A (en) * 2005-11-01 2007-05-24 Hitachi Chem Co Ltd Method of manufacturing printed wiring board
CN102300412A (en) * 2011-08-19 2011-12-28 东莞生益电子有限公司 Processing method for back drilling of PCB
CN109429429B (en) * 2017-09-01 2020-06-23 北大方正集团有限公司 Manufacturing method of vertical wiring in printed circuit board and printed circuit board
CN209299589U (en) * 2018-09-03 2019-08-23 上海申和热磁电子有限公司 A kind of jig plate for DBC substrate automatic exposure
CN214655321U (en) * 2020-12-31 2021-11-09 江阴康强电子有限公司 Electroplating device of high-precision lead frame
CN216144175U (en) * 2021-08-19 2022-03-29 江苏富乐华半导体科技股份有限公司 Copper-clad ceramic substrate double-sided sintering jig
CN115279042A (en) * 2022-07-26 2022-11-01 江苏富乐华半导体科技股份有限公司 Preparation method of chemically nickel-plated gold DPC ceramic substrate

Patent Citations (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0640064A (en) * 1992-07-23 1994-02-15 Ngk Spark Plug Co Ltd Manufacture of glazed ceramic substrate
US5710063A (en) * 1996-06-06 1998-01-20 Sun Microsystems, Inc. Method for improving the alignment of holes with other elements on a printed circuit board
JP2001251051A (en) * 2000-03-06 2001-09-14 Ibiden Co Ltd Printed wiring board and method for manufacturing printed wiring board
US20040016570A1 (en) * 2001-10-10 2004-01-29 Reo Yamamoto Substrate and method of manufacturing the same
US20050150683A1 (en) * 2004-01-12 2005-07-14 Farnworth Warren M. Methods of fabricating substrates and substrate precursor structures resulting therefrom
JP2007324301A (en) * 2006-05-31 2007-12-13 Denki Kagaku Kogyo Kk Method for manufacturing nitride ceramics circuit board
CN101460014A (en) * 2007-12-11 2009-06-17 同欣电子工业股份有限公司 Direct copper coating metallization manufacturing process for substrate
JP2014049509A (en) * 2012-08-29 2014-03-17 Ngk Spark Plug Co Ltd Wiring board manufacturing method
CN104600022A (en) * 2013-10-30 2015-05-06 泉州市金太阳照明科技有限公司 Method for manufacturing interconnect circuit
CN104902689A (en) * 2014-03-05 2015-09-09 立诚光电股份有限公司 Method for manufacturing circuit and a ceramic substrate having circuit pattern
CN104392935A (en) * 2014-11-10 2015-03-04 北京大学东莞光电研究院 Metallization method of power device module encapsulation-used ceramic substrate
JP2017005182A (en) * 2015-06-15 2017-01-05 株式会社アイン Method for manufacturing ceramic wiring board
CN108174524A (en) * 2017-12-29 2018-06-15 赛创电气(铜陵)有限公司 A kind of DPC ceramic circuit-boards and preparation method thereof
CN113891578A (en) * 2021-09-13 2022-01-04 惠州中京电子科技有限公司 HDI board manufacturing method for local electroplating hole filling and HDI board
CN113891557A (en) * 2021-09-17 2022-01-04 江苏苏杭电子有限公司 Printed circuit board manufacturing method
CN115279053A (en) * 2022-08-02 2022-11-01 深圳市星河电路股份有限公司 Processing method of aluminum nitride circuit board

Also Published As

Publication number Publication date
CN115500011B (en) 2023-02-03

Similar Documents

Publication Publication Date Title
US5107586A (en) Method for interconnecting a stack of integrated circuits at a very high density
US5019946A (en) High density interconnect with high volumetric efficiency
US7358114B2 (en) Semiconductor device substrate, semiconductor device, and manufacturing method thereof
US5316787A (en) Method for manufacturing electrically isolated polyimide coated vias in a flexible substrate
CN102891131A (en) Semiconductor substrate, package and device and manufacturing methods thereof
CN114156621B (en) Lumped parameter circulator for communication based on MEMS technology and manufacturing method thereof
CN102024772B (en) Heat-dissipating substrate and fabricating method thereof
CN103517548A (en) Wiring substrate and method of manufacturing the same
US3893156A (en) Novel beam lead integrated circuit structure and method for making the same including automatic registration of beam leads with corresponding dielectric substrate leads
US9231167B2 (en) Insulation structure for high temperature conditions and manufacturing method thereof
CN115500011B (en) Positioning method for DPC ceramic substrate processing
CN113079626A (en) Ceramic substrate thin film circuit structure and preparation method thereof
US6204565B1 (en) Semiconductor carrier and method for manufacturing the same
CN114447552B (en) Novel micro-strip circulator based on MEMS (micro-electromechanical systems) process and processing method thereof
JPH0225079A (en) Amorphous semiconductor solar cell
CN110581120A (en) fine line structure of board-level fan-out packaging substrate and preparation method thereof
CN111092048B (en) Air bridge structure protection method of three-dimensional integrated chip
WO2024055259A1 (en) Circuit board connection structure and manufacturing method therefor
CN217544606U (en) Embedded chip packaging structure
US8466447B2 (en) Back contact to film silicon on metal for photovoltaic cells
CN115507640A (en) Method for drying wafer back after etching
CN117525014A (en) Large-size copper-carbon nanotube electric heat simultaneous transmission TSV structure and preparation method
TWI241683B (en) Method for fabricating interconnecting in an insulating layer on a wafer and structure of the same
CN113113320A (en) Method for forming circuit on substrate
RU2047948C1 (en) Process of manufacture of hybrid integrated circuits

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant