CN115280490A - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN115280490A
CN115280490A CN202180019313.XA CN202180019313A CN115280490A CN 115280490 A CN115280490 A CN 115280490A CN 202180019313 A CN202180019313 A CN 202180019313A CN 115280490 A CN115280490 A CN 115280490A
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China
Prior art keywords
semiconductor device
substrate
lead
conductive
pad
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Pending
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CN202180019313.XA
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English (en)
Inventor
滨宪治
石松祐司
原英夫
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Rohm Co Ltd
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Rohm Co Ltd
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Publication of CN115280490A publication Critical patent/CN115280490A/zh
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Abstract

半导体装置具有：基板、导电部、控制装置以及密封树脂。所述基板具有在z方向上彼此朝向相反侧的基板主面及基板背面。所述导电部形成在所述基板主面上且由导电性材料构成。所述控制装置与所述导电部电连接，且配置在所述基板主面上。所述密封树脂覆盖所述基板的至少一部分和所述控制装置。所述导电部包含在z方向观察与所述控制装置重叠的重叠布线。所述重叠布线构成为在与所述控制装置重叠的范围内不与所述控制装置导通接合。

Description

半导体装置
技术领域
本公开涉及半导体装置。
背景技术
作为多种半导体装置中的一种，有称为IPM(Intelligent Power Module：智能功率模块)的半导体装置。这样的半导体装置具有：半导体芯片、控制半导体芯片的控制芯片、以及覆盖半导体芯片和控制芯片的密封树脂(参照专利文献1)。
现有技术文献
专利文献
专利文献1：日本特开2020-4893号公报
发明内容
发明要解决的课题
在控制芯片中有多种控制信号的输入输出。控制信号的数量越增加，越需要增加向控制芯片的导通路径的数量，但若想要如以往那样由金属制的多个引线构成这些导通路径，则半导体装置进一步的高集成化可能变得困难。
本公开是鉴于上述情况而完成的，其一个课题在于提供一种能够实现更高集成化的半导体装置。
用于解决课题的手段
根据本公开的第一方面提供的半导体装置具有：基板，其具有在厚度方向上彼此朝向相反侧的基板主面和基板背面；导电部，其形成在所述基板主面上且由导电性材料构成；电子部件，其与所述导电部电连接，且配置在所述基板主面上；以及密封树脂，其覆盖所述基板的至少一部分和所述电子部件。所述导电部包含：在所述厚度方向观察，与所述电子部件重叠的重叠布线，该重叠布线在与所述电子部件重叠的范围内不与所述电子部件导通接合。
根据上述的半导体装置，能够通过形成于基板主面上的导电部来构成向电子部件的导通路径。因此，与例如由金属制的引线构成导通路径的情况相比，能够实现导通路径的细线化、高密度化。另外，在厚度方向观察，重叠布线配置成与电子部件重叠。因此，与配置成使导通路径迂回地不与电子部件重叠的情况相比，能够缩短导通路径，另外，导通路径的设计自由度变大。因此，能够促进半导体装置A1的高集成化。
本公开的其他特征以及优点通过参照附图在以下进行的详细说明而变得更加明确。
附图说明
图1是表示本公开的第一实施方式的半导体装置的立体图。
图2是表示图1的半导体装置的俯视图。
图3是表示图1的半导体装置的俯视图，是透过了密封树脂的图。
图4是表示图1的半导体装置的仰视图。
图5是沿着图3的V-V线的剖视图。
图6是图3的局部放大图。
图7是沿着图6的VII-VII线的剖视图。
图8是表示图1的半导体装置的基板的俯视图。
图9是表示图1的半导体装置的制造方法的一例的一工序的流程图。
图10是表示本公开的第二实施方式的半导体装置的剖视图。
图11是将图10的一部分放大后的局部放大剖视图。
图12是表示本公开的第三实施方式的半导体装置的俯视图，是透过了密封树脂的图。
图13是表示本公开的第四实施方式的半导体装置的剖视图。
图14是将图13的一部分放大后的局部放大剖视图。
图15是将图13的一部分放大后的局部放大剖视图。
具体实施方式
以下，参照附图对本公开的优选实施方式进行具体说明。
在本公开中，“某物A形成于某物B”以及“某物A形成于某物B上”，只要没有特别说明，包含“某物A直接形成于某物B”以及“某物A与某物B之间夹着其他物，且某物A形成于某物B”。同样地，“某物A配置在某物B”以及“某物A配置在某物B上”，只要没有特别说明，包含“某物A直接配置在某物B”以及“在某物A与某物B之间夹着其他物，且某物A配置在某物B”。同样地，“某物A位于某物B上”，只要没有特别说明，包含“某物A与某物B相接，某物A位于某物B上”、以及“某物A与某物B之间夹着其他物，且某物A位于某物B上”。另外，“在某方向上观察，某物A与某物B重叠”，只要没有特别说明，包含“某物A与某物B的全部重叠”、以及“某物A与某物B的一部分重叠”。
<第一实施方式>
图1～图8示出了本公开的半导体装置的一例。本实施方式的半导体装置A1具有：多个引线1、基板2、多个接合部25、导电部3、2个半导体芯片4、2个控制装置5、多个无源元件6、多个导线71、多个导线72以及密封树脂8。在本实施方式中，半导体装置A1是IPM(Intelligent Power Module：智能功率模块)。半导体装置A1例如用于空气调节机、马达控制设备等用途。
图1是表示半导体装置A1的立体图。图2是表示半导体装置A1的俯视图。图3是表示半导体装置A1的俯视图，是透过了密封树脂8的图。此外，在图3中，用虚拟线(双点划线)表示密封树脂8的外形。图4是表示半导体装置A1的仰视图。图5是沿着图3的V-V线的剖视图。图6是图3的局部放大图。图7是沿着图6的VII-VII线的剖视图。此外，在图7中，省略了密封树脂8。图8是表示基板2的俯视图。
为了便于说明，将基板2的厚度方向(俯视方向)设为z方向，将沿着与z方向正交的基板2的一边的方向(图2～图4中的左右方向)设为x方向，将与z方向及x方向正交的方向(图2～图4中的上下方向)设为y方向。z方向是“厚度方向”的一例。
基板2为板状，z方向观察的形状为在x方向上长的矩形形状。基板2的厚度(z方向的尺寸)例如为0.1mm～1.0mm左右。此外，基板2的各尺寸没有限定。基板2由绝缘性的材料构成。基板2的材料没有特别限定。作为基板2的材料，例如优选热传导率比密封树脂8的材料高的材料。作为基板2的材料，例如列举氧化铝(Al2O3)、氮化硅(SiN)、氮化铝(AlN)、含氧化锆的氧化铝等陶瓷。
基板2具有基板主面21和基板背面22。基板主面21和基板背面22是在z方向上彼此朝向相反侧的面，均是与z方向正交的平坦面。基板主面21是朝向图5的上方的面。在基板主面21形成有导电部3和多个接合部25，搭载有多个引线1和多个电子部件。在多个电子部件中包含：2个半导体芯片4、2个控制装置5以及多个无源元件6。基板背面22是朝向图5的下方的面。如图4所示，基板背面22从密封树脂8露出。基板主面21和基板背面22的形状均为矩形形状。此外，基板2的形状没有限定。
导电部3形成在基板2上。在本实施方式中，导电部3形成在基板2的基板主面21上。导电部3由导电性材料构成。构成导电部3的导电性材料没有特别限定。作为导电部3的导电性材料，例如列举包含银(Ag)、铜(Cu)、金(Au)等的材料。在以下的说明中，以导电部3包含银的情况为例进行说明。此外，导电部3可以包含铜来代替银，也可以包含金来代替银或铜。或者，导电部3也可以包含Ag-Pt、Ag-Pd。导电部3的形成方法没有限定，例如通过对包含这些金属的膏进行烧制而形成。导电部3的厚度没有特别限定，例如为5μm～30μm左右。
导电部3的形状没有特别限定。在本实施方式中，例如图8所示，导电部3包含：多个第一焊盘31、多个第二焊盘32以及多个连接布线33。各第一焊盘31例如是长矩形形状，与控制装置5导通接合。此外，第一焊盘31的形状没有限定。配置成各第一焊盘31相互分离。各第二焊盘32例如为矩形形状，并与引线15(后述)、半导体芯片4、及无源元件6中的任一个导通接合。此外，第二焊盘32的形状没有限定。配置成各第二焊盘32相互分离。各连接布线33与第一焊盘31中的任一个和第二焊盘32中的任一个连接。另外，在连接布线33中，也有与2个第一焊盘31连接的连接布线。另外，在第一焊盘31和第二焊盘32中，也有不与连接布线33连接的焊盘。连接布线33和与控制装置5导通接合的第一焊盘31连接，因此，与控制装置5导通，但没有与控制装置5导通接合。
在本实施方式中，在z方向观察，一部分连接布线33与控制装置5重叠。即，该连接布线33配置在基板2的基板主面21与控制装置5之间。连接布线33中的包含与控制装置5重叠的部分的连接布线是“重叠布线”的一例。
在本实施方式中，如图3和图8所示，连接布线33包含连接布线33a、33b、33c、33d、33e、33f、33g、33h。连接布线33a与控制装置5a(后述)重叠，并和与控制装置5a导通接合的第一焊盘31、经由导线72与半导体芯片4a(后述)导通连接的第二焊盘32连接。连接布线33b与控制装置5a重叠，并和与控制装置5a导通接合的第一焊盘31、与引线15导通接合的第二焊盘32连接。连接布线33c与控制装置5b(后述)重叠，并和与控制装置5b导通接合的第一焊盘31、与引线15导通接合的第二焊盘32连接。连接布线33d与控制装置5a重叠，并和与控制装置5a导通接合的第一焊盘31、与控制装置5b导通接合的第一焊盘31、与引线15导通接合的第二焊盘32连接。
连接布线33e与控制装置5b重叠，并和与控制装置5b导通接合的第一焊盘31、经由导线72与半导体芯片4b(后述)导通连接的第二焊盘32连接。连接布线33f与控制装置5b重叠，并和与控制装置5b导通接合的第一焊盘31、经由导线72与半导体芯片4b导通连接且与无源元件6导通接合的第二焊盘32连接。连接布线33g与控制装置5b重叠，并和与控制装置5b导通接合的第一焊盘31、与无源元件6导通接合的第二焊盘32连接。连接布线33h与控制装置5b重叠，并和与控制装置5b导通接合的第一焊盘31、与引线15导通接合的第二焊盘32连接。各连接布线33的配置以及形状没有限定，上述只不过是一例。
如图8所示，多个接合部25形成在基板2上。在本实施方式中，多个接合部25形成于基板2的基板主面21上的靠y方向的一侧(在图8中为下侧)的位置。接合部25的材料没有特别限定，例如由能够将基板2与引线1接合的材料构成。接合部25例如由导电性材料构成。构成接合部25的导电性材料没有特别限定。作为接合部25的导电性材料，例如列举包含银(Ag)、铜(Cu)、金(Au)等的材料。在以下的说明中，以接合部25包含银的情况为例进行说明。该例中的接合部25包含与构成导电部3的导电性材料相同的材料。此外，接合部25可以包含铜来代替银，也可以包含金来代替银或铜。或者，接合部25也可以包含Ag-Pt、Ag-Pd。接合部25的形成方法没有限定，例如与导电部3一样，通过对包含这些金属的膏进行烧制而形成。接合部25的厚度没有特别限定，例如为5μm～30μm左右。
在本实施方式中，如图8所示，多个接合部25包含接合部251、252、253。接合部251、252、253相互分离。接合部251形成于基板2的z方向观察的靠x方向的一侧(在图8中为右侧)的位置。接合部251与引线11(后述)接合。接合部253形成于基板2的z方向观察的x方向的中央附近。接合部253与引线13(后述)接合。接合部252形成为包围接合部251。接合部252与引线12(后述)接合。此外，接合部251、252、253的形状以及配置没有限定。
多个引线1构成为包含金属，例如热传导率比基板2高。构成引线1的金属没有特别限定，例如为铜(Cu)、铝、铁(Fe)、无氧铜或它们的合金(例如Cu-Sn合金、Cu-Zr合金、Cu-Fe合金等)。另外，也可以对多个引线1实施镀镍(Ni)。多个引线1例如可以通过将模具按压到金属板的冲压加工而形成，也可以通过利用蚀刻对金属板进行图案化而形成。此外，多个引线1的形成方法没有限定。各引线1的厚度没有特别限定，例如为0.4mm～0.8mm左右。各引线1相互分离。
在本实施方式中，多个引线1包含：引线11、引线12、引线13、引线14以及多个引线15。引线11、引线12、引线13以及引线14构成向半导体芯片4的导通路径。多个引线15构成向控制装置5或无源元件6的导通路径。
引线11配置在基板2上，在本实施方式中，配置在基板主面21上。关于引线11，引线11经由接合材料75与接合部25接合。接合材料75只要能够将引线11与接合部25接合即可。从将来自引线11的热更高效地传递到基板2的观点出发，接合材料75优选热传导率更高的材料，例如使用银膏、铜膏、焊料等。但是，接合材料75也可以是环氧系树脂、硅酮系树脂等绝缘性材料。另外，在基板2没有形成接合部25时，引线11也可以与基板2接合。
引线11的结构没有特别限定。在本实施方式中，如图5所示，将引线11划分为第一部111、第二部112、第三部113以及第四部114来进行说明。
第一部111具有主面111a和背面111b。主面111a和背面111b是在z方向上相互朝向相反侧的面，均是与z方向正交的平坦面。主面111a是朝向图5的上方的面。主面111a与半导体芯片4a接合。背面111b是朝向图5的下方的面。背面111b通过接合材料75与接合部25接合。第三部113和第四部114被密封树脂8覆盖。第三部113与第一部111和第四部114相连。第四部114与第三部113和第二部112相连。第二部112与第四部114的端部相连，是引线11中的从密封树脂8突出的部分。第二部112在y方向上向第一部111的相反侧突出。第二部112例如用于将半导体装置A1与外部的电路电连接。在图示的例子中，第二部112在z方向上向第一部111的主面111a朝向的一侧弯折。
引线12配置在基板2上，在本实施方式中，配置在基板主面21上。引线12经由接合材料75与接合部25接合。引线12的结构没有特别限定。在本实施方式中，引线12的结构与引线11的结构一样。引线12与半导体芯片4b接合。
引线13配置在基板2上，在本实施方式中，配置在基板主面21上。引线13经由接合材料75与接合部25接合。引线13的结构没有特别限定。在本实施方式中，引线13的结构与引线11的结构一样。引线13不与半导体芯片4接合。
在本实施方式中，引线14未配置在基板2上，不包含相当于引线11的第一部111及第三部113的部位。此外，引线14的结构不限定于此。
多个引线15分别配置在基板2上，在本实施方式中，配置在基板主面21上。各引线15分别经由导电性接合材料76与导电部3的第二焊盘32接合。导电性接合材料76只要能够将引线15与第二焊盘32接合且将引线15与第二焊盘32电连接即可。导电性接合材料76例如使用银膏、铜膏、焊料等。
引线15的结构没有特别限定。在本实施方式中，如图5所示，将引线15划分为第一部151、第二部152、第三部153以及第四部154来进行说明。
第一部151具有主面151a和背面151b。主面151a和背面151b是在z方向上彼此朝向相反侧的面，均是与z方向正交的平坦面。主面151a是朝向图5的上方的面。背面151b是朝向图5的下方的面。背面151b通过导电性接合材料76与第二焊盘32接合。第三部153和第四部154被密封树脂8覆盖。第三部153与第一部151和第四部154相连。第四部154与第三部153和第二部152相连。第二部152与第四部154的端部相连，是引线15中的从密封树脂8突出的部分。第二部152在y方向上向第一部151的相反侧突出。第二部152例如用于将半导体装置A1与外部的电路电连接。在图示的例子中，第二部152在z方向上向第一部151的主面151a朝向的一侧弯折。
2个半导体芯片4分别配置在任一个引线1上。在区别2个半导体芯片4来记载时，将一方设为半导体芯片4a，将另一方设为半导体芯片4b。在不区别两者时，简称为半导体芯片4。半导体芯片4的种类、功能没有特别限定，在本实施方式中，以半导体芯片4是控制电力的功率晶体管的情况为例进行说明。半导体芯片4例如是由SiC(碳化硅)基板构成的MOSFET(metal-oxide-semiconductor field-effect transistor：金属氧化物半导体场效应晶体管)。此外，半导体芯片4也可以为代替SiC基板而由Si(硅)基板构成的MOSFET，例如也可以包含IGBT元件。另外，还可以是包含GaN(氮化镓)的MOSFET。此外，在本实施方式中，示出了半导体装置A1具有2个半导体芯片4的情况，但这是一例，半导体芯片4的个数没有限定。
半导体芯片4为z方向观察矩形形状的板状，其具有：元件主面41、元件背面42、源极电极43、栅极电极44以及漏极电极45。元件主面41和元件背面42在z方向上彼此朝向相反侧。元件主面41是朝向图5的上方的面。元件背面42是朝向图5的下方的面。如图3所示，在元件主面41配置有源极电极43和栅极电极44。另外，在元件背面42配置有漏极电极45。此外，源极电极43、栅极电极44及漏极电极45的形状及配置没有限定。
如图3及图5所示，半导体芯片4a配置在引线11上。如图5所示，关于半导体芯片4a，使元件背面42朝向引线11，通过导电性接合材料(省略图示)与引线11接合。由此，半导体芯片4a的漏极电极45通过导电性接合材料与引线11导通连接。导电性接合材料例如使用银膏、铜膏、焊料等。另外，如图3所示，半导体芯片4a的源极电极43通过导线71与引线12导通连接。导线71例如由铝(Al)、铜(Cu)构成。此外，导线71的材料、线径以及根数没有限定。如图3所示，半导体芯片4b配置在引线12上。关于半导体芯片4b，使元件背面42朝向引线12，通过导电性接合材料(省略图示)与引线12接合。由此，半导体芯片4b的漏极电极45通过导电性接合材料与引线12导通连接。如图3所示，半导体芯片4b的源极电极43通过导线71与引线14导通连接。由此，形成将半导体芯片4a的漏极电极45与半导体芯片4b的源极电极43连接的桥接电路。
如图3所示，半导体芯片4a的源极电极43及栅极电极44分别经由导线72和导电部3与控制装置5a导通连接。导线72例如由金(Au)、银(Ag)、铜(Cu)、铝(Al)等构成。此外，导线72的材料、线径以及根数没有限定。控制装置5a将驱动信号输入到半导体芯片4a的栅极电极44。半导体芯片4b的源极电极43和栅极电极44分别经由导线72和导电部3与控制装置5b导通连接。控制装置5b将驱动信号输入到半导体芯片4b的栅极电极44。在引线11与引线14之间施加直流电压，向半导体芯片4a、4b的栅极电极44输入驱动信号，由此，从引线12输出根据驱动信号切换电压的开关信号。
2个控制装置5分别控制半导体芯片4的驱动，并配置在基板2的基板主面21上。在区别2个控制装置5来记载时，将一方设为控制装置5a，将另一方设为控制装置5b。在不区别两者时，简称为控制装置5。控制装置5a控制半导体芯片4a的驱动。控制装置5b控制半导体芯片4b的驱动。如图5所示，在x方向观察，控制装置5位于半导体芯片4与引线15之间。另外，如图3所示，在y方向观察，控制装置5a与半导体芯片4a重叠，控制装置5b与半导体芯片4b重叠。控制装置5a以及控制装置5b的配置没有限定。
如图7所示，控制装置5具有：对置面50、控制芯片51、晶片焊盘(管芯焊盘，diepad)52、多个引线53、树脂54以及多个导线55。控制芯片51是控制半导体芯片4的驱动的集成电路，输出使半导体芯片4驱动的驱动信号。晶片焊盘52以及多个引线53例如是由铜(Cu)构成的板状部件。晶片焊盘52搭载控制芯片51。各引线53通过导线55与控制芯片51导通。树脂54覆盖控制芯片51以及导线55的整体和各引线53的一部分，例如由环氧树脂、硅凝胶等绝缘性材料构成。
各引线53在树脂54的x方向的两端部沿y方向隔开间隔地排列。各引线53沿x方向延伸，各引线53的一部分从树脂54的x方向的两侧面突出。各引线53的从树脂54突出的部分与导电部3的第一焊盘31导通接合。在本实施方式中，控制装置5是SOP(Small OutlinePackage：小外形封装)类型的封装。控制装置5的封装类型不限于SOP类型，例如也可以是QFP(Quad Flat Package：方形扁平封装)类型、SOJ(Small Outline J-lead Package：小外形J型引脚封装)类型等其他类型的封装。各引线53分别经由导电性接合材料76与导电部3的第一焊盘31接合。
对置面50是在将控制装置5配置于基板2的状态下与基板主面21对置的面，整面由树脂54构成。在本实施方式中，在z方向观察，一部分连接布线33(重叠布线)与控制装置5重叠，并配置在基板2的基板主面21与控制装置5的对置面50之间。关于控制装置5，控制芯片51被树脂54覆盖，在对置面50配置有树脂54，因此，防止控制芯片51与重叠布线接触。在代替控制装置5而将控制芯片51直接配置于基板2的情况下，控制芯片51与重叠布线接触，因此，无法使用重叠布线，需要配置成使连接布线33迂回。
在本实施方式中，控制装置5是“电子部件”的一例，控制芯片51是“电子元件”的一例，树脂54是“绝缘部”的一例。控制装置5的尺寸、形状、引线的数量等没有限定。控制装置5可以具有多个控制芯片51，也可以具有控制芯片51以外的电路芯片。
多个无源元件6配置在基板2的基板主面21上，与导电部3或引线1导通接合。无源元件6例如是电阻、电容器、线圈、二极管等。无源元件6包含分流电阻6a和热敏电阻6b。
分流电阻6a配置成跨引线12和引线13，并与引线12及引线13导通接合。分流电阻6a将从流过引线12的电流分流而得的电流从引线13输出。热敏电阻6b与导电部3的2个第二焊盘32导通接合。该2个第二焊盘32分别经由导线72及导电部3与互不相同的引线15导通连接。热敏电阻6b通过在该2个引线15之间施加电压，而输出与周围的温度对应的电流。
其他的无源元件6与导电部3的第二焊盘32导通接合，经由连接布线33和第一焊盘31与控制装置5导通。此外，各无源元件6的种类、配置位置、数量没有限定。在本实施方式中，无源元件6是“第二电子部件”的一例。
密封树脂8至少覆盖半导体芯片4a、4b、控制装置5a、5b、多个无源元件6以及导线71、72、多个引线1的各一部分、基板2的一部分。密封树脂8的材料没有特别限定，例如适当使用环氧树脂、硅凝胶等绝缘材料。
密封树脂8具有：树脂主面81、树脂背面82以及4个树脂侧面83。树脂主面81和树脂背面82是在z方向上彼此朝向相反侧的面，均是与z方向正交的平坦面。树脂主面81是朝向图5的上方的面。树脂背面82是朝向图5的下方的面。各树脂侧面83分别与树脂主面81及树脂背面82相连，朝向x方向或y方向。如图4所示，基板2的基板背面22从密封树脂8的树脂背面82露出。如图5所示，基板背面22和树脂背面82彼此齐平。
以下，参照图9对半导体装置A1的制造方法的一例进行说明。此外，以下说明的制造方法是用于实现半导体装置A1的一个手段，并不限定于此。
如图9所示，本例的制造方法具有：导电部形成工序(步骤S1)、引线框架(leadframe)接合工序(步骤S2)、半导体芯片安装工序(步骤S3)、控制装置安装工序(步骤S4)、导线连接工序(步骤S5)、树脂形成工序(步骤S6)以及框架切断工序(步骤S7)。
在导电部形成工序(步骤S1)中，首先，准备基板2。基板2例如由陶瓷构成。接着，在基板2的基板主面21上形成导电部3和多个接合部25。在本例中，一并形成导电部3和多个接合部25。例如，在印刷了金属膏之后，对其进行烧制，由此，得到作为导电性材料的包含例如银(Ag)等金属的导电部3以及多个接合部25。
在引线框架接合工序(步骤S2)中，首先，在多个接合部25印刷接合膏，在导电部3的一部分的第二焊盘32印刷导电性接合膏。接合膏以及导电性接合膏例如是Ag膏、焊料膏。接着，准备引线框架。引线框架包含多个引线1，还具有多个引线1相连的框架。此外，引线框架的形状等没有限定。接着，使多个引线1中的引线11、12、13经由接合膏与多个接合部25面对面。另外，使多个引线1中的多个引线15经由导电性接合膏与导电部3(第二焊盘32)面对面。例如，在将接合膏以及导电性接合膏加热后进行冷却，由此，由接合膏形成接合材料75，由导电性接合膏形成导电性接合材料76。由此，引线11、12、13经由接合材料75与多个接合部25接合，多个引线15经由导电性接合材料76与导电部3接合。
在半导体芯片安装工序(步骤S3)中，首先，在引线11及引线12的规定的位置印刷导电性接合膏。导电性接合膏例如是Ag膏、焊料膏。接着，使半导体芯片4a附着于印刷在引线11的导电性接合膏，使半导体芯片4b附着于印刷在引线12的导电性接合膏。然后，例如在将导电性接合膏加热后进行冷却，由此，由导电性接合膏形成导电性接合材料。由此，半导体芯片4a经由导电性接合材料与引线11接合，半导体芯片4b经由导电性接合材料与引线12接合。另外，通过同样的工序，使分流电阻6a经由导电性接合材料与引线11以及引线12接合。
在控制装置安装工序(步骤S4)中，在导电部3的第一焊盘31印刷导电性接合膏。导电性接合膏例如是Ag膏、焊料膏。接着，使控制装置5a以及控制装置5b的各引线53分别附着于导电性接合膏。接着，例如在将导电性接合膏加热后进行冷却，由此，使控制装置5a及控制装置5b的各引线53经由导电性接合材料与第一焊盘31接合。另外，通过同样的工序，使热敏电阻6b及其他无源元件6经由导电性接合材料与导电部3的第二焊盘32接合。
在导线连接工序(步骤S5)中，首先，连接多个导线71。在本例中，例如通过楔形接合(wedge bonding)的方法，依次连接由铝(Al)构成的导线材料。由此，得到多个导线71。接着，连接多个导线72。在本例中，例如通过细管接合(capillary bonding)的方法，依次连接由金(Au)构成的导线材料。由此，得到多个导线72。
在树脂形成工序(步骤S6)中，例如通过模具包围引线框架的一部分、基板2的一部分、半导体芯片4a、4b、控制装置5a、5b、多个无源元件6以及多个导线71、72。接着，向由模具划定的空间注入液状的树脂材料。接着，使该树脂材料固化，由此，得到密封树脂8。
在框架切断工序(步骤S7)中，将引线框架中的从密封树脂8露出的部位的适当部位切断。由此，多个引线1被彼此分割。之后，根据需要，经过将多个引线1弯折等处理，由此，得到上述的半导体装置A1。
接着，对半导体装置A1的作用效果进行说明。
根据本实施方式，在基板2的基板主面21形成有导电部3。导电部3在第一焊盘31与控制装置5导通接合。由此，能够由形成在基板主面21上的导电部3构成向控制装置5的导通路径。因此，与例如由金属制的引线构成导通路径的情况相比，能够实现导通路径的细线化、高密度化。另外，在z方向观察，导电部3的连接布线33的一部分即重叠布线配置成与控制装置5重叠。因此，与配置成使导通路径迂回地不与控制装置5重叠的情况相比，能够缩短导通路径，另外，导通路径的设计自由度变大。因此，能够促进半导体装置A1的高集成化。
另外，根据本实施方式，关于控制装置5，控制芯片51被树脂54覆盖，在对置面50配置有树脂54。即使在z方向观察配置成连接布线33与控制装置5重叠，也能够防止控制芯片51与连接布线33接触。因此，不需要为了不与控制装置5重叠而使连接布线33迂回。因此，能够缩短导通路径，另外，导通路径的设计自由度变大。
另外，根据本实施方式，使用控制芯片51被树脂54覆盖的控制装置5。在代替控制装置5而使用控制芯片51时，在控制芯片51的直接状态下无法流过出货检查所需的高电压高电流，因此，在成为被密封树脂8覆盖的完成品之前无法进行出货检查。此时，当在出货检查中判定为不良品时，即使控制芯片51以外的部件正常，也会废弃完成品整体。另一方面，控制芯片51被树脂54覆盖，因此，控制装置5能够流过出货检查所需的高电压高电流。因此，在安装前进行控制装置5的检查，能够废弃不良品。能够仅使用合格品的控制装置5来制造半导体装置A1，因此，能够抑制正常部件的浪费。
另外，根据本实施方式，多个引线1的热传导率比基板2高，因此，能够抑制因采用基板2而可能降低的来自半导体芯片4的散热降低。另外，半导体芯片4a通过导电性接合材料与引线11直接接合，半导体芯片4b通过导电性接合材料与引线12直接接合。因此，能够使半导体芯片4a(4b)与引线11(12)导通，并且能够将来自半导体芯片4a(4b)的热更高效地向引线11(12)传递。另外，多个引线1从密封树脂8露出，由此，构成从外部向半导体芯片4的导通路径，并且能够进一步确保半导体芯片4的散热特性。另外，在基板2形成有接合部25，引线11、12、13经由接合部25与基板2接合。相对于例如由陶瓷构成的基板2的基板主面21的表面粗糙度，接合部25的表面能够更平滑地精加工。由此，能够抑制在从引线11、12、13到基板2的传热路径产生不希望的微小的空隙部等，能够进一步促进半导体芯片4等的散热。另外，基板2的基板背面22从密封树脂8露出。由此，能够将从半导体芯片4等传递到基板2的热更高效地向外部散热。
另外，根据本实施方式，导电部3和接合部25包含相同的导电性材料，由此，能够在基板2一并形成导电部3和接合部25。这对于提高半导体装置A1的制造效率是理想的。另外，多个引线15经由导电性接合材料76与导电部3的第二焊盘32接合。由此，能够对基板2更牢固地固定多个引线15。另外，能够实现多个引线15与导电部3之间的低电阻化。
图10～图15示出了本公开的其他实施方式。此外，在这些图中，对与上述实施方式相同或类似的要素标注与上述实施方式相同的符号。
<第二实施方式>
图10和图11是用于对本公开的第二实施方式的半导体装置A2进行说明的图。图10是表示半导体装置A2的剖视图，是与图5对应的图。图11是将图10的一部分放大后的局部放大剖视图。本实施方式的半导体装置A2与第一实施方式的不同点在于，控制装置5的封装类型为SON(Small Outline Non-leaded package：小外形无引脚封装)类型。
本实施方式的控制装置5是SON类型的封装，如图11所示，各引线53不从树脂54突出，从树脂54的底面(在图11中为朝向下侧的面)及侧面(与底面正交的面)露出。关于控制装置5，各引线53的从树脂54露出的部分经由导电性接合材料77与导电部3的第一焊盘31导通接合。导电性接合材料77只要能够将引线53与第一焊盘31接合且将引线53与第一焊盘31电连接即可。导电性接合材料77例如使用焊料、银膏、铜膏等。控制装置5的对置面50包含由树脂54构成的部分和由引线53构成的部分。在本实施方式中，在z方向观察，与控制装置5重叠的连接布线33(重叠布线)仅配置于对置面50中的与由树脂54构成的部分对置的区域，并配置为不与由引线53构成的部分接触。在本实施方式中，对置面50中的由树脂54构成的部分是“绝缘部”的一例。
在本实施方式中，也能够将导电部3的连接布线33的一部分配置为与控制装置5重叠的重叠布线。因此，与配置成使连接布线33迂回地不与控制装置5重叠的情况相比，能够缩短导通路径，另外，导通路径的设计自由度变大。因此，能够促进半导体装置A2的高集成化。
此外，控制装置5的封装类型并不限定于SON类型，例如也可以是QFN(Quad FlatNon-leaded package：四方扁平无引脚封装)类型等其他类型的封装。控制装置5只要在对置面50的至少一部分包含由树脂54构成的部分即可。
<第三实施方式>
图12是用于对本公开的第三实施方式的半导体装置A3进行说明的图。图12是表示半导体装置A3的俯视图，是透过了密封树脂8的图，是与图3对应的图。本实施方式的半导体装置A3与第一实施方式的不同点在于，热敏电阻6b与引线15的导通路径。
本实施方式的热敏电阻6b与导电部3的第二焊盘32a以及第二焊盘32b导通接合。第二焊盘32a经由连接布线33i及第二焊盘32c与引线15i导通连接。第二焊盘32b经由连接布线33j及第二焊盘32d与引线15j导通连接。在z方向观察，连接布线33i以及连接布线33j与控制装置5a重叠。连接布线33i以及连接布线33j不与控制装置5a导通。即，在本实施方式中，在重叠布线中还包含不与控制装置5a导通的连接布线33i以及连接布线33j。
在本实施方式中，也能够将导电部3的连接布线33的一部分配置为与控制装置5重叠的重叠布线。因此，与配置成使连接布线33迂回地不与控制装置5重叠的情况相比，能够缩短导通路径，另外，导通路径的设计自由度变大。因此，能够促进半导体装置A3的高集成化。
<第四实施方式>
图13、图14和图15是用于对本公开的第四实施方式的半导体装置A4进行说明的图。图13是表示半导体装置A4的剖视图，是与图5对应的图。图14和图15是将图13的一部分放大后的局部放大剖视图。本实施方式的半导体装置A4与第一实施方式的不同点在于，具有半导体封装400来代替半导体芯片4。
如图13所示，本实施方式的半导体装置A4具有半导体封装400来代替半导体芯片4。另外，引线11、12、13与代替接合部25而形成的导电部3的第二焊盘32导通接合。并且，半导体封装400和与引线11(12)导通的第二焊盘32导通接合。
半导体封装400是用树脂覆盖半导体芯片4而封装化的。如图14所示，半导体封装400具有：主面401、背面402、半导体芯片4、源极端子403、栅极端子404、漏极端子405以及树脂406。主面401和背面402在z方向上彼此朝向相反侧。主面401是朝向图13和图14的下方的面。背面402是朝向图13和图14的上方的面。树脂406覆盖半导体芯片4的整体、源极端子403、栅极端子404以及漏极端子405的各一部分，例如由环氧树脂、硅凝胶等绝缘性材料构成。源极端子403、栅极端子404以及漏极端子405在主面401中从树脂406露出。即，半导体封装400的主面401包含由树脂406构成的部分、以及由源极端子403、栅极端子404和漏极端子405构成的部分。在图13和图14中，省略了半导体封装400的内部的导通路径的记载。另外，源极端子403在图13和图14中未表示。在半导体封装400的内部，源极端子403与半导体芯片4的源极电极43导通，栅极端子404与半导体芯片4的栅极电极44导通，漏极端子405与半导体芯片4的漏极电极45导通。此外，半导体封装400的内部构造没有限定。半导体封装400可以具有多个半导体芯片4。另外，也可以具有其他电子部件。
半导体封装400配置于基板主面21，其主面401朝向基板2。源极端子403、栅极端子404以及漏极端子405分别经由导电性接合材料77与导电部3的第二焊盘32导通接合。在本实施方式中，如图14所示，在z方向观察，一部分连接布线33(重叠布线)与半导体封装400重叠，并配置在基板2的基板主面21与半导体封装400的主面401之间。该重叠布线仅配置在主面401中的与由树脂406构成的部分对置的区域，并配置成不与源极端子403、栅极端子404以及漏极端子405接触。在本实施方式中，半导体封装400是“电子部件”的一例，半导体芯片是“电子元件”的一例。另外，主面401中的由树脂406构成的部分是“绝缘部”的一例。此外，半导体装置A4可以仅具有半导体封装400，也可以具有半导体芯片4及半导体封装400这两者。
另外，半导体装置A4具有无源元件封装600来代替一部分无源元件6。无源元件封装600是用树脂覆盖无源元件6而封装化的。如图15所示，无源元件封装600具有：主面601、背面602、无源元件6、端子603、604以及树脂606。主面601和背面602在z方向上彼此朝向相反侧。主面601是朝向图13和图15的下方的面。背面602是朝向图13和图15的上方的面。树脂606覆盖无源元件6的整体和端子603、604的各一部分，例如由环氧树脂、硅凝胶等绝缘性材料构成。端子603、604在主面601中从树脂606露出。即，无源元件封装600的主面601包含由树脂606构成的部分和由端子603、604构成的部分。在无源元件封装600的内部，端子603、604与无源元件6的各电极导通。另外，无源元件封装600的内部构造没有限定。无源元件封装600也可以具有多个无源元件6。
无源元件封装600配置于基板主面21，其主面601朝向基板2。端子603、604分别经由导电性接合材料77与导电部3的第二焊盘32导通接合。在本实施方式中，如图15所示，在z方向观察，一部分连接布线33(重叠布线)与无源元件封装600重叠，并配置在基板2的基板主面21与无源元件封装600的主面601之间。该重叠布线仅配置在主面601中的与由树脂606构成的部分对置的区域，配置成不与端子603、604接触。在本实施方式中，无源元件封装600是“电子部件”的一例，无源元件是“电子元件”的一例。另外，主面601中的由树脂606构成的部分是“绝缘部”的一例。此外，半导体装置A4可以仅具有无源元件封装600，也可以具有无源元件6和无源元件封装600这两者。
根据本实施方式，能够将导电部3的连接布线33的一部分配置为与半导体封装400或无源元件封装600重叠的重叠布线。因此，与配置成使连接布线33迂回地不与半导体封装400以及无源元件封装600重叠的情况相比，能够缩短导通路径，另外，导通路径的设计自由度变大。因此，能够促进半导体装置A4的高集成化。
半导体装置A4也可以不具有半导体封装400以及无源元件封装600中的任一方。另外，也可以配置控制芯片51来代替控制装置5。
本公开的半导体装置不限于上述的实施方式。本公开的半导体装置的各部的具体结构可以自由地进行各种设计变更。在基板2的基板主面21上形成导电部3来配置电子部件，在导电部3的连接布线33中包含在z方向观察与该电子部件重叠的重叠布线的半导体装置全部包含在本公开的半导体装置中。
[附记1]
一种半导体装置，其中，具有：
基板，其具有在厚度方向上彼此朝向相反侧的基板主面和基板背面；
导电部，其形成在所述基板主面上且由导电性材料构成；
电子部件，其与所述导电部电连接，且配置在所述基板主面上；以及
密封树脂，其覆盖所述基板的至少一部分和所述电子部件，
所述导电部包含：在所述厚度方向观察，与所述电子部件重叠的重叠布线，该重叠布线在与所述电子部件重叠的范围内不与所述电子部件导通接合。
[附记2]
根据附记1所述的半导体装置，其中，
所述电子部件具有：对置面，其与所述基板主面对置，且具有由绝缘性材料构成的绝缘部，
在所述厚度方向观察，所述重叠布线仅与所述对置面中的所述绝缘部重叠。
[附记3]
根据附记2所述的半导体装置，其中，
所述对置面的整个面为所述绝缘部。
[附记4]
根据附记2或3所述的半导体装置，其中，
所述电子部件具有电子元件和覆盖所述电子元件的树脂，
所述树脂的一部分是所述绝缘部。
[附记5]
根据附记4所述的半导体装置，其中，
所述电子元件是无源元件。
[附记6]
根据附记4所述的半导体装置，其中，
所述电子元件是开关元件。
[附记7]
根据附记4所述的半导体装置，其中，
所述电子元件是输出驱动信号的控制芯片。
[附记8]
根据附记1～7中任一项所述的半导体装置，其中，
所述半导体装置还具有：
第一引线，其配置在所述基板主面上，热传导率比所述基板高；以及
半导体芯片，其配置在所述第一引线上。
[附记9]
根据附记8所述的半导体装置，其中，
所述半导体装置还具有：接合部，其形成在所述基板主面上，并包含构成所述导电部的导电性材料，
所述第一引线经由接合材料与所述接合部接合。
[附记10]
根据附记8或9所述的半导体装置，其中，
所述第一引线的一部分被所述密封树脂覆盖，另一部分从所述密封树脂露出。
[附记11]
根据附记8～10中任一项所述的半导体装置，其中，
所述半导体装置还具有：第二引线，其与所述第一引线分离且配置成经由导电性接合材料与所述导电部接合，
所述第二引线的一部分被所述密封树脂覆盖，另一部分从所述密封树脂露出。
[附记12]
根据附记11所述的半导体装置，其中，
所述导电部还包含：
第一焊盘，其与所述电子部件导通接合；以及
第二焊盘，其与所述第二引线导通接合，
所述重叠布线与所述第一焊盘以及所述第二焊盘连接。
[附记13]
根据附记8～11中任一项所述的半导体装置，其中，
所述导电部还包含：
第一焊盘，其与所述电子部件导通接合；以及
第二焊盘，其与所述半导体芯片导通连接，
所述重叠布线与所述第一焊盘以及所述第二焊盘连接。
[附记14]
根据附记8～11中任一项所述的半导体装置，其中，
所述半导体装置还具有：第二电子部件，其与所述导电部电连接，且配置在所述基板主面上，
所述导电部还包含：
第一焊盘，其与所述电子部件导通接合；以及
第二焊盘，其与所述第二电子部件导通接合，
所述重叠布线与所述第一焊盘以及所述第二焊盘连接。
[附记15]
根据附记8～11中任一项所述的半导体装置，其中，
所述重叠布线不与所述电子部件导通。
[附记16]
根据附记8～15中任一项所述的半导体装置，其中，
所述半导体芯片是控制电力的功率晶体管。
[附记17]
根据附记8～16中任一项所述的半导体装置，其中，
所述半导体芯片具有与所述第一引线接合的背面电极。
[附记18]
根据附记1～17中任一项所述的半导体装置，其中，
所述基板背面从所述密封树脂露出。
[附记19]
根据附记1～18中任一项所述的半导体装置，其中，
所述基板由陶瓷构成。
符号说明
A1、A2、A3、A4：半导体装置
1、11～15、15i、15j：引线
111：第一部
111a：主面
111b：背面
112：第二部
113：第三部
114：第四部
151：第一部
151a：主面
151b：背面
152：第二部
153：第三部
154：第四部
2：基板
21：基板主面
22：基板背面
25、251～253：接合部
3：导电部
31：第一焊盘
32、32a～32d：第二焊盘
33、33a～33j：连接布线
4、4a、4b：半导体芯片
41：元件主面
42：元件背面
43：源极电极
44：栅极电极
45：漏极电极
5、5a、5b：控制装置
50：对置面
51：控制芯片
52：晶片焊盘
53：引线
55：导线
6：无源元件
6a：分流电阻
6b：热敏电阻
71：导线
72：导线
75：接合材料
76、77：导电性接合材料
8：密封树脂
81：树脂主面
82：树脂背面
83：树脂侧面
400：半导体封装
401：主面
402：背面
403：源极端子
404：栅极端子
405：漏极端子
600：无源元件封装
601：主面
602：背面
603、604：端子。

Claims (19)

1.一种半导体装置，其特征在于，具有：
基板，其具有在厚度方向上彼此朝向相反侧的基板主面和基板背面；
导电部，其形成在所述基板主面上且由导电性材料构成；
电子部件，其与所述导电部电连接，且配置在所述基板主面上；以及
密封树脂，其覆盖所述基板的至少一部分和所述电子部件，
所述导电部包含：在所述厚度方向观察，与所述电子部件重叠的重叠布线，该重叠布线在与所述电子部件重叠的范围内不与所述电子部件导通接合。
2.根据权利要求1所述的半导体装置，其特征在于，
所述电子部件具有：对置面，其与所述基板主面对置，且具有由绝缘性材料构成的绝缘部，
在所述厚度方向观察，所述重叠布线仅与所述对置面中的所述绝缘部重叠。
3.根据权利要求2所述的半导体装置，其特征在于，
所述对置面的整个面为所述绝缘部。
4.根据权利要求2或3所述的半导体装置，其特征在于，
所述电子部件具有电子元件和覆盖所述电子元件的树脂，
所述树脂的一部分是所述绝缘部。
5.根据权利要求4所述的半导体装置，其特征在于，
所述电子元件是无源元件。
6.根据权利要求4所述的半导体装置，其特征在于，
所述电子元件是开关元件。
7.根据权利要求4所述的半导体装置，其特征在于，
所述电子元件是输出驱动信号的控制芯片。
8.根据权利要求1～7中任一项所述的半导体装置，其特征在于，
所述半导体装置还具有：
第一引线，其配置在所述基板主面上，热传导率比所述基板高；以及
半导体芯片，其配置在所述第一引线上。
9.根据权利要求8所述的半导体装置，其特征在于，
所述半导体装置还具有：接合部，其形成在所述基板主面上，并包含构成所述导电部的导电性材料，
所述第一引线经由接合材料与所述接合部接合。
10.根据权利要求8或9所述的半导体装置，其特征在于，
所述第一引线的一部分被所述密封树脂覆盖，另一部分从所述密封树脂露出。
11.根据权利要求8～10中任一项所述的半导体装置，其特征在于，
所述半导体装置还具有：第二引线，其与所述第一引线分离且配置成经由导电性接合材料与所述导电部接合，
所述第二引线的一部分被所述密封树脂覆盖，另一部分从所述密封树脂露出。
12.根据权利要求11所述的半导体装置，其特征在于，
所述导电部还包含：
第一焊盘，其与所述电子部件导通接合；以及
第二焊盘，其与所述第二引线导通接合，
所述重叠布线与所述第一焊盘以及所述第二焊盘连接。
13.根据权利要求8～11中任一项所述的半导体装置，其特征在于，
所述导电部还包含：
第一焊盘，其与所述电子部件导通接合；以及
第二焊盘，其与所述半导体芯片导通连接，
所述重叠布线与所述第一焊盘以及所述第二焊盘连接。
14.根据权利要求8～11中任一项所述的半导体装置，其特征在于，
所述半导体装置还具有：第二电子部件，其与所述导电部电连接，且配置在所述基板主面上，
所述导电部还包含：
第一焊盘，其与所述电子部件导通接合；以及
第二焊盘，其与所述第二电子部件导通接合，
所述重叠布线与所述第一焊盘以及所述第二焊盘连接。
15.根据权利要求8～11中任一项所述的半导体装置，其特征在于，所述重叠布线不与所述电子部件导通。
16.根据权利要求8～15中任一项所述的半导体装置，其特征在于，所述半导体芯片是控制电力的功率晶体管。
17.根据权利要求8～16中任一项所述的半导体装置，其特征在于，所述半导体芯片具有与所述第一引线接合的背面电极。
18.根据权利要求1～17中任一项所述的半导体装置，其特征在于，所述基板背面从所述密封树脂露出。
19.根据权利要求1～18中任一项所述的半导体装置，其特征在于，所述基板由陶瓷构成。
CN202180019313.XA 2020-03-10 2021-02-12 半导体装置 Pending CN115280490A (zh)

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US5592025A (en) 1992-08-06 1997-01-07 Motorola, Inc. Pad array semiconductor device
JP3778778B2 (ja) * 2000-06-08 2006-05-24 三洋電機株式会社 半導体装置
US6552430B1 (en) 2002-01-30 2003-04-22 Texas Instruments Incorporated Ball grid array substrate with improved traces formed from copper based metal
TWI236741B (en) 2003-11-05 2005-07-21 Cyntec Co Ltd Chip package and substrate
US9681554B2 (en) 2008-04-07 2017-06-13 Mediatek Inc. Printed circuit board
CN112204739B (zh) * 2018-06-20 2024-03-15 罗姆股份有限公司 半导体器件
JP7199167B2 (ja) 2018-06-29 2023-01-05 三菱電機株式会社 パワー半導体モジュール、電力変換装置、およびパワー半導体モジュールの製造方法

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