CN115223868A - High-voltage fast recovery diode and preparation method thereof - Google Patents

High-voltage fast recovery diode and preparation method thereof Download PDF

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CN115223868A
CN115223868A CN202211121633.9A CN202211121633A CN115223868A CN 115223868 A CN115223868 A CN 115223868A CN 202211121633 A CN202211121633 A CN 202211121633A CN 115223868 A CN115223868 A CN 115223868A
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CN115223868B (en
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张益鸣
刘杰
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Shenzhen Xiner Semiconductor Technology Co Ltd
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Shenzhen Xiner Semiconductor Technology Co Ltd
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Abstract

The utility model belongs to the technical field of power devices, a high-voltage fast recovery diode and a preparation method thereof are provided, a groove is formed on the front surface of an N-type epitaxial layer, then first P-type doping ions are injected into the bottom of the groove and the lower part of the side wall of the groove, then a first P-type doping region is formed by high-temperature annealing, second P-type doping ions are injected into the groove at a preset angle D, then second P-type doping regions are formed on the side wall of the groove by low-temperature annealing, wherein the doping concentration of the first P-type doping region is smaller than that of the second P-type doping region, so that the electric field shielding of the bottom of the groove on a Schottky device is weaker, the anode injection efficiency of the side wall of the groove is higher, the IRM is higher, the conditions of higher electric field shielding on the Schottky device and smaller influence on the IRM are met, and the characteristics of high withstand voltage, low VF, high softness and low IRM of the fast recovery diode device are realized.

Description

High-voltage fast recovery diode and preparation method thereof
Technical Field
The application belongs to the technical field of power devices, and particularly relates to a high-voltage fast recovery diode and a preparation method thereof.
Background
The fast recovery diode is generally formed by an extension of a PIN structure, and under the application of a global or local carrier life control technology, the carrier life is reduced, so that the diode has the characteristic of fast recovery. The diode is usually used in parallel with the IGBT, the peak current generated in the reverse recovery process of the diode can increase the turn-on loss of the IGBT, and if the epitaxial buffer layer is not well controlled, the softness can be low, and the grid voltage of the IGBT can be influenced. The higher the forward turn-on voltage drop (VF), i.e. the less efficient the anode injection, the lower the reverse peak current (IRM), the less the impact on the IGBT, but the more the diode losses, which is typical for fast recovery diodes using global carrier lifetime control.
The MPS fast recovery diode is characterized in that the MPS fast recovery diode is integrated with a Schottky structure and a PIN structure, the anode injection efficiency is reduced under the condition of not improving forward VF, and the MPS fast recovery diode has the conditions of manufacturing low VF, low IRM and high-voltage fast recovery diodes.
Disclosure of Invention
The application aims to provide a high-voltage fast recovery diode and a preparation method thereof, and aims to solve the problem that the conventional fast recovery diode structure cannot meet the requirements of lower VF and lower anode injection efficiency at the same time.
The embodiment of the application provides a preparation method of a high-voltage fast recovery diode in a first aspect, and the preparation method comprises the following steps:
forming an oxide layer on the front surface of the N-type epitaxial layer, and etching the oxide layer and the N-type epitaxial layer under the protection of photoresist to form a groove on the front surface of the N-type epitaxial layer;
injecting first P-type doping ions into the bottom of the groove and below the side wall of the groove, and annealing under a first annealing condition to form a first P-type doping region at the bottom of the groove and an N-type channel region at an interface between the first P-type doping region and the N-type epitaxial layer; the first P-type doped region surrounds the bottom of the groove;
injecting second P-type doped ions into the groove at a preset angle D; wherein D = arctan (a/(B + C)), a is the width of the groove, B is the thickness of the oxide layer, and C is the depth of the groove;
removing the oxide layer, and carrying out annealing treatment under a second annealing condition to form a second P-type doped region on the side wall of the groove; wherein the annealing temperature in the second annealing condition is lower than the annealing temperature in the first annealing condition, and the doping concentration of the second P-type doping region is higher than that of the first P-type doping region;
forming Schottky metal layers on two sides of the groove, and forming ohmic metal layers at the bottom and the side wall of the groove;
and forming a cathode metal layer on the back of the N-type epitaxial layer.
In one embodiment, the step of implanting the second P-type dopant ions into the groove at the predetermined angle D further includes:
injecting third P-type doping ions above the side wall of the groove to form a third P-type doping area above the side wall of the groove; the doping concentration of the third P-type doping region is larger than that of the second P-type doping region.
In one embodiment, the step of implanting third P-type dopant ions over the sidewalls of the recess includes:
forming a second etching mask below the front surface of the N-type epitaxial layer, the bottom of the groove and the side wall of the groove to determine a third P-type ion doped region;
injecting third P-type doped ions above the side wall of the groove under the protection of the second etching mask;
and removing the second etching mask and the oxide layer, and carrying out annealing treatment under the second annealing condition.
In one embodiment, the second P-type dopant ions are implanted at a dose at least 10 times that of the first P-type dopant ions.
In one embodiment, the annealing temperature in the first annealing condition is 1050 ℃ to 1200 ℃, and the annealing time in the first annealing condition is 100 minutes to 600 minutes;
the annealing temperature in the second annealing condition is 800 ℃ to 1000 ℃, and the annealing time in the second annealing condition is 30 minutes to 90 minutes.
In one embodiment, the first P-type dopant ions are implanted at an angle of less than 45 °.
In one embodiment, a distance between the first P-type doped region formed under the sidewall of the groove and the bottom of the groove is less than one-half of a depth of the groove.
A second aspect of the embodiments of the present application further provides a high voltage fast recovery diode, including:
the front surface of the N-type epitaxial layer is provided with a groove;
the first P-type doped region surrounds the bottom of the groove of the N-type epitaxial layer;
the N-type channel region is arranged between the first P-type doped region and the N-type epitaxial layer;
the second P-type doped region is positioned on the side face of the groove, and an included angle between the second P-type doped region and the bottom face of the groove is E =90 ° + D; d is an ion implantation angle in the second P-type doped region, and the doping concentration of the second P-type doped region is greater than that of the first P-type doped region;
the Schottky metal layer is positioned on the front surface of the N-type epitaxial layer and positioned on two sides of the groove;
the ohmic metal layer is positioned in the groove;
and the cathode metal layer is positioned on the back surface of the N-type epitaxial layer.
In one embodiment, the high voltage fast recovery diode further comprises:
the third P-type doped region is arranged on the side wall of the groove and is positioned between the first P-type doped region and the second P-type doped region; and the doping concentration of the third P-type doping region is greater than that of the second P-type doping region.
In one embodiment, the cross-sectional shape of the second P-type doped region is a parallelogram.
In the high-voltage fast recovery diode and the preparation method thereof, the groove is formed in the front face of the N-type epitaxial layer, then the first P-type doping ions are injected into the bottom of the groove and the lower part of the side wall of the groove, then the first P-type doping regions are formed through high-temperature annealing, the second P-type doping ions are injected into the groove at a preset angle D, then the second P-type doping regions are formed on the side wall of the groove through low-temperature annealing, wherein the doping concentration of the first P-type doping regions is smaller than that of the second P-type doping regions, so that the electric field shielding of the bottom of the groove on a Schottky device is weak, the anode injection efficiency of the side wall of the groove is high, the IRM is high, the electric field shielding on the Schottky device is high, and the conditions of small influence on the IRM are met, and the characteristics of high withstand voltage, low VF, high softness and low IRM of the fast recovery diode device are realized.
Drawings
Fig. 1 is a schematic flowchart of a method for manufacturing a high-voltage fast recovery diode according to an embodiment of the present disclosure.
Fig. 2 is a schematic diagram of forming the groove 110 according to an embodiment of the present disclosure.
Fig. 3 is a schematic diagram of forming a first P-type doped region 310 according to an embodiment of the present disclosure.
Fig. 4 is a schematic diagram of forming a second P-type doped region 320 according to an embodiment of the present disclosure.
Fig. 5 is a first schematic view illustrating doping concentrations of a P-type doped region and an N-type epitaxial layer according to an embodiment of the present disclosure.
Fig. 6 is a first schematic structural diagram of a high-voltage fast recovery diode according to an embodiment of the present application.
Fig. 7 is a schematic structural diagram of forming a third P-type doped region 330 according to an embodiment of the present disclosure.
Fig. 8 is a second schematic view illustrating the doping concentrations of the P-type doped region and the N-type epitaxial layer according to the embodiment of the present application.
Fig. 9 is a schematic structural diagram of a high-voltage fast recovery diode according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more clearly understood, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or be indirectly connected to the other element.
It will be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like are used in an orientation or positional relationship indicated in the drawings to facilitate the description of the application and to simplify the description, and are not intended to indicate or imply that the device or element so referred to must have a particular orientation, be constructed in a particular orientation, and be constructed in operation as a limitation of the application.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
The fast recovery diode is generally formed by an extension of a PIN structure, and under the application of a global or local carrier life control technology, the carrier life is reduced, so that the diode has the characteristic of fast recovery. The diode is usually used in parallel with the IGBT, the peak current generated in the diode reverse recovery process can generally increase the turn-on loss of the IGBT, and if the epitaxial buffer layer is not well controlled, the softness can be low, and the gate voltage of the IGBT can be affected. Generally, the higher the forward turn-on voltage drop VF of a fast recovery diode using global carrier lifetime control is, i.e., the anode injection efficiency is low, the reverse peak current IRM is relatively small, the smaller the influence on the IGBT is, but the loss of the diode is increased.
MPS fast recovery diode, because fuse schottky and PIN structure, under the condition that does not promote forward VF, anode injection efficiency has been reduced, possess the condition of making low VF, low IRM and high softness fast recovery diode, nevertheless because the schottky junction is great at the electric field shielding that does not have under, for obtaining better electric field shielding effect, need to prepare high enriched P junction, exhaust the schottky junction region, anode injection efficiency has been promoted simultaneously, consequently hardly prepare high-pressure MPS fast recovery diode.
The embodiment of the application provides a method for manufacturing a high-voltage fast recovery diode, and referring to fig. 1, the method in the embodiment includes steps S100 to S600.
In step S100, an oxide layer is formed on the front surface of the N-type epitaxial layer, and the oxide layer and the N-type epitaxial layer are etched under the protection of the first etching mask, so as to form a groove on the front surface of the N-type epitaxial layer.
In this embodiment, as shown in fig. 2, an oxide layer 200 is first formed on the front surface of the N-type epitaxial layer 100 by epitaxial growth, and then a first etching mask is formed on the surface of the oxide layer 200 to define an etching region, and the etching process is performed on the etching region to an etching depth reaching the inside of the N-type epitaxial layer 100, so as to form a groove 110 on the front surface of the N-type epitaxial layer 100.
In a specific application embodiment, the oxidation layer 200 may be formed on the front surface of the N-type epitaxial layer 100 by oxidizing the front surface of the N-type epitaxial layer 100, then spin-coating a photoresist on the surface of the oxidation layer 200, performing photolithography and development to determine an etched region, and then forming the groove 110 on the front surface of the N-type epitaxial layer 100 by dry etching the oxidation layer 200 and the N-type epitaxial layer 100.
In a specific application, as shown in fig. 2, the trench width, the trench depth, and the thickness of the oxide layer 200 of the trench 110 determine the angle of the tilt angle implantation at the later stage, and the tilt angle implantation angle of the current ion implanter is not greater than 45 ℃, and at the same time, the temperature and duration of the high-temperature annealing at the later stage are influenced and need to be selected according to the process conditions.
In one embodiment, the N-type epitaxial layer 100 may be an N-type silicon layer.
In a specific embodiment, the depth of the trench of the recess 110 is at least half the thickness of the N-type epitaxial layer 100.
In step S200, first P-type dopant ions are implanted into the bottom of the groove and under the sidewall of the groove, and annealing is performed under a first annealing condition to form a first P-type dopant region at the bottom of the groove and an N-type channel region at an interface between the first P-type dopant region and the N-type epitaxial layer.
In the present embodiment, as shown in fig. 3, under the protection of the oxide layer 200 and the first etching mask thereon, first P-type dopant ions are implanted into the bottom and the sidewall of the recess 110, and then an annealing process is performed under a first annealing condition, so as to form a first P-type dopant region 310 in the bottom region of the recess 110, where the bottom region includes a region centered under the bottom plane of the recess 110 and the sidewall of the recess 110, and an interface between the bottom region and the N-type epitaxial layer 100 is arc-shaped.
Specifically, the first P-type doping ions in the first P-type doping region 310 are diffused through annealing treatment, the first P-type doping ions are diffused into the N-type epitaxial layer 100, so that the first P-type doping ions are diffused to form the first P-type doping region 310, the first P-type doping region 310 takes the bottom plane of the groove 110 and the lower portion of the side wall of the groove 110 as the center, the concentration of the first P-type doping region is gradually decreased to the boundary with the N-type epitaxial layer 100, and the N-type channel region 120 is formed at the boundary between the first P-type doping region 310 and the N-type epitaxial layer 100.
In one embodiment, the first P-type dopant ions may be boron ions.
In specific application, under the protection of the oxide layer 200 and a first etching mask above the oxide layer, conventional boron ion implantation is performed on the bottom of the groove 110, the boron ions are implanted to the bottom of the groove 110 and below part of the side wall, then high-temperature annealing treatment is performed under a first annealing condition to promote the implanted boron ions to diffuse, at the moment, the concentration of the boron ions at the bottom plane of the groove 110 is higher, and then the concentration of the boron ions is sequentially decreased to the abrupt PN junction.
In a specific application embodiment, boron ions are implanted into the bottom of the recess 110, the region implanted with boron ions is the first P-type doped region 310, which forms a PN junction with the N-type epitaxial layer 100, and the N-type channel region 120 is formed at the boundary between the first P-type doped region 310 and the N-type epitaxial layer 100, and the width of the N-type channel region 120 can be controlled by matching the annealing temperature and the annealing time of boron ions.
In one embodiment, the width of the N-type channel region 120 can be controlled to be 1-3um by matching the annealing temperature and the annealing time of the boron ions.
In one embodiment, the first P-type doped region 310 surrounds the bottom of the recess 110, and the doping type above the sidewall of the recess 110 remains N-type for leaving a schottky junction region to be prepared later.
In a specific embodiment, the doping concentration of the first P-type doped region 310 is inversely proportional to the distance between the bottom of the groove 110, i.e. the doping concentration is higher closer to the bottom of the groove 110 until the concentration of the first P-type doped ions at the abrupt PN junction 311 between the first P-type doped region and the N-type epitaxial layer 100 is the lowest
In one embodiment, the first P-type dopant ions are implanted at a dose of 1 × 10 12 -1*10 13 min -1 *cm -2 The implantation energy of the first P-type doped ions is 20-120KeV.
In step S300, second P-type dopant ions are implanted into the recess at a predetermined angle D.
In the present embodiment, the implantation angle D = arctan (a/(B + C)) of the second P-type dopant, a is the width of the groove 110, B is the thickness of the oxide layer 200, and C is the depth of the groove 110.
In a specific application, because the implantation angle D of the second P-type doped ions is greater than 0, the cross-sectional shape of the second P-type doped region before the annealing treatment is a parallelogram.
In step S400, the oxide layer is removed, and annealing treatment is performed under a second annealing condition to form a second P-type doped region on the sidewall of the recess.
In the present embodiment, the doping concentration of the second P-type doped region 320 is greater than the doping concentration of the first P-type doped region 310, and as shown in fig. 4, the second P-type doped region 320 is formed by implanting second P-type doped ions into the sidewall of the groove 110 to serve as an implantation region of high-concentration P-type doped ions.
Specifically, the second P-type doped ions may be the same as the first P-type doped ions, for example, the second P-type doped ions and the first P-type doped ions are the same as boron ions; or the second P-type dopant ions may be different from the first P-type dopant ions, for example, the second P-type dopant ions are boron ions and the first P-type dopant ions are aluminum ions.
In this embodiment, the implantation dose of the second P-type doped ions is greater than that of the first P-type doped ions, and the ion implantation depth of the second P-type doped ions is less than that of the first P-type doped ions.
In a specific application embodiment, the annealing temperature in the second annealing condition is lower than that in the first annealing condition, and the ion diffusion depth of the second P-type doped ions is lower than that of the first P-type doped ions.
In a specific embodiment, a photoresist may be spin-coated on the front surface of the N-type epitaxial layer 100 and the bottom of the recess 110 to serve as a second etching mask, and then a pattern of a second P-type ion doped region is determined after exposure to implant second P-type doped ions, so that the second P-type doped ions are implanted into the entire sidewall of the recess 110, and the first P-type doped ions and the second P-type doped ions are simultaneously implanted into a region between the sidewall of the recess 110 and the bottom of the recess 110.
In one embodiment, the second etch mask is 0.1-1.0 μm thick.
In one embodiment, after spin coating the photoresist, the thickness of the photoresist is 0.1-1.0 μm, and the bottom of the groove 110 is completely covered by the photoresist; the exposure intensity is adjusted to expose the sidewalls of the recess 110, and the photoresist and the surface oxide layer 200 together serve as an implantation barrier for high-concentration boron ions.
In a specific embodiment, the implantation angle is adjusted to implant the second P-type dopant ions, and the implantation dosage of the second P-type dopant ions is greater than that of the first P-type dopant ions, so that an implantation region with high doping concentration is formed on the sidewall of the recess 110 to shield part of the electric field strength of the schottky device.
In one embodiment, the second P-type dopant ions are implanted at a dose at least 10 times the dose of the first P-type dopant ions.
In one embodiment, the second P-type dopant ions are implanted at a dose of 1 × 10 13 -8*10 14 min -1 *cm -2 The implantation energy of the second P-type doped ions is 60-120KeV.
In a specific embodiment, after removing the second etching mask and the oxide layer 200, an annealing process is performed under a second annealing condition to activate the second P-type dopant ions, so that a second P-type dopant region 320 with a high dopant concentration is formed on the sidewall of the recess 110.
In one embodiment, the photoresist and the oxide layer are removed, and the high-concentration boron ion doped region is activated by annealing at 800-1000 ℃ for 30-90 minutes to form the structure shown in fig. 4, i.e., the sidewall of the recess 110 is formed by the second P-type doped region 320 with high doping concentration, and the bottom is formed by the first P-type doped region 310 with lower doping concentration to form the implanted regions with high and low doping concentrations.
The concentration relationship between the second P-type doped region 320 and the first P-type doped region 310 is shown in fig. 5, the vertical axis is the doping concentration, the horizontal axis is the direction from the sidewall of the recess 110 to the N-type epitaxial layer 100, in combination with fig. 5, the second P-type doped region 320 forms the sidewall implantation region of the recess 110, the doping concentration is at a higher level, then at the junction between the second P-type doped region 320 and the first P-type doped region 310, the doping concentration drops sharply, the distance between the doping concentration in the first P-type doped region 310 and the bottom of the recess 110 is in an inverse proportion relationship, that is, the closer to the bottom of the recess 110, the higher the doping concentration is until the concentration of the first P-type doped ion at the abrupt PN junction 311 between the first P-type doped region 310 and the N-type epitaxial layer 100 is the lowest, and the doping concentration of the first P-type doped ion at this position is less than the doping concentration of the N-type doped ion in the N-type epitaxial layer 100.
In step S500, schottky metal layers are formed on both sides of the groove, and ohmic metal layers are formed on the bottom and sidewalls of the groove.
In this embodiment, as shown in fig. 6, a schottky metal layer 410 is formed on the N-type epitaxial layer 100 and the second P-type doped region 320 on two sides of the groove 100, and an ohmic metal layer 420 is formed on the bottom and the sidewall of the groove 110, so as to ensure that the schottky metal layer 410 covers the second P-type doped region 320, prevent the ohmic metal layer 420 from contacting the N-type channel region 120 to form an ohmic contact, and avoid affecting the control of the leakage current of the device.
In a specific embodiment, the schottky metal layer 410 and the ohmic metal layer 420 are connected to cover two corners of the recess 110, and an upper surface of the ohmic metal layer 420 is flush with an upper surface of the second P-type doped region 320.
In one embodiment, the schottky metal material is deposited and etched away on the sidewalls and bottom, leaving the schottky metal layer 410 on the top of the N-type epitaxial layer 100, while ensuring that the schottky metal layer 410 covers the second P-type doped region 320 to prevent the subsequent ohmic metal layer 420 from forming ohmic contact with the N-type channel region 120, which is not good for controlling the leakage current, and the ohmic metal material is deposited after the short deposition of the schottky metal alloy and is used as the ohmic metal alloy to form the device structure shown in fig. 6.
In step S600, a cathode metal layer is formed on the back surface of the N-type epitaxial layer.
In the present embodiment, as shown in fig. 6, a cathode metal material is deposited on the back surface of the N-type epitaxial layer 100 to form a cathode metal layer 510.
In the embodiment, in the high voltage fast recovery diode prepared by the above preparation method, the anode injection efficiency of the first P-type doped region 310 at the bottom of the groove 110 is low, and the anode injection efficiency of the P-type doped region at the sidewall of the groove 110 is moderate, so that the IRM of the high voltage fast recovery diode is reduced, the softness factor is improved, but the electric field shielding of the schottky device part is weak.
Further, by forming the second P-type doped region 320 with a higher doping concentration above the sidewall of the recess 110, the anode injection efficiency is higher, but the area ratio is small, the IRM is less affected, and the electric field intensity of the schottky device portion can be shielded; the presence of the schottky device portion may further reduce the anode injection efficiency while enhancing the softness of the device. Therefore, the high-voltage fast recovery diode prepared by the preparation method can obtain the characteristics of high withstand voltage, low VF, high softness and low IRM.
In one embodiment, the first P-type dopant ions are implanted at a dose of 1 × 10 12 -1*10 13 min -1 *cm -2 The implantation energy of the first P-type doped ions is 20-120KeV; the implantation dosage of the second P-type doped ions is 1 x 10 13 -1*10 14 min -1 *cm -2 The implantation energy of the second P-type doped ions is 60-200KeV.
In one embodiment, the annealing time in the first annealing condition is greater than the annealing time in the second annealing condition.
In one embodiment, the annealing temperature in the first annealing condition is 1050 ℃ to 1200 ℃, and the annealing time in the first annealing condition is 100 minutes to 600 minutes; the annealing temperature in the second annealing condition is 800 ℃ to 1000 ℃, and the annealing time in the second annealing condition is 30 minutes to 90 minutes.
In this embodiment, the diffusion depth of the second P-type dopant ions can be reduced by setting the annealing time in the first annealing condition to be longer than the annealing time in the second annealing condition, and at this time, the thickness of the second P-type dopant region 320 is smaller than that of the first P-type dopant region 310.
In a specific application embodiment, step S310 is further included after step S300.
In step S310, implanting third P-type dopant ions above the sidewall of the groove to form a third P-type doped region above the sidewall of the groove; the doping concentration of the third P-type doping region is greater than that of the second P-type doping region.
In one embodiment, the doping concentration of the third P-type doped region 330 is at least 100 times the doping concentration of the first P-type doped region 310.
Specifically, the doping concentration of the first P-type doped region 310, the second P-type doped region 320, and the third P-type doped region 330 is gradually increased, and the doping concentration is at least 10 times of the doping concentration of the previous P-type doped region.
In one embodiment, the step of implanting third P-type dopant ions above the sidewalls of the recess in the step S310 and performing an annealing process under the second annealing condition includes steps S311 to S313.
In step S311, a second etching mask is formed on the front surface of the N-type epitaxial layer, the bottom of the groove, and the lower side of the sidewall of the groove to define a third P-type ion doped region.
In this embodiment, a photoresist may be spin-coated on the front surface of the N-type epitaxial layer 100, the bottom of the recess 110 and under the sidewall of the recess 110 to serve as a second etching mask, and then a third P-type ion doped region is patterned after exposure to implant third P-type doped ions.
In one embodiment, the second etch mask has a thickness of 0.1-1.0 μm.
In one embodiment, after spin coating the photoresist, the thickness of the photoresist is 0.1-1.0 μm, and the groove 110 is completely covered by the photoresist; and adjusting the exposure intensity to ensure that the photoresist is reserved at the PN junction on the side wall of the groove 110, namely the photoresist above the PN junction is exposed, and after the photoresist is cured, the photoresist is reserved at the lower part and is used as an injection barrier layer of high-concentration boron ions together with the surface oxide layer 200.
In step S312, under the protection of the second etching mask, third P-type doped ions are implanted above the sidewall of the recess.
In this embodiment, the implantation angle is adjusted to implant the third P-type doped ions, and the implantation dose of the third P-type doped ions is greater than that of the second P-type doped ions.
In one embodiment, the third P-type dopant is implanted at a dose of 1 × 10 14 -8*10 15 min -1 *cm -2 The implantation energy of the third P-type doped ions is 60-120KeV.
In step S313, the second etching mask and the oxide layer are removed, and annealing is performed under the second annealing condition.
In this embodiment, after removing the second etching mask and the oxide layer 200, an annealing process is performed under a second annealing condition to activate the second P-type doping ions and the third P-type doping ions, so that a third P-type doping region 330 with a high doping concentration and a second P-type doping region 320 with a medium doping concentration are formed on the sidewall of the groove 110.
In one embodiment, the photoresist and the oxide layer are removed, and the middle and high concentration boron ion doped regions are activated by annealing at 800-1000 ℃ for 30-90 minutes to form the structure shown in fig. 7, i.e., the sidewall is composed of the third P-type doped region 330 with high doping concentration and the second P-type doped region 320 with medium doping concentration, and the bottom is composed of the first P-type doped region 310 with lower doping concentration to form three implanted regions.
At this time, the concentration relationship of the third P-type doped region 330, the second P-type doped region 320 and the first P-type doped region 310 is as shown in fig. 8, and with reference to fig. 8, the third P-type doped region 330 and the second P-type doped region 320 form the sidewall implantation region 321 of the groove 110, the doping concentration thereof gradually decreases, the distance between the doping concentration in the first P-type doped region 310 and the bottom of the groove 110 is in an inverse proportional relationship, that is, the closer to the bottom of the groove 110, the higher the doping concentration thereof is, until the concentration of the first P-type dopant ions at the abrupt PN junction 311 between the first P-type doped region 310 and the N-type epitaxial layer 100 is the lowest, and the doping concentration of the first P-type dopant ions at this position is smaller than the doping concentration of the N-type dopant ions in the N-type epitaxial layer 100.
In a specific application embodiment, on the basis of step S310, schottky metal layers are formed on two sides of the groove, an ohmic metal layer is formed on the bottom and the sidewall of the groove, and a cathode metal layer is formed on the back of the N-type epitaxial layer.
Specifically, as shown in fig. 9, the schottky metal layer 410 is formed on the N-type epitaxial layer 100 and the third P-type doped region 330 on two sides of the groove 110, and the ohmic metal layer 420 is formed on the bottom and the sidewall of the groove 110, so that the schottky metal layer 410 is ensured to cover the third P-type doped region 330, the ohmic metal layer 420 is prevented from contacting the N-type channel region 120 to form ohmic contact, and the control of the leakage current of the device is prevented from being influenced.
In one embodiment, the schottky metal layer 410 and the ohmic metal layer 420 are connected to cover two corners of the recess 110, and an upper surface of the ohmic metal layer 420 is flush with an upper surface of the third P-type doped region 330.
In one embodiment, the schottky metal material is deposited and etched away on the sidewalls and bottom, leaving the schottky metal layer 410 on the top of the N-type epitaxial layer 100, while ensuring that the schottky metal layer 410 covers the third P-type doped region 330 to prevent the subsequent ohmic metal layer 420 from forming ohmic contact with the N-type channel region 120, which is not good for controlling the leakage current, and the ohmic metal material is deposited after a short period of schottky metal alloy and is used as an ohmic metal alloy to form the device structure shown in fig. 9.
In one embodiment, the diffusion depth of the second P-type dopant ions is at least less than half of the diffusion depth of the first P-type dopant ions.
In one embodiment, the implantation angle of the first P-type dopant ions is less than 45 °.
In one embodiment, the distance between the first P-type doped region 310 formed under the sidewall of the groove 110 and the bottom of the groove 110 is less than one-half of the depth of the groove 110.
In one embodiment, after the oxide layer 110 on the top of the device is removed, schottky contact and ohmic contact are respectively prepared to form an MPS structure, and then platinum diffusion or electron irradiation may be performed according to actual process conditions, so that the MPS diode has a fast recovery characteristic.
The embodiment of the application also provides a high-voltage fast recovery diode which is prepared by adopting the preparation method of any one of the embodiments.
The embodiment of this application still provides a high-pressure fast recovery diode, combines fig. 6 to show, and high-pressure fast recovery diode includes: the N-type epitaxial layer 100, the first P-type doped region 310, the N-type channel region 120, the second P-type doped region 320, the schottky metal layer 410, the ohmic metal layer 420, and the cathode metal layer 510.
Specifically, a groove is formed in the front surface of the N-type epitaxial layer 100; the first P-type doped region 310 surrounds the bottom of the groove of the N-type epitaxial layer 100; the N-type channel region 120 is disposed between the first P-type doped region 310 and the N-type epitaxial layer 100; the second P-type doped region 320 is arranged on the side wall of the groove; the schottky metal layer 410 is positioned on the front surface of the N-type epitaxial layer 100 and positioned on two sides of the groove; the ohmic metal layer 420 is positioned in the groove; a cathode metal layer 510 is located on the back side of the N-type epitaxial layer 100.
In this embodiment, an included angle between the second P-type doped region 320 and the bottom surface of the groove is E =90 ° + D; wherein D is an ion implantation angle in the second P-type doped region 320, and the doping concentration of the second P-type doped region 320 is greater than the doping concentration of the first P-type doped region 310.
Specifically, the concentration relationship between the second P-type doped region 320 and the first P-type doped region 310 is as shown in fig. 5, and with reference to fig. 5, the second P-type doped region 320 constitutes a sidewall implanted region of the groove, the doping concentration of the sidewall implanted region of the groove is maintained at the same concentration level, and then the doping concentration of the sidewall implanted region of the groove is abruptly decreased at the boundary with the first P-type doped region 310, the distance between the doping concentration of the first P-type doped region 310 and the bottom of the groove is in an inverse proportion relationship, i.e., the doping concentration of the sidewall implanted region is higher as the sidewall implanted region is closer to the bottom of the groove until the concentration of the first P-type doped ion at the abrupt PN junction 311 between the first P-type doped region 310 and the N-type epitaxial layer 100 is lowest, and the doping concentration of the first P-type doped ion at this position is less than the doping concentration of the N-type doped ion in the N-type epitaxial layer 100.
Specifically, the first P-type doped region 310 forms a PN junction with the N-type epitaxial layer 100, and the N-type channel region 120 is formed at the boundary between the first P-type doped region 310 and the N-type epitaxial layer 100, so that the width of the N-type channel region 120 can be controlled by matching the annealing temperature and the annealing time of boron ions.
In one embodiment, the N-type channel region 120 has a width of 1-3um.
In one embodiment, the depth of the trench of the recess is at least half the thickness of the N-type epitaxial layer 100.
In one embodiment, the schottky metal layer 410 covers the second P-type doped region 320 to prevent the subsequent ohmic metal layer 420 from forming an ohmic contact with the N-type channel region 120, which is detrimental to leakage current control.
In one embodiment, the cross-sectional shape of the second P-type doped region 320 is a parallelogram, and the included angle between the second P-type doped region 320 and the bottom surface of the groove is E =90 ° + D.
In this embodiment, D = arctan (a/(B + C)), a is the width of the groove, B is the thickness of the oxide layer covering the surface of the N-type epitaxial layer 100 when the second P-type dopant ion is implanted, and C is the depth of the groove.
In one embodiment, referring to fig. 9, the high voltage fast recovery diode may further include a third P-type doped region 330, and the third P-type doped region 330 is disposed on the sidewall of the recess and between the first P-type doped region 310 and the second P-type doped region 320.
In this embodiment, the doping concentrations of the third P-type doped region 330, the second P-type doped region 320 and the first P-type doped region 310 are gradually decreased, specifically, the concentration relationship among the third P-type doped region 330, the second P-type doped region 320 and the first P-type doped region 310 is as shown in fig. 8, and with reference to fig. 8, the third P-type doped region 330 and the second P-type doped region 320 form a sidewall implantation region 321 of the groove, the doping concentration thereof gradually decreases, the distance between the doping concentration in the first P-type doped region 310 and the bottom of the groove is in an inverse proportion relationship, that is, the doping concentration thereof is higher as the side is closer to the bottom of the groove until the concentration of the first P-type doped ions at the abrupt PN junction 311 between the first P-type doped region and the N-type epitaxial layer 100 is the lowest, and the doping concentration of the first P-type doped ions at this position is less than the doping concentration of the N-type doped ions in the N-type epitaxial layer 100.
Specifically, the first P-type doped region 310 forms a PN junction with the N-type epitaxial layer 100, and the N-type channel region 120 is formed at the boundary between the first P-type doped region 310 and the N-type epitaxial layer 100, so that the width of the N-type channel region 120 can be controlled by matching the annealing temperature and the annealing time of boron ions.
In one embodiment, the schottky metal layer 410 covers the third P-type doped region 330 to prevent the subsequent ohmic metal layer 420 from forming an ohmic contact with the N-type channel region 120, which is detrimental to leakage current control.
In one embodiment, the cathode metal layer 510 is a Ni/Ti/Ni/Ag stack material.
In the high-voltage fast recovery diode and the preparation method thereof provided by the embodiment of the application, the groove is formed on the front surface of the N-type epitaxial layer, then the first P-type doping ions are injected into the bottom of the groove and the lower part of the side wall of the groove, then the first P-type doping region is formed through high-temperature annealing, the second P-type doping ions are injected into the groove at the preset angle D, and then the second P-type doping region is formed on the side wall of the groove through low-temperature annealing, wherein the doping concentration of the first P-type doping region is smaller than that of the second P-type doping region, so that the electric field shielding of the bottom of the groove on the Schottky device is weaker, the anode injection efficiency of the side wall of the groove is higher, the IRM is higher, the conditions of higher electric field shielding on the Schottky device and smaller influence on the IRM are met, and the characteristics of high voltage resistance, low VF, high softness and low IRM of the fast recovery diode device are realized.
It will be clear to those skilled in the art that, for the convenience and simplicity of description, the division of the doped regions is merely illustrated, and in practical applications, the functional region allocation can be performed by different doped regions according to the requirement, i.e., the internal structure of the device is divided into different doped regions to perform all or part of the functions described above.
In the embodiment, each doped region may be integrated in one functional region, or each doped region may exist alone physically, or two or more doped regions are integrated in one functional region, and the integrated functional regions may be implemented by using the same type of doped ions, or may be implemented by using multiple types of doped ions together. In addition, the specific names of the doped regions are only for the convenience of distinguishing from each other, and are not used to limit the protection scope of the present application. For a specific working process of the middle doped region in the method for manufacturing the device, reference may be made to the corresponding process in the foregoing method embodiment, and details are not repeated here.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the embodiments of the present application, and they should be construed as being included in the present application.

Claims (10)

1. A preparation method of a high-voltage fast recovery diode is characterized by comprising the following steps:
forming an oxide layer on the front surface of the N-type epitaxial layer, and etching the oxide layer and the N-type epitaxial layer under the protection of photoresist to form a groove on the front surface of the N-type epitaxial layer;
injecting first P-type doping ions into the bottom of the groove and below the side wall of the groove, and carrying out annealing treatment under a first annealing condition to form a first P-type doping region at the bottom of the groove and form an N-type channel region at an interface between the first P-type doping region and the N-type epitaxial layer; the first P-type doped region surrounds the bottom of the groove;
injecting second P-type doped ions into the groove at a preset angle D; wherein D = arctan (a/(B + C)), a is the width of the groove, B is the thickness of the oxide layer, and C is the depth of the groove;
removing the oxide layer, and performing annealing treatment under a second annealing condition to form a second P-type doped region on the side wall of the groove; wherein the annealing temperature in the second annealing condition is lower than the annealing temperature in the first annealing condition, and the doping concentration of the second P-type doping region is higher than that of the first P-type doping region;
forming Schottky metal layers on two sides of the groove, and forming ohmic metal layers on the bottom and the side wall of the groove;
and forming a cathode metal layer on the back of the N-type epitaxial layer.
2. The method of claim 1, wherein the step of implanting second P-type dopant ions into the recess at a predetermined angle D further comprises:
injecting third P-type doped ions above the side wall of the groove to form a third P-type doped region above the side wall of the groove; the doping concentration of the third P-type doping region is larger than that of the second P-type doping region.
3. The method of claim 2, wherein the step of implanting third P-type dopant ions over the sidewalls of the recess comprises:
forming a second etching mask below the front surface of the N-type epitaxial layer, the bottom of the groove and the side wall of the groove to determine a third P-type ion doped region;
injecting third P-type doped ions above the side wall of the groove under the protection of the second etching mask;
and removing the second etching mask and the oxidation layer, and carrying out annealing treatment under the second annealing condition.
4. The method of claim 1, wherein the second P-type dopant ion is implanted at a dose at least 10 times greater than the first P-type dopant ion.
5. The method according to claim 1, wherein the annealing temperature in the first annealing condition is 1050 ℃ to 1200 ℃, and the annealing time in the first annealing condition is 100 minutes to 600 minutes;
the annealing temperature in the second annealing condition is 800 ℃ to 1000 ℃, and the annealing time in the second annealing condition is 30 minutes to 90 minutes.
6. The method of claim 1, wherein the first P-type dopant ions are implanted at an angle of less than 45 °.
7. The method of claim 1, wherein a distance between the first P-type doped region formed under the sidewall of the recess and a bottom of the recess is less than one-half of a depth of the recess.
8. A high voltage fast recovery diode, comprising:
the front surface of the N-type epitaxial layer is provided with a groove;
the first P-type doped region surrounds the bottom of the groove of the N-type epitaxial layer;
the N-type channel region is arranged between the first P-type doped region and the N-type epitaxial layer;
the second P-type doped region is positioned on the side face of the groove, and an included angle between the second P-type doped region and the bottom face of the groove is E =90 degrees + D; d is an ion implantation angle in the second P-type doped region, and the doping concentration of the second P-type doped region is greater than that of the first P-type doped region;
the Schottky metal layer is positioned on the front surface of the N-type epitaxial layer and positioned on two sides of the groove;
the ohmic metal layer is positioned in the groove;
and the cathode metal layer is positioned on the back surface of the N-type epitaxial layer.
9. The high voltage fast recovery diode of claim 8, further comprising:
the third P-type doped region is arranged on the side wall of the groove and is positioned between the first P-type doped region and the second P-type doped region; and the doping concentration of the third P-type doping region is greater than that of the second P-type doping region.
10. The high voltage fast recovery diode of claim 9, wherein the cross-sectional shape of the second P-type doped region is a parallelogram.
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