CN114093929A - Be applied to MPS diode's epitaxial wafer structure and MPS diode - Google Patents

Be applied to MPS diode's epitaxial wafer structure and MPS diode Download PDF

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Publication number
CN114093929A
CN114093929A CN202111343385.8A CN202111343385A CN114093929A CN 114093929 A CN114093929 A CN 114093929A CN 202111343385 A CN202111343385 A CN 202111343385A CN 114093929 A CN114093929 A CN 114093929A
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epitaxial layer
layer
mps diode
epitaxial
diode
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张益鸣
刘杰
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Shenzhen Xiner Semiconductor Technology Co Ltd
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Shenzhen Xiner Semiconductor Technology Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/872Schottky diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0638Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions

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  • Microelectronics & Electronic Packaging (AREA)
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Abstract

The invention belongs to the field of semiconductors and provides an epitaxial wafer structure applied to an MPS diode and the MPS diode, wherein the epitaxial wafer structure comprises a first epitaxial layer, a second epitaxial layer and a third epitaxial layer which are sequentially stacked; the doping concentration of the first epitaxial layer is greater than that of the second epitaxial layer, and the doping concentration of the second epitaxial layer is greater than that of the third epitaxial layer; the third epitaxial layer is in contact with the anode metal layer of the MPS diode, and the first epitaxial layer is in contact with the cathode metal layer of the MPS diode; the drift doping area of the MPS diode is arranged in the third epitaxial layer and is in contact with the second epitaxial layer and the anode metal layer, when the MPS diode is started in the forward direction, the resistivity of the MPS diode is low, and when the MPS diode is started in the reverse direction, the second epitaxial layer and the third epitaxial layer are in a high-resistance state, so that the distribution of the surface electric field intensity below the anode metal layer can be reduced, and the problem of larger leakage current of the MPS is solved.

Description

Be applied to MPS diode's epitaxial wafer structure and MPS diode
Technical Field
The present application belongs to the field of semiconductor technology, and in particular, relates to an MPS diode and an epitaxial wafer structure applied to the same.
Background
With the improvement of the switching speed of the power semiconductor device, a higher requirement is provided for a fast diode with clamping or buffering action when a main power switching device is connected in parallel, the diode is required to have ultra-fast and ultra-soft recovery characteristics and also have forward conduction loss as low as possible so as to reduce the self heat productivity of a chip to realize energy saving, and the high-temperature working characteristic of the chip can be effectively improved.
However, the schottky region is not resistant to high voltage, and the schottky region is located in a region with a large electric field intensity when the MPS diode is turned on, which causes a problem of large leakage current and high power consumption of the MPS diode.
Disclosure of Invention
In order to solve the problems of large leakage current and high power consumption of the MPS diode, the present application provides an epitaxial wafer structure applied to the MPS diode.
In one embodiment, the epitaxial wafer structure comprises:
the first epitaxial layer, the second epitaxial layer and the third epitaxial layer are sequentially stacked;
the doping concentration of the first epitaxial layer is greater than that of the second epitaxial layer, and the doping concentration of the second epitaxial layer is greater than that of the third epitaxial layer;
wherein the third epitaxial layer is in contact with the anode metal layer of the MPS diode, and the first epitaxial layer is in contact with the cathode metal layer of the MPS diode; the drift doped region of the MPS diode is disposed in the third epitaxial layer and is in contact with the second epitaxial layer and the anode metal layer.
In one embodiment, the thickness of the third epitaxial layer is less than the thickness of the second epitaxial layer.
In one embodiment, the drift doped region is buried in the second epitaxial layer to a depth greater than the thickness of the third epitaxial layer.
In one embodiment, the thickness of the third epitaxial layer is 1-5 um.
In one embodiment, the doping element of the first epitaxial layer and the doping element of the second epitaxial layer are phosphorus elements, and the doping element of the third epitaxial layer is arsenic element.
The present application also provides a MPS diode, comprising: the semiconductor device comprises an anode metal layer, a first epitaxial layer, a second epitaxial layer, a third epitaxial layer, a cathode metal layer and a drift doped region;
the anode metal layer, the first epitaxial layer, the second epitaxial layer, the third epitaxial layer and the cathode metal layer are stacked;
the doping concentration of the first epitaxial layer is greater than that of the second epitaxial layer, and the doping concentration of the second epitaxial layer is greater than that of the third epitaxial layer;
the drift doped region is arranged in the third epitaxial layer and is in contact with the second epitaxial layer and the anode metal layer.
In one embodiment, the MPS diode further comprises a passivation layer in contact with the third epitaxial layer, the drift doped region, and at an edge position of the MPS diode.
In one embodiment, the passivation layer is made of silicon dioxide.
In one embodiment, the drift doping region is embedded into the third epitaxial layer at intervals, the upper surface of the drift doping region is in contact with the anode metal layer, and the lower surface of the drift doping region is in contact with the second epitaxial layer.
In one embodiment, the drift doping region is doped with any one of boron ions, indium ions or a combination of boron ions and indium ions.
The invention provides an epitaxial wafer structure applied to an MPS diode and the MPS diode, wherein the epitaxial wafer structure comprises a first epitaxial layer, a second epitaxial layer and a third epitaxial layer which are sequentially stacked; the doping concentration of the first epitaxial layer is greater than that of the second epitaxial layer, and the doping concentration of the second epitaxial layer is greater than that of the third epitaxial layer; the third epitaxial layer is in contact with the anode metal layer of the MPS diode, and the first epitaxial layer is in contact with the cathode metal layer of the MPS diode; the drift doping area of the MPS diode is arranged in the third epitaxial layer and is in contact with the second epitaxial layer and the anode metal layer, when the MPS diode is started in the forward direction, the resistivity of the MPS diode is low, and when the MPS diode is started in the reverse direction, the second epitaxial layer and the third epitaxial layer are in a high-resistance state, so that the distribution of the surface electric field intensity below the anode metal layer can be reduced, and the problem of larger leakage current of the MPS is solved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a structural diagram of an MPS diode provided in this embodiment;
fig. 2 is a structural diagram of an epitaxial wafer applied to an MPS diode according to this embodiment;
fig. 3 is a structural diagram of an MPS diode provided in this embodiment.
Detailed Description
In order to make the technical solutions of the present invention better understood by those skilled in the art, the technical solutions in the embodiments of the present invention will be clearly described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some embodiments of the present invention, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terms "comprises" and "comprising," and any variations thereof, in the description and claims of this invention and the above-described drawings are intended to cover non-exclusive inclusions. For example, a process, method, or system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus. Furthermore, the terms "first," "second," and "third," etc. are used to distinguish between different objects and are not used to describe a particular order.
In the power system, the PIN diode and the schottky diode are two most commonly used power rectifiers, the internal structure of the schottky diode is that an N-type semiconductor is used as a substrate, an N-epitaxial layer with arsenic as a doping element is formed on the N-epitaxial layer, an anode is made of aluminum to form a barrier layer, when the schottky diode is conducted in the forward direction, the schottky barrier layer is narrowed, the internal resistance is reduced, when the schottky diode is conducted in the reverse direction, the schottky barrier layer is widened, the internal resistance is increased, the schottky diode only uses electrons to transport charges, and no minority carriers are accumulated outside the barrier layer, so the schottky diode has a faster switching speed than a common diode, but the breakdown voltage of the schottky diode is low, and the schottky diode is not suitable for the application of the power system in high voltage; when the PIN diode is conducted in the forward direction, a large amount of charges stored in the drift region can cause longer reverse recovery time of the PIN diode, so that the softness of the PIN diode is low, the fast switching state of a power system is not facilitated, the softness of the PIN diode can be improved by reducing the service life of minority carriers in the drift region, and the increase of forward voltage drop and reverse leakage current can be caused.
In order to solve the problems of low softness and low reverse breakdown voltage of the diode, PN junctions are integrated in a Schottky structure to form an MPS (hybrid PIN/Schottky) diode, the advantages of the Schottky diode and the PIN diode are combined, when the MPS diode is changed from forward conduction to reverse conduction, the reverse voltage inputs minority carriers into a Schottky contact region, and injects a large number of electrons into the Schottky contact region from metal to be recombined with the holes, so that a fast channel is provided for disappearance of minority carrier recombination, the characteristics of the MPS diode have faster recovery time, namely softness, and in addition, compared with a common diode, the number of the stored minority carriers of the MPS diode is greatly reduced, so that the recombination time is shortened, and the softness of the MPS diode is improved. However, the general MPS diode has a large electric field intensity in the schottky contact region, which causes the MPS diode to have the problems of low voltage resistance and large leakage current.
In order to solve the above technical problem, the present embodiment provides an epitaxial wafer structure applied to an MPS diode, where the epitaxial wafer structure includes a first epitaxial layer, a second epitaxial layer, and a third epitaxial layer, where a doping concentration of the first epitaxial layer is greater than a doping concentration of the second epitaxial layer, and a doping concentration of the second epitaxial layer is greater than a doping concentration of the third epitaxial layer; the third epitaxial layer is in contact with the anode metal layer of the MPS diode, and the first epitaxial layer is in contact with the cathode metal layer of the MPS diode; the drift doped region of the MPS diode is disposed in the third epitaxial layer and is in contact with the second epitaxial layer and the anode metal layer.
Specifically, as shown in fig. 1, the first epitaxial layer 100 is disposed below the second epitaxial layer 200, and the first epitaxial layer 100 is doped with the first conductive type element and has a doping concentration greater than that of the second epitaxial layer 200; the second epitaxial layer 200 is disposed below the third epitaxial layer 300, and the doping concentration of the second epitaxial layer 200 is greater than that of the third epitaxial layer 300; the third epitaxial layer 300 is in contact with the anode metal layer 500, and the lower surface of the first epitaxial layer 100 is in contact with the cathode metal layer 600.
In the present embodiment, the anode metal layer 500 and the cathode metal layer are made of molybdenum or aluminum material, the drift doped region 400 and the third epitaxial layer 300 form a depletion layer, when a positive voltage is applied across the depletion layer, i.e., the anode metal layer 500 is connected to the positive terminal of the power supply, and the cathode metal layer 600 is connected to the negative terminal of the power supply, the drift doped region 400 and the first epitaxial layer 100 inject minority carriers into the third epitaxial layer 300 and the second epitaxial layer 200, the number of non-recombination carriers in the third epitaxial layer 300 and the second epitaxial layer 200 becomes large, thereby achieving the purpose that the depletion layer becomes narrow and the internal resistance becomes small, at this time, the MPS diode is in a conducting state, when a negative voltage is applied across the depletion layer, minority carriers are removed from the second epitaxial layer 200 and the third epitaxial layer 300, due to the lack of carriers in the third epitaxial layer 300, the depletion layer becomes wider, the internal resistance of the MPS diode becomes larger, and the MPS diode is in an off state. The first epitaxial layer 100 is in contact with the cathode metal layer to form an ohmic contact layer, which can reduce the contact resistance of the cathode.
In this embodiment, when the MPS diode receives a forward applied voltage, the third epitaxial layer 300 has a smaller effect on the voltage drop of the MPS diode when the MPS diode is in forward conduction because the third epitaxial layer 300 is injected with minority carriers in the drift doped region 400, and when the MPS diode applies a reverse voltage, the depletion layer between the third epitaxial layer 300 and the anode metal layer 500 becomes wider, the barrier is raised, the surface electric field intensity under the schottky contact layer is effectively lowered because the minority carriers of the third epitaxial layer 300 are pumped away, so as to improve the problem that the MPS diode is not resistant to high voltage and has a larger reverse leakage current, where the schottky contact layer refers to the region where the anode metal layer 500 is in contact with the third epitaxial layer 300.
In one embodiment, the thickness of the third epitaxial layer is less than the thickness of the second epitaxial layer.
Specifically, referring to fig. 1, the thickness of the third epitaxial layer 300 is smaller than that of the second epitaxial layer 200, when the MPS diode receives a forward applied voltage, since the third epitaxial layer 300 is injected with minority carriers, the barrier layer of the schottky contact region becomes narrow, and therefore, the third epitaxial layer 300 has a smaller influence on the voltage drop when the MPS diode is forward turned on, and the thickness of the third epitaxial layer 300 is smaller, and therefore, the voltage drop caused by the third epitaxial layer 300 to the MPS diode is smaller, and the forward turn-on characteristic of the MPS diode is not affected.
In one embodiment, and as further illustrated in fig. 1, the drift doped region 400 is buried into the second epitaxial layer 200 to a depth greater than the thickness of the third epitaxial layer 300.
Specifically, in this embodiment, the depth of the drift doping region 400 embedded in the second epitaxial layer 200 is greater than the thickness of the third epitaxial layer 300, at this time, the drift doping region 400 is in contact with the second epitaxial layer 200 and the third epitaxial layer 300, when the MPS diode receives a forward applied voltage, minority carriers of the drift doping region 400 flow to the second epitaxial layer 200 and the third epitaxial layer 300, a depletion layer between the drift doping region 400 and the second epitaxial layer 200 and the third epitaxial layer 300 becomes narrow, at this time, the MPS diode is in an on state, when the MPS diode receives a reverse applied voltage, minority carriers flow to a power supply anode, at this time, a depletion layer between the drift doping region 400 and the second epitaxial layer 200 and the third epitaxial layer 300 becomes wide, a potential barrier becomes high, and the MPS diode is prevented from being turned on, and at this time, the MPS diode is in an off state.
In this embodiment, the second epitaxial layer 200 and the third epitaxial layer 300 both participate in the on and off processes of the MPS diode, and the drift doped region 400 is simultaneously in contact with the second epitaxial layer 200 and the third epitaxial layer 300, so that the depletion layer between the second epitaxial layer 200 and the third epitaxial layer 300 can be simultaneously adjusted and controlled to achieve the switching characteristic of the MPS diode.
In one embodiment, the thickness of the third epitaxial layer is 1-5 um.
For example, in a specific embodiment, the thickness of the third epitaxial layer is 3um, and when the MPS diode is subjected to a forward voltage, the third epitaxial layer is a thin epitaxial layer, and when the drift doping region flows in minority carriers, a depletion layer of the third epitaxial layer will conduct with very few minority carriers, so that the thin third epitaxial layer can reduce the influence on the MPS diode drop.
In one embodiment, the first, second and third epitaxial layers are doped with any one of elemental phosphorus, elemental arsenic or a combination of elemental phosphorus and elemental arsenic.
Specifically, referring to fig. 2, the first epitaxial layer 100 is doped with any one of phosphorus, arsenic, or a combination of phosphorus and arsenic, the first epitaxial layer 100 is an N + -type semiconductor, the first epitaxial layer 100 is in contact with a cathode metal layer, and a contact region is an ohmic contact layer, so that the contact resistance of the cathode can be reduced.
The second epitaxial layer 200 is doped with any one of phosphorus, arsenic or a combination of phosphorus and arsenic, the second epitaxial layer 200 is an N-type semiconductor and serves as a cathode of a PN junction, when the MPS diode is turned on with a forward voltage, the second epitaxial layer 200 receives minority carriers output from a P + drift region in the first epitaxial layer 100 and the MPS diode, a width of a depletion layer between the second epitaxial layer 200 and the first epitaxial layer 100 and a width of a depletion layer between the second epitaxial layer 200 and the P + drift region are reduced, the MPS diode is turned on, and when the MPS diode is turned on with a reverse voltage, due to outflow of the minority carriers in the second epitaxial layer 200, widths of the depletion layer between the second epitaxial layer 200 and the first epitaxial layer 100 and the depletion layer between the second epitaxial layer 200 and the MPS P + drift region are increased, thereby turning off the MPS diode.
The third epitaxial layer 300 is doped with any one of phosphorus, arsenic or a combination of phosphorus and arsenic, the third epitaxial layer 300 is an N-type semiconductor, when the MPS diode is turned on by a forward voltage, minority carriers are injected into the third epitaxial layer 300, and therefore conduction of the MPS diode is not affected, when the MPS diode is turned on by a forward voltage, the minority carriers are extracted from the third epitaxial layer 300 and the second epitaxial layer 200, but the doping concentration of the third epitaxial layer 300 is less than that of the second epitaxial layer 200, and therefore the width of a depletion layer between the third epitaxial layer 300 and the P + drift region is greater than that between the second epitaxial layer 200 and the P + drift region, and the resistivity is greater than that of the second epitaxial layer 200, so that electric field intensity distribution below the schottky contact layer can be reduced, and leakage current of the MPS diode can be reduced.
In this embodiment, the doping of the third epitaxial layer 300 with the same elements as the second epitaxial layer 200 and the first epitaxial layer 100 does not affect the performance of the MPS diode when the MPS diode is applied with the forward voltage, and reduces the electric field intensity distribution below the schottky contact layer when the MPS diode is applied with the reverse voltage, thereby improving the breakdown voltage of the MPS diode and reducing the leakage current of the MPS diode when the MPS diode is turned on in the reverse direction.
The present invention provides in a second aspect an MPS diode, as shown in fig. 1, comprising an anode metal layer 500, a first epitaxial layer 100, a second epitaxial layer 200, a third epitaxial layer 300, a cathode metal layer 600, and a drift doped region 400; the anode metal layer 500, the first epitaxial layer 100, the second epitaxial layer 200, the third epitaxial layer 300 and the cathode metal layer 600 are stacked; the doping concentration of the first epitaxial layer 100 is greater than the doping concentration of the second epitaxial layer 200, and the doping concentration of the second epitaxial layer 200 is greater than the doping concentration of the third epitaxial layer 300; the drift doped region 400 is disposed in the third epitaxial layer 300 and is in contact with the second epitaxial layer 200 and the anode metal layer 500.
Specifically, in this embodiment, the drift doping region 400 and the third epitaxial layer 300 form a depletion layer, when a positive voltage is applied across the schottky barrier, that is, the anode metal layer 500 is connected to the positive electrode of the power supply, and the cathode metal layer 600 is connected to the negative electrode of the power supply, the drift doping region 400 and the first epitaxial layer 100 inject minority carriers into the third epitaxial layer 300 and the second epitaxial layer 200, and the number of carriers that are not combined in the third epitaxial layer 300 and the second epitaxial layer 200 increases, so as to achieve the purpose of narrowing the depletion layer and reducing the internal resistance, at this time, the MPS diode is in an on state, when a negative voltage is applied across the depletion layer, the minority carriers are transferred from the second epitaxial layer 200 and the third epitaxial layer 300, and due to the lack of carriers in the third epitaxial layer 300, the depletion layer becomes wider, the internal resistance of the MPS diode becomes larger, at this time, the MPS diode is in an off state. The first epitaxial layer 100 contacts the cathode metal layer 600 to form an ohmic contact layer, which can reduce the contact resistance of the cathode.
In this embodiment, the doping concentration of the third epitaxial layer 300 in the MPS diode is less than the doping concentration of the second epitaxial layer 200, so when the MPS diode receives a reverse voltage, the width of the depletion layer between the third epitaxial layer 300 and the drift doping region 400 is greater than the width of the depletion layer between the second epitaxial layer 200 and the P + drift region, and the resistivity is greater than that of the second epitaxial layer 200, thereby reducing the electric field intensity distribution below the schottky contact layer and reducing the leakage current of the MPS diode.
In one embodiment, referring to fig. 3, the MPS diode further includes a passivation layer 700, the passivation layer 700 contacting the third epitaxial layer 300, the drift doped region 400, and being located at an edge position of the MPS diode.
Specifically, as shown in fig. 3, the passivation layer 700 is disposed on the upper surface of the third epitaxial layer 300, and contacts the third epitaxial layer 300, the drift doping region 400 and the anode metal layer 500, so as to absorb charges in the area at the edge of the MPS diode, thereby eliminating the electric field in the area at the edge of the MPS diode and improving the voltage withstanding property of the MPS diode.
In one embodiment, the passivation layer is silicon dioxide.
In one embodiment, the drift doped region is embedded in the third epitaxial layer at intervals, the upper surface of the drift doped region is in contact with the anode metal layer, and the lower surface of the drift doped region is in contact with the second epitaxial layer.
Specifically, referring to fig. 1, the drift doping region 400 is embedded in the third epitaxial layer 300, and a lower portion of the drift doping region is embedded in the second epitaxial layer 200, and the drift doping region 400 is simultaneously in contact with the anode metal layer 500, the third epitaxial layer 300, and the second epitaxial layer 200, and forms a PIN diode with the second epitaxial layer 200 and the first epitaxial layer 100.
In this embodiment, when the anode metal layer 500 is externally connected to a positive voltage source and the cathode metal layer 600 is externally connected to a negative voltage source, minority carriers in the drift doped region 400 flow to the third epitaxial layer 300 and the second epitaxial layer 200, so that the potential barrier between the drift doped region 400 and the third epitaxial layer 300 and the second epitaxial layer 200 is reduced, and the voltage drop of the MPS diode is reduced, and when the anode metal layer 500 is externally connected to a negative voltage source and the cathode metal layer 600 is externally connected to a positive voltage source, the drift doped region 400 extracts the minority carriers flowing into the third epitaxial layer 300 and the second epitaxial layer 200, so that the potential barrier between the drift doped region 400 and the third epitaxial layer 300 and the second epitaxial layer 200 is increased, and the MPS diode is not turned on.
In one embodiment, the drift doping region is doped with any one of boron ions, indium ions, or a combination of boron ions and indium ions.
In this embodiment, as shown in fig. 1, the drift doping region 400 is doped with any one of boron ions, indium ions, or a combination of boron ions and indium ions to form a P + type semiconductor, the drift doping region 400, the second epitaxial layer 200, and the first epitaxial layer form a PIN diode, when the PIN diode receives a forward voltage, an anode of the PIN diode injects holes into a P + N junction formed by the drift doping region 400 and the second epitaxial layer 200, a cathode of the PIN diode injects electrons into an NN + junction formed by the second epitaxial layer 200 and the first epitaxial layer, the electrons and the holes are recombined in the N type semiconductor, when the flows of the electrons and the holes are equal, a current flowing through the PIN diode is balanced, and the N type semiconductor has a large number of carriers, so that a resistance in the N type semiconductor is low, and a sensitivity of the MPS semiconductor is high.
The epitaxial wafer structure comprises a first epitaxial layer, a second epitaxial layer and a third epitaxial layer which are sequentially stacked; the doping concentration of the first epitaxial layer is greater than that of the second epitaxial layer, and the doping concentration of the second epitaxial layer is greater than that of the third epitaxial layer; the third epitaxial layer is in contact with the anode metal layer of the MPS diode, and the first epitaxial layer is in contact with the cathode metal layer of the MPS diode; the drift doping area of the MPS diode is arranged in the third epitaxial layer and is in contact with the second epitaxial layer and the anode metal layer, when the MPS diode is started in the forward direction, the resistivity of the MPS diode is low, and when the MPS diode is started in the reverse direction, the second epitaxial layer and the third epitaxial layer are in a high-resistance state, so that the distribution of the surface electric field intensity below the anode metal layer can be reduced, and the problem of larger leakage current of the MPS is solved.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-mentioned division of the functional units and modules is illustrated, and in practical applications, the above-mentioned function distribution may be performed by different functional units and modules according to needs, that is, the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-mentioned functions. Each functional unit and module in the embodiments may be integrated in one processing unit, or each unit may exist alone physically, or two or more units are integrated in one unit, and the integrated unit may be implemented in a form of hardware, or in a form of software functional unit. In addition, specific names of the functional units and modules are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working processes of the units and modules in the system may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.

Claims (10)

1. An epitaxial wafer structure for application in an MPS diode, the epitaxial wafer structure comprising:
the first epitaxial layer, the second epitaxial layer and the third epitaxial layer are sequentially stacked;
the doping concentration of the first epitaxial layer is greater than that of the second epitaxial layer, and the doping concentration of the second epitaxial layer is greater than that of the third epitaxial layer;
wherein the third epitaxial layer is in contact with the anode metal layer of the MPS diode, and the first epitaxial layer is in contact with the cathode metal layer of the MPS diode; the drift doped region of the MPS diode is disposed in the third epitaxial layer and is in contact with the second epitaxial layer and the anode metal layer.
2. The epitaxial wafer structure of claim 1, wherein the thickness of the third epitaxial layer is less than the thickness of the second epitaxial layer.
3. The epitaxial wafer structure of claim 1, wherein the drift doped region is buried into the second epitaxial layer to a depth greater than a thickness of the third epitaxial layer.
4. The epitaxial wafer structure of claim 1, wherein the thickness of the third epitaxial layer is 1-5 um.
5. The epitaxial wafer structure of claim 1, wherein the first epitaxial layer, the second epitaxial layer, and the third epitaxial layer are doped with any one of elemental phosphorus, elemental arsenic, or a combination of elemental phosphorus and elemental arsenic.
6. An MPS diode, comprising: the semiconductor device comprises an anode metal layer, a first epitaxial layer, a second epitaxial layer, a third epitaxial layer, a cathode metal layer and a drift doped region;
the anode metal layer, the first epitaxial layer, the second epitaxial layer, the third epitaxial layer and the cathode metal layer are stacked;
the doping concentration of the first epitaxial layer is greater than that of the second epitaxial layer, and the doping concentration of the second epitaxial layer is greater than that of the third epitaxial layer;
the drift doped region is arranged in the third epitaxial layer and is in contact with the second epitaxial layer and the anode metal layer.
7. The MPS diode of claim 6, further comprising a passivation layer in contact with said third epitaxial layer and said drift doped region and located at an edge position of said MPS diode.
8. The MPS diode of claim 7, wherein said passivation layer is silicon dioxide.
9. The MPS diode of claim 6, wherein said floating doped region is spaced-apart embedded in said third epitaxial layer, and wherein an upper surface of said floating doped region is in contact with said anode metal layer and a lower surface is in contact with said second epitaxial layer.
10. The MPS diode of claim 6, wherein said drift doped region is doped with an element selected from the group consisting of boron ions, indium ions, and combinations thereof.
CN202111343385.8A 2021-11-13 2021-11-13 Be applied to MPS diode's epitaxial wafer structure and MPS diode Pending CN114093929A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115223868A (en) * 2022-09-15 2022-10-21 深圳芯能半导体技术有限公司 High-voltage fast recovery diode and preparation method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115223868A (en) * 2022-09-15 2022-10-21 深圳芯能半导体技术有限公司 High-voltage fast recovery diode and preparation method thereof

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