CN115513054A - Groove type MPS device and preparation method thereof - Google Patents

Groove type MPS device and preparation method thereof Download PDF

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CN115513054A
CN115513054A CN202211130548.9A CN202211130548A CN115513054A CN 115513054 A CN115513054 A CN 115513054A CN 202211130548 A CN202211130548 A CN 202211130548A CN 115513054 A CN115513054 A CN 115513054A
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张益鸣
刘杰
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Shenzhen Xiner Semiconductor Technology Co Ltd
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Shenzhen Xiner Semiconductor Technology Co Ltd
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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Abstract

The groove type MPS device and the preparation method thereof are characterized in that a groove is formed in the front face of an N-type epitaxial layer, then first P-type doping ions are injected into the bottom of the groove and then annealed at high temperature to form a first P-type doping area, second P-type doping ions are injected into the lower portion of the side wall of the groove, third P-type doping ions are injected into the upper portion of the side wall of the groove, then low-temperature annealing is performed to form a second P-type doping area below the side wall of the groove, and a third P-type doping area is formed above the side wall of the groove.

Description

Groove type MPS device and preparation method thereof
Technical Field
The application belongs to the technical field of power devices, and particularly relates to a groove type MPS device and a preparation method thereof.
Background
The fast recovery diode is generally formed by epitaxy of a PIN structure, and under the application of a global or local carrier lifetime control technology, the carrier lifetime is reduced, so that the diode has the characteristic of fast recovery. The diode is usually used in parallel with an Insulated Gate Bipolar Transistor (IGBT), the turn-on loss of the IGBT is usually increased by a peak current generated in the diode reverse recovery process, and if the epitaxial buffer layer is not well controlled, the low softness is caused, and the Gate voltage of the IGBT is affected. The higher the forward turn-on voltage drop (VF), i.e. the less efficient the anode injection, the lower the reverse peak current (IRM) and the less the impact on the IGBT, but the higher the diode loss, which is usually a fast recovery diode using global carrier lifetime control.
The MPS (merge PIN schottky) fast recovery diode integrates a Schottky structure and a PIN structure, reduces the anode injection efficiency under the condition of not improving the forward starting voltage drop, and has the conditions of low VF, low IRM and high-voltage fast recovery diodes. However, current fast recovery diode structures cannot simultaneously meet lower VF and lower anode injection efficiency.
Disclosure of Invention
The present application aims to provide a trench MPS device and a method for manufacturing the same, and aims to solve the problem that the conventional fast recovery diode structure cannot satisfy both low VF and low anode injection efficiency.
A first aspect of an embodiment of the present application provides a method for manufacturing a trench-type MPS device, where the method includes:
forming an oxide layer on the front surface of the N-type epitaxial layer, and etching the oxide layer and the N-type epitaxial layer under the protection of a first etching mask so as to form a groove on the front surface of the N-type epitaxial layer;
injecting first P-type doping ions to the bottom of the groove under the protection of the oxide layer, and performing annealing treatment under a first annealing condition to form a first P-type doping region at the bottom of the groove and form an N-type channel region at an interface between the first P-type doping region and the N-type epitaxial layer;
injecting second P-type doped ions into the side wall of the groove to form a second P-type doped region on the side wall of the groove; the doping concentration of the second P-type doping region is greater than that of the first P-type doping region;
injecting third P-type doping ions above the side wall of the groove, and carrying out annealing treatment under a second annealing condition to form a third P-type doping area above the side wall of the groove; wherein the annealing temperature in the second annealing condition is lower than the annealing temperature in the first annealing condition, and the doping concentration of the third P-type doping region is higher than that of the second P-type doping region;
forming Schottky metal layers on two sides of the groove, and forming ohmic metal layers on the bottom and the side wall of the groove;
and forming a cathode metal layer on the back surface of the N-type epitaxial layer.
In one embodiment, the step of implanting third P-type dopant ions above the sidewalls of the recess and performing an annealing process under the second annealing condition includes:
forming a second etching mask below the front surface of the N-type epitaxial layer, the bottom of the groove and the side wall of the groove to determine a third P-type ion doping area;
injecting third P-type doped ions above the side wall of the groove under the protection of the second etching mask;
and removing the second etching mask and the oxide layer, and carrying out annealing treatment under the second annealing condition.
In one embodiment, the third P-type dopant ions are implanted at a dose at least 10 times that of the first P-type dopant ions.
In one embodiment, the first P-type dopant ions are implanted at a dose of 1 × 10 12 -9*10 12 The implantation energy of the first P-type doped ions is 20-120KeV;
the implantation dosage of the second P-type doped ions is 5 x 10 12 -1*10 13 The second P type doping is removedThe implantation energy of the seeds is 60-200KeV;
the implantation dosage of the third P-type doped ions is 1 x 10 14 -8*10 15 And the implantation energy of the third P-type doped ions is 60-120KeV.
In one embodiment, the annealing temperature in the first annealing condition is 1050 ℃ to 1200 ℃, and the annealing time in the first annealing condition is 100 minutes to 600 minutes;
the annealing temperature in the second annealing condition is 800 ℃ to 1000 ℃, and the annealing time in the second annealing condition is 30 minutes to 90 minutes.
In one embodiment, the implantation angle of the second P-type dopant ion D = arctan (a/(B + C)), a is the width of the groove, B is the thickness of the oxide layer, and C is the depth of the groove.
In one embodiment, the implantation angle of the third P-type doped ions is smaller than that of the second P-type doped ions and greater than 9 °.
A second aspect of embodiments of the present application also provides a trench-type MPS device, including:
the front surface of the N-type epitaxial layer is provided with a groove;
the first P-type doped region surrounds the bottom of the groove of the N-type epitaxial layer;
the N-type channel region is arranged between the first P-type doped region and the N-type epitaxial layer;
the second P-type doped region is arranged on the side wall of the groove;
the third P-type doped region is arranged on the side wall of the groove and is positioned between the first P-type doped region and the second P-type doped region; the doping concentration of the third P-type doping region is greater than that of the second P-type doping region, and the doping concentration of the second P-type doping region is greater than that of the first P-type doping region;
the Schottky metal layer is positioned on the front surface of the N-type epitaxial layer and positioned on two sides of the groove;
the ohmic metal layer is positioned in the groove;
and the cathode metal layer is positioned on the back surface of the N-type epitaxial layer.
In one embodiment, the cross-sectional shape of the second P-type doped region is a parallelogram.
In one embodiment, the cathode metal layer is a Ni/Ti/Ni/Ag laminate material.
In the trench MPS device and the method for manufacturing the same provided in the embodiments of the present application, a groove is formed on a front surface of an N-type epitaxial layer, then a first P-type doping ion is implanted into a bottom of the groove and then annealed at a high temperature to form a first P-type doping region, a second P-type doping ion is implanted into a lower side of a sidewall of the groove, a third P-type doping ion is implanted into an upper side of the sidewall of the groove, and then annealed at a low temperature to form a second P-type doping region into the lower side of the sidewall of the groove and form a third P-type doping region into the upper side of the sidewall of the groove, where doping concentrations of the first P-type doping region, the second P-type doping region and the third P-type doping region are gradually increased, so that an electric field shielding effect of the bottom of the groove on a schottky device is weak, an anode injection efficiency above the sidewall of the groove is high, and simultaneously, a condition that the electric field shielding effect on the schottky device is high and the IRM is small is satisfied, thereby realizing characteristics of a high withstand voltage, a low VF, a high softness and a low IRM of a fast recovery diode device.
Drawings
Fig. 1 is a schematic flow chart of a method for manufacturing a trench MPS device according to an embodiment of the present disclosure.
Fig. 2 is a schematic diagram of forming the groove 110 according to an embodiment of the present disclosure.
Fig. 3 is a schematic diagram of forming a first P-type doped region 310 according to an embodiment of the present disclosure.
Fig. 4 is a schematic diagram of forming a second P-type doped region 320 according to an embodiment of the present disclosure.
Fig. 5 is a schematic diagram of forming a third P-type doped region 330 according to an embodiment of the present disclosure.
Fig. 6 is a schematic flowchart of step S400 provided in the embodiment of the present application.
Fig. 7 is a schematic view of doping concentrations of a P-type doped region and an N-type epitaxial layer according to an embodiment of the present disclosure.
Fig. 8 is a schematic structural diagram of a trench-type MPS device according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or be indirectly connected to the other element.
It will be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like, refer to an orientation or positional relationship illustrated in the drawings for convenience in describing the present application and to simplify description, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the present application.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
The fast recovery diode is generally formed by an extension of a PIN structure, and under the application of a global or local carrier life control technology, the carrier life is reduced, so that the diode has the characteristic of fast recovery. The diode is usually used in parallel with the IGBT, the peak current generated in the reverse recovery process of the diode can increase the turn-on loss of the IGBT, and if the epitaxial buffer layer is not well controlled, the softness can be low, and the grid voltage of the IGBT can be influenced. Generally, the higher the forward turn-on voltage drop VF of a fast recovery diode using global carrier lifetime control is, i.e., the anode injection efficiency is low, the reverse peak current IRM is relatively small, the smaller the influence on the IGBT is, but the loss of the diode is increased.
MPS fast recovery diode, because fuse schottky and PIN structure, under the condition that does not promote forward VF, anode injection efficiency has been reduced, possess the condition of making low VF, low IRM and high softness fast recovery diode, nevertheless because the schottky junction is great at the electric field shielding that does not have under, for obtaining better electric field shielding effect, need to prepare high enriched P junction, exhaust the schottky junction region, anode injection efficiency has been promoted simultaneously, consequently hardly prepare high-pressure MPS fast recovery diode.
The embodiment of the present application provides a method for manufacturing a trench-type MPS device, and referring to fig. 1, the method in the embodiment includes steps S100 to S600.
In step S100, an oxide layer is formed on the front surface of the N-type epitaxial layer, and the oxide layer and the N-type epitaxial layer are etched under the protection of the first etching mask, so as to form a groove on the front surface of the N-type epitaxial layer.
In this embodiment, as shown in fig. 2, an oxide layer 200 is first formed on the front surface of the N-type epitaxial layer 100 by epitaxial growth, and then a first etching mask is formed on the surface of the oxide layer 200 to define an etching region, and the etching process is performed on the etching region to an etching depth reaching the inside of the N-type epitaxial layer 100, so as to form a groove 110 on the front surface of the N-type epitaxial layer 100.
In a specific application embodiment, the oxidation layer 200 may be formed on the front surface of the N-type epitaxial layer 100 by oxidizing the front surface of the N-type epitaxial layer 100, then spin-coating a photoresist on the surface of the oxidation layer 200, performing photolithography and development to determine an etched region, and then forming the groove 110 on the front surface of the N-type epitaxial layer 100 by dry etching the oxidation layer 200 and the N-type epitaxial layer 100.
In a specific application, as shown in fig. 2, the trench width, the trench depth of the trench 110 and the thickness of the oxide layer 200 determine the angle of the tilt angle implantation at the later stage, and the tilt angle implantation angle of the current ion implanter is not greater than 45 ℃, and at the same time, the temperature and duration of the high-temperature annealing at the later stage are influenced and need to be selected according to the process conditions.
In one embodiment, the N-type epitaxial layer 100 may be an N-type silicon layer.
In a specific embodiment, the depth of the trench of the recess 110 is at least half the thickness of the N-type epitaxial layer 100.
In step S200, under the protection of the oxide layer, a first P-type doped ion is implanted into the bottom of the groove, and annealing treatment is performed under a first annealing condition to form a first P-type doped region at the bottom of the groove and form an N-type channel region at an interface between the first P-type doped region and the N-type epitaxial layer.
In the present embodiment, referring to fig. 3, under the protection of the oxide layer 200 and the first etching mask above the oxide layer, first P-type doping ions are implanted into the bottom of the recess 110, and then annealing is performed under a first annealing condition, so as to form a first P-type doping region 310 at the bottom of the recess 110, and the annealing causes the first P-type doping ions in the first P-type doping region 310 to diffuse, the concentration of which gradually decreases to the boundary with the N-type epitaxial layer 100, and form an N-type channel region 120 at the boundary between the first P-type doping region 310 and the N-type epitaxial layer 100.
In one embodiment, the first P-type dopant ions may be boron ions.
In specific application, under the protection of the oxide layer 200 and a first etching mask above the oxide layer, conventional boron ion implantation is performed on the bottom of the groove 110, the boron ions are implanted to the bottom of the groove 110 and below part of the side wall, then high-temperature annealing treatment is performed under a first annealing condition to promote the implanted boron ions to diffuse, at the moment, the concentration of the boron ions at the bottom plane of the groove 110 is higher, and then the concentration of the boron ions is sequentially decreased to the abrupt PN junction.
In a specific application embodiment, boron ions are implanted into the bottom of the recess 110, the region implanted with boron ions is the first P-type doped region 310, which forms a PN junction with the N-type epitaxial layer 100, and the N-type channel region 120 is formed at the boundary between the first P-type doped region 310 and the N-type epitaxial layer 100, and the width of the N-type channel region 120 can be controlled by matching the annealing temperature and the annealing time of boron ions.
In one embodiment, the width of the N-type channel region 120 can be controlled to be 1-3um by matching the annealing temperature and the annealing time of the boron ions.
In one embodiment, the first P-type doped region 310 surrounds the bottom of the recess 110, and the doping type above the sidewall of the recess 110 remains N-type for leaving a schottky junction region to be prepared later.
In a specific embodiment, the doping concentration of the first P-type doped region 310 is inversely proportional to the distance between the bottom of the groove 110, i.e. the doping concentration is higher closer to the bottom of the groove 110 until the concentration of the first P-type doped ions at the abrupt PN junction 311 between the first P-type doped region and the N-type epitaxial layer 100 is the lowest
In one embodiment, the first P-type dopant ions are implanted at a dose of 1 × 10 12 -9*10 12 The implantation energy of the first P-type doped ions is 20-120KeV.
In step S300, second P-type doping ions are implanted into the sidewalls of the recess to form a second P-type doped region on the sidewalls of the recess.
In the present embodiment, the doping concentration of the second P-type doped region 320 is greater than the doping concentration of the first P-type doped region 310, and as shown in fig. 4, the second P-type doped region 320 is formed by implanting second P-type doped ions into the sidewall of the groove 110 as an implantation region of medium-concentration P-type doped ions.
Specifically, the second P-type doped ions may be the same as the first P-type doped ions, for example, the second P-type doped ions and the first P-type doped ions are the same as boron ions; or the second P-type doped ions may be different from the first P-type doped ions, for example, the second P-type doped ions are boron ions and the first P-type doped ions are aluminum ions.
In one embodiment, the implantation angle of the second P-type dopant ions D = arctan (a/(B + C)), a is the width of the groove 110, B is the thickness of the oxide layer 200, and C is the depth of the groove 110.
In a specific application, because the implantation angle D of the second P-type doped ions is greater than 0, the cross-sectional shape of the second P-type doped region before the annealing treatment is a parallelogram.
In one embodiment, the doping concentration of the second P-type doped region 320 is at least 10 times the doping concentration of the first P-type doped region 310.
In step S400, third P-type doped ions are implanted above the sidewall of the groove, and an annealing process is performed under a second annealing condition to form a third P-type doped region above the sidewall of the groove.
In the present embodiment, the annealing temperature in the second annealing condition is lower than that in the first annealing condition, and the doping concentration of the third P-type doped region 330 is higher than that of the second P-type doped region 320.
In one embodiment, the doping concentration of the third P-type doped region 330 is at least 100 times the doping concentration of the first P-type doped region 310. Specifically, the doping concentrations of the first P-type doped region 310, the second P-type doped region 320 and the third P-type doped region 330 are gradually increased, and the doping concentration is at least 10 times of the doping concentration of the previous P-type doped region.
In the present embodiment, referring to fig. 5, the implantation dosage of the third P-type doped ions is greater than that of the second P-type doped ions, and at this time, a high-concentration third P-type doped region 330 is formed above the sidewall of the groove 110.
In one embodiment, referring to fig. 6, the step of implanting third P-type dopant ions above the sidewall of the groove and performing the annealing process under the second annealing condition in step S400 includes steps S410 to S430.
In step S410, a second etching mask is formed on the front surface of the N-type epitaxial layer, the bottom of the groove, and the lower side of the sidewall of the groove to determine a third P-type ion doped region.
In this embodiment, a photoresist may be spin-coated on the front surface of the N-type epitaxial layer 100, the bottom of the recess 110 and the lower side of the sidewall of the recess 110 to serve as a second etching mask, and then a third P-type ion doped region is patterned after exposure to implant third P-type doped ions.
In one embodiment, the second etch mask has a thickness of 0.1-1.0 μm.
In one embodiment, after spin coating the photoresist, the thickness of the photoresist is 0.1-1.0 μm, and the groove 110 is completely covered by the photoresist; and adjusting the exposure intensity to ensure that the photoresist is reserved at the PN junction on the side wall of the groove 110, namely the photoresist above the PN junction is exposed, and after the photoresist is cured, the photoresist is reserved at the lower part and is used as an injection barrier layer of high-concentration boron ions together with the surface oxide layer 200.
In step S420, under the protection of the second etching mask, third P-type doped ions are implanted above the sidewall of the recess.
In this embodiment, the implantation angle is adjusted to implant the third P-type doped ions, and the implantation dose of the third P-type doped ions is greater than that of the second P-type doped ions.
In one embodiment, the third P-type dopant ions are implanted at a dose of 1 × 10 14 -8*10 15 The implantation energy of the third P-type doped ions is 60-120KeV.
In step S430, the second etching mask and the oxide layer are removed, and annealing is performed under the second annealing condition.
In this embodiment, after removing the second etching mask and the oxide layer 200, an annealing process is performed under a second annealing condition to activate the second P-type doping ions and the third P-type doping ions, so that a third P-type doping region 330 with a high doping concentration and a second P-type doping region 320 with a medium doping concentration are formed on the sidewall of the groove 110.
In one embodiment, the photoresist and the oxide layer are removed, and the middle and high concentration boron ion doped regions are activated by annealing at 800-1000 ℃ for 30-90 minutes to form the structure shown in fig. 5, i.e., the sidewall is composed of the third P-type doped region 330 with high doping concentration and the second P-type doped region 320 with medium doping concentration, and the bottom is composed of the first P-type doped region 310 with lower doping concentration to form three implanted regions.
The concentration relationship of the third P-type doped region 330, the second P-type doped region 320 and the first P-type doped region 310 is shown in fig. 7, and with reference to fig. 7, the third P-type doped region 330 and the second P-type doped region 320 form a sidewall implantation region 321 of the groove 110, the doping concentration thereof gradually decreases, the distance between the doping concentration in the first P-type doped region 310 and the bottom of the groove 110 is in an inverse proportion relationship, that is, the closer to the bottom of the groove 110, the higher the doping concentration thereof is, until the concentration of the first P-type doped ions at the abrupt PN junction 311 between the first P-type doped region 310 and the N-type epitaxial layer 100 is the lowest, and the doping concentration of the first P-type doped ions at this position is less than the doping concentration of the N-type doped ions in the N-type epitaxial layer 100.
In step S500, schottky metal layers are formed on both sides of the groove, and an ohmic metal layer is formed on the bottom and sidewalls of the groove.
In this embodiment, as shown in fig. 8, a schottky metal layer 410 is formed on the N-type epitaxial layer 100 and the third P-type doped region 330 on two sides of the groove 110, and an ohmic metal layer 420 is formed on the bottom and the sidewall of the groove 110, so as to ensure that the schottky metal layer 410 covers the third P-type doped region 330, prevent the ohmic metal layer 420 from contacting the N-type channel region 120 to form an ohmic contact, and avoid affecting the control of the leakage current of the device.
In one embodiment, the schottky metal layer 410 and the ohmic metal layer 420 are connected to cover two corners of the recess 110, and an upper surface of the ohmic metal layer 420 is flush with an upper surface of the third P-type doped region 330.
In one embodiment, a schottky metal material is deposited and the sidewall and bottom schottky metal material is etched away, the schottky metal layer 410 on the top of the N-type epitaxial layer 100 is retained, and the schottky metal layer 410 is required to cover the third P-type doped region 330 to prevent the ohmic metal layer 420 from forming an ohmic contact with the N-type channel region 120, which is not good for controlling the leakage current, and the ohmic metal material is deposited after the short schottky metal alloy and is used as an ohmic metal alloy to form the device structure shown in fig. 8.
In step S600, a cathode metal layer is formed on the back surface of the N-type epitaxial layer.
In the present embodiment, as shown in fig. 8, a cathode metal material is deposited on the back surface of the N-type epitaxial layer 100 to form a cathode metal layer 510.
In the present embodiment, in the trench-type MPS device manufactured by the above manufacturing method, the anode injection efficiency of the first P-type doped region 310 at the bottom of the trench 110 is low, and the anode injection efficiency of the P-type doped region at the sidewall of the trench 110 is moderate, so that the IRM of the trench-type MPS device is reduced, the softness factor is improved, but the electric field shielding of the schottky device portion is weak. Further, by forming the third P-type doped region 330 with a higher doping concentration above the sidewall of the recess 110, the anode injection efficiency is higher, but the area ratio is small, the influence on the IRM is small, and the electric field intensity of the schottky device portion can be shielded; the presence of the schottky device portion may further reduce the anode injection efficiency while increasing the softness of the device. Therefore, the groove type MPS device prepared by the preparation method can obtain the characteristics of high withstand voltage, low VF, high softness and low IRM.
In one embodiment, the third P-type dopant ions are implanted at a dose at least 10 times the dose of the first P-type dopant ions.
In one embodiment, the first P-type dopant ions are implanted at a dose of 1 x 10 12 -9*10 12 The implantation energy of the first P-type doping ions is 20-120KeV;
the implantation dosage of the second P-type doped ions is 5 x 10 12 -1*10 13 The implantation energy of the second P-type doped ions is 60-200KeV;
the implantation dosage of the third P-type doped ions is 1 x 10 14 -8*10 15 The implantation energy of the third P-type doped ions is 60-120KeV.
In one embodiment, the annealing time in the first annealing condition is greater than the annealing time in the second annealing condition.
In one embodiment, the annealing temperature in the first annealing condition is 1050 ℃ to 1200 ℃, and the annealing time in the first annealing condition is 100 minutes to 600 minutes; the annealing temperature in the second annealing condition is 800 ℃ to 1000 ℃, and the annealing time in the second annealing condition is 30 minutes to 90 minutes.
In this embodiment, by setting the annealing time in the first annealing condition to be longer than the annealing time in the second annealing condition, the diffusion depths of the second P-type doped ions and the third P-type doped ions can be reduced, and at this time, the thicknesses of the second P-type doped region 320 and the third P-type doped region 330 are smaller than the thickness of the first P-type doped region 310.
In one embodiment, the diffusion depth of the second and third P-type dopant ions is at least less than half of the diffusion depth of the first P-type dopant ions.
In one embodiment, the implantation angle of the third P-type dopant ions is smaller than the implantation angle of the second P-type dopant ions and greater than 9 °.
In one embodiment, after the oxide layer 110 on the top of the device is removed, schottky contact and ohmic contact are respectively prepared to form an MPS structure, and then platinum diffusion or electron irradiation may be performed according to actual process conditions, so that the MPS diode has a fast recovery characteristic.
The embodiment of the application also provides a groove type MPS device which is prepared by adopting the preparation method of any one of the embodiments.
An embodiment of the present application further provides a trench-type MPS device, which is shown in fig. 8 and includes: the N-type epitaxial layer 100, the first P-type doped region 310, the N-type channel region 120, the second P-type doped region 320, the third P-type doped region 330, the schottky metal layer 410, the ohmic metal layer 420, and the cathode metal layer 510.
Specifically, a groove is formed in the front surface of the N-type epitaxial layer 100; the first P-type doped region 310 surrounds the bottom of the recess of the N-type epitaxial layer 100; the N-type channel region 120 is disposed between the first P-type doped region 310 and the N-type epitaxial layer 100; the second P-type doped region 320 is disposed on the sidewall of the groove; the third P-type doped region 330 is disposed on the sidewall of the trench and between the first P-type doped region 310 and the second P-type doped region 320; the schottky metal layer 410 is positioned on the front surface of the N-type epitaxial layer 100 and positioned on two sides of the groove; the ohmic metal layer 420 is positioned in the groove; a cathode metal layer 510 is located on the back side of the N-type epitaxial layer 100.
In this embodiment, the doping concentrations of the third P-type doped region 330, the second P-type doped region 320 and the first P-type doped region 310 are gradually decreased, specifically, the concentration relationship among the third P-type doped region 330, the second P-type doped region 320 and the first P-type doped region 310 is as shown in fig. 7, and with reference to fig. 7, the third P-type doped region 330 and the second P-type doped region 320 form a sidewall implantation region 321 of the groove, the doping concentration thereof gradually decreases, the distance between the doping concentration in the first P-type doped region 310 and the bottom of the groove is in an inverse proportion relationship, that is, the doping concentration thereof is higher as the side is closer to the bottom of the groove until the concentration of the first P-type doped ions at the abrupt PN junction 311 between the first P-type doped region and the N-type epitaxial layer 100 is the lowest, and the doping concentration of the first P-type doped ions at this position is less than the doping concentration of the N-type doped ions in the N-type epitaxial layer 100.
Specifically, the first P-type doped region 310 forms a PN junction with the N-type epitaxial layer 100, and the N-type channel region 120 is formed at the boundary between the first P-type doped region 310 and the N-type epitaxial layer 100, so that the width of the N-type channel region 120 can be controlled by matching the annealing temperature and the annealing time of boron ions.
In one embodiment, the N-type channel region 120 has a width of 1-3um.
In a specific embodiment, the depth of the trench of the recess is at least half the thickness of the N-type epitaxial layer 100.
In one embodiment, the schottky metal layer 410 covers the third P-type doped region 330 to prevent the subsequent ohmic metal layer 420 from forming an ohmic contact with the N-type channel region 120, which is detrimental to leakage current control.
In one embodiment, the cross-sectional shape of the second P-type doped region 320 is a parallelogram, and the included angle between the second P-type doped region 320 and the bottom surface of the groove is E =90 ° + D.
D = arctan (a/(B + C)), a is the width of the groove, B is the thickness of the oxide layer covering the surface of the N-type epitaxial layer 100 when the second P-type dopant is implanted, and C is the depth of the groove.
In one embodiment, the cathode metal layer 510 is a Ni/Ti/Ni/Ag stack material.
In the trench MPS device and the method for manufacturing the same provided by the embodiment of the application, a groove is formed in a front surface of an N-type epitaxial layer, then a first P-type doped region is formed by high-temperature annealing after a first P-type doped ion is injected into a bottom of the groove, a second P-type doped ion is injected into a lower portion of a side wall of the groove, a third P-type doped ion is injected into an upper portion of the side wall of the groove, a second P-type doped region is formed by low-temperature annealing in a lower portion of the side wall of the groove, and a third P-type doped region is formed in an upper portion of the side wall of the groove.
It will be clear to those skilled in the art that, for convenience and simplicity of description, the above division of the doped regions is merely illustrated, and in practical applications, the above functional region allocation can be performed by different doped regions according to needs, that is, the internal structure of the device is divided into different doped regions to perform all or part of the above-described functions.
In the embodiment, each doped region may be integrated in one functional region, or each doped region may exist alone physically, or two or more doped regions are integrated in one functional region, and the integrated functional regions may be implemented by using the same type of doped ions, or may be implemented by using multiple types of doped ions together. In addition, the specific names of the doped regions are only for the convenience of distinguishing from each other, and are not used to limit the protection scope of the present application. For a specific working process of the middle doped region in the method for manufacturing the device, reference may be made to a corresponding process in the foregoing method embodiment, which is not described herein again.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.

Claims (10)

1. A method of fabricating a trench-type MPS device, the method comprising:
forming an oxide layer on the front surface of the N-type epitaxial layer, and etching the oxide layer and the N-type epitaxial layer under the protection of a first etching mask to form a groove on the front surface of the N-type epitaxial layer;
injecting first P-type doping ions to the bottom of the groove under the protection of the oxide layer, and performing annealing treatment under a first annealing condition to form a first P-type doping region at the bottom of the groove and form an N-type channel region at an interface between the first P-type doping region and the N-type epitaxial layer;
injecting second P-type doping ions into the side wall of the groove to form a second P-type doping area on the side wall of the groove; the doping concentration of the second P-type doping region is greater than that of the first P-type doping region;
injecting third P-type doping ions above the side wall of the groove, and carrying out annealing treatment under a second annealing condition to form a third P-type doping area above the side wall of the groove; wherein the annealing temperature in the second annealing condition is lower than the annealing temperature in the first annealing condition, and the doping concentration of the third P-type doping region is higher than that of the second P-type doping region;
forming Schottky metal layers on two sides of the groove, and forming ohmic metal layers at the bottom and the side wall of the groove;
and forming a cathode metal layer on the back surface of the N-type epitaxial layer.
2. The method of claim 1, wherein the step of implanting third P-type dopant ions over the sidewalls of the recess and annealing under the second annealing condition comprises:
forming a second etching mask below the front surface of the N-type epitaxial layer, the bottom of the groove and the side wall of the groove to determine a third P-type ion doping area;
injecting third P-type doped ions above the side wall of the groove under the protection of the second etching mask;
and removing the second etching mask and the oxide layer, and carrying out annealing treatment under the second annealing condition.
3. The method of claim 1, wherein the third P-type dopant ion is implanted at a dose at least 10 times the dose of the first P-type dopant ion.
4. The method of claim 1, wherein the first P-type dopant ion is implanted at a dose of 1 x 10 12 -9*10 12 The implantation energy of the first P-type doping ions is 20-120KeV;
the implantation dosage of the second P-type doped ions is 5 x 10 12 -1*10 13 The implantation energy of the second P-type doped ions is 60-200KeV;
the implantation dosage of the third P-type doped ions is 1 x 10 14 -8*10 15 And the implantation energy of the third P-type doping ions is 60-120KeV.
5. The method of claim 1, wherein the annealing temperature in the first annealing condition is 1050 ℃ to 1200 ℃, and the annealing time in the first annealing condition is 100 minutes to 600 minutes;
the annealing temperature in the second annealing condition is 800-1000 ℃, and the annealing time in the second annealing condition is 30-90 minutes.
6. The method according to claim 1, wherein an implantation angle of the second P-type dopant ion is D = arctan (a/(B + C)), a is a width of the groove, B is a thickness of the oxide layer, and C is a depth of the groove.
7. The method of claim 6, wherein an implantation angle of the third P-type dopant ion is smaller than an implantation angle of the second P-type dopant ion and greater than 9 °.
8. A trench-type MPS device, comprising:
the front surface of the N-type epitaxial layer is provided with a groove;
the first P-type doped region surrounds the bottom of the groove of the N-type epitaxial layer;
the N-type channel region is arranged between the first P-type doped region and the N-type epitaxial layer;
the second P-type doped region is arranged on the side wall of the groove;
the third P-type doped region is arranged on the side wall of the groove and is positioned between the first P-type doped region and the second P-type doped region; the doping concentration of the third P-type doping region is greater than that of the second P-type doping region, and the doping concentration of the second P-type doping region is greater than that of the first P-type doping region;
the Schottky metal layer is positioned on the front surface of the N-type epitaxial layer and positioned on two sides of the groove;
the ohmic metal layer is positioned in the groove;
and the cathode metal layer is positioned on the back surface of the N-type epitaxial layer.
9. The trench-type MPS device of claim 8, wherein said second P-doped region has a parallelogram cross-sectional shape.
10. The trench-type MPS device of claim 8, wherein said cathode metal layer is a Ni/Ti/Ni/Ag laminate material.
CN202211130548.9A 2022-09-15 2022-09-15 Groove type MPS device and preparation method thereof Pending CN115513054A (en)

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CN202211130548.9A CN115513054A (en) 2022-09-15 2022-09-15 Groove type MPS device and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
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