CN114895093A - Topology identification receiving module - Google Patents
Topology identification receiving module Download PDFInfo
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- CN114895093A CN114895093A CN202210394685.7A CN202210394685A CN114895093A CN 114895093 A CN114895093 A CN 114895093A CN 202210394685 A CN202210394685 A CN 202210394685A CN 114895093 A CN114895093 A CN 114895093A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/0092—Arrangements for measuring currents or voltages or for indicating presence or sign thereof measuring current only
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R15/00—Details of measuring arrangements of the types provided for in groups G01R17/00 - G01R29/00, G01R33/00 - G01R33/26 or G01R35/00
- G01R15/14—Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks
- G01R15/20—Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using galvano-magnetic devices, e.g. Hall-effect devices, i.e. measuring a magnetic field via the interaction between a current and a magnetic field, e.g. magneto resistive or Hall effect devices
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
- G01R27/26—Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
- G01R27/2605—Measuring capacitance
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N50/00—Galvanomagnetic devices
- H10N50/10—Magnetoresistive devices
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
Abstract
A topology identification reception module comprising: the magnetic focusing ring, the magnetic sensing chip and the signal processing circuit; the magnetic sensing chip comprises a measuring capacitor and a reference capacitor, the measuring capacitor is formed by connecting a plurality of measuring magnetic capacitor elements in parallel, each measuring magnetic capacitor element comprises a lower electrode layer, a pinning layer, a first insulating layer, a free layer and an upper electrode layer, the magnetization direction of the pinning layer of the measuring magnetic capacitor element is unchanged, and the magnetization direction of the free layer of the measuring magnetic capacitor element is changed along with an external magnetic field; the reference capacitor is formed by connecting a plurality of reference magnetic capacitor elements in parallel, each reference magnetic capacitor element comprises a lower electrode layer, a pinning layer, a first insulating layer, a free layer, an upper electrode layer, a second insulating layer and a magnetic shielding layer, and the magnetization directions of the free layer and the pinning layer of the reference magnetic capacitor element are unchanged; the signal processing circuit comprises a capacitance detection circuit and a micro-control processor. The topology identification receiving module uses the TMC magnetic sensing chip, the TMC effect is larger than the TMR effect under the same condition, and higher sensitivity is realized.
Description
Technical Field
The invention belongs to the technical field of current sensing, and particularly relates to a topology identification receiving module for characteristic current signal identification.
Background
The low-voltage transformer area topology identification is an important link for the construction of the intelligent power grid. Because the low-voltage distribution area has a complex circuit structure and large electricity consumption, distribution area files are incomplete, table-changing information is not updated timely, management investment is insufficient, and the like, the reliability of the topological relation of the low-voltage distribution area cannot be ensured. Therefore, topology identification technology is required to be introduced into the low-voltage transformer area to check and correct the existing transformer area topological relation. The existing power distribution area identification technology mainly comprises a data correlation analysis identification technology, a power line carrier voltage injection identification technology and a pulse current input identification technology. The characteristic signals of the data correlation analysis and identification technology are not controllable, and the branch nodes of the topology cannot be identified by the power line carrier voltage injection identification technology, so that the existing low-voltage distribution area topology identification mainly adopts the pulse current injection identification technology.
The pulse current injection identification is mainly realized by a topology signal injection module and a topology identification receiving module. The topology signal injection module is used for injecting a characteristic current signal (pulse current) into the line, and the topology identification receiving module is used for carrying out topology identification according to the characteristic current signal in the line. The topology identification receiving module comprises a Rogowski coil-based topology identification receiving module and a magnetic sensing chip-based topology identification receiving module. The topology identification receiving module based on the Rogowski coil is characterized in that when a pulse single-current signal flows through the primary side of the topology identification receiving module according to the electromagnetic induction principle, the current wound in the secondary side winding of the hollow magnetic gathering ring is in direct proportion to the measured current of the primary side, and the information of the pulse current is restored by processing and analyzing the current signal of the secondary side so as to judge the topology structure. Compared with a mutual inductor, the Rogowski coil has no magnetic core saturation phenomenon, high bandwidth and low cost, but has lower sensitivity due to the lack of a magnetic core with high magnetic conductivity.
The topology identification receiving module based on the TMR magnetic sensing chip detects a pulse current signal on the primary side through the TMR magnetic sensing chip and converts the pulse current signal into a differential voltage signal to be output; and the pulse current information is restored by processing the signal output by the TMR magnetic sensing chip, and the judgment of the topological structure is carried out. In a topology identification system, a topology signal injection module is required to have lower power consumption, so that the injected topology signal (pulse current) is generally smaller, which requires that a magnetic sensing chip used by a topology identification receiving module has higher sensitivity, and the preparation of a TMR magnetic sensing chip with high sensitivity increases the cost of the topology identification receiving module.
Disclosure of Invention
The invention aims to provide a high-sensitivity and low-cost TMC topology identification receiving module for identifying the low-voltage station zone topology.
In order to achieve the purpose, the invention adopts the following technical solutions:
a topology identification reception module comprising: the magnetic-field-focusing circuit comprises a magnetic-field-focusing ring, a magnetic sensing chip arranged at the notch or the opening of the magnetic-field-focusing ring and a signal processing circuit connected with the magnetic sensing chip; the magnetic sensing chip comprises a measuring capacitor and a reference capacitor, wherein the measuring capacitor is formed by connecting a plurality of measuring magnetic capacitor elements in parallel, the measuring magnetic capacitor elements sequentially comprise a lower electrode layer, a pinning layer, a first insulating layer, a free layer and an upper electrode layer from bottom to top, the magnetization direction of the pinning layer of the measuring magnetic capacitor element is unchanged, and the magnetization direction of the free layer of the measuring magnetic capacitor element is changed along with an external magnetic field; the reference capacitor is formed by connecting a plurality of reference magnetic capacitor elements in parallel, the reference magnetic capacitor elements sequentially comprise a lower electrode layer, a pinning layer, a first insulating layer, a free layer, an upper electrode layer, a second insulating layer and a magnetic shielding layer from bottom to top, and the magnetization directions of the free layer and the pinning layer of the reference magnetic capacitor elements are unchanged; the signal processing circuit comprises a capacitance detection circuit and a micro-control processor connected with the capacitance detection circuit. The capacitance detection circuit is used for acquiring the capacitance value of the measurement capacitor and outputting the result to the micro-control processor; and the micro-control processor is used for carrying out topology identification according to the result output by the capacitance detection circuit.
Further, a ratio of a difference between the capacitance value of the measurement capacitance and the capacitance value of the reference capacitance to the capacitance value of the reference capacitance is less than 1/4.
Furthermore, the two sides of the measuring capacitor are symmetrically provided with magnetic gathering layers.
Furthermore, the reference capacitor is arranged beside the measurement capacitor, the magnetic gathering layer on one side of the measurement capacitor is a measurement shielding layer of the reference capacitor, and the magnetic shielding layer is made of a magnetic conductive material.
Further, the capacitance detection circuit includes: the device comprises a double-channel analog switch, a reverse trigger and a capacitance measuring chip, wherein a common end of the double-channel analog switch is connected with the reverse trigger, and a control end of the double-channel analog switch is connected with the capacitance measuring chip and is controlled by a sequencer in the capacitance measuring chip; a first channel in the two-channel analog switch is connected with the reference capacitor, and a second channel is connected with the measurement capacitor; the common end of the two-channel analog switch is also connected with a charging pin and a discharging pin of the capacitance measuring chip respectively; the direction trigger is connected with a TDC measuring unit in the capacitance measuring chip; and the capacitance measuring chip outputs a result to the micro-control processor.
Furthermore, the common end of the double-channel analog switch is connected with the charging pin and the discharging pin of the capacitance measuring chip through a charging resistor and a discharging resistor respectively.
Further, the micro-control processor comprises a phase-locked amplifier for performing phase-locked amplification on the result output by the capacitance detection circuit and filtering and extracting the amplitude of the signal with the same preset receiving frequency
Furthermore, the maximum sensitivity gain frequency point of the magnetic sensing chip is the same as the frequency of the injected characteristic current.
Further, the preset receiving frequency of the topology identification receiving module is the same as the frequency of the injected characteristic current.
According to the technical scheme, the topology identification receiving module uses the TMC magnetic sensing chip to detect the change of the capacitance of the MTJ element, the capacitance detection circuit acquires the capacitance value detected by the TMC magnetic sensing chip, the micro-control processor performs phase-locked amplification on the signal output by the capacitance detection circuit according to the preset frequency to obtain a frequency-selecting signal with the same frequency as the preset frequency, and the pulse current signal with the same frequency as the preset frequency can be extracted and received and distinguished by analyzing the frequency-selecting signal output by the phase-locked amplifier. Compared with a Rogowski coil type pulse current receiving module, the TMC magnetic sensing chip has higher sensitivity due to the use of the TMC magnetic sensing chip, and compared with the TMC magnetic sensing chip with the same structure and material formula, the TMC magnetic sensing chip has the characteristic of high sensitivity at a specific frequency point, and can realize higher sensitivity at lower cost.
Drawings
In order to illustrate the embodiments of the present invention more clearly, the drawings that are needed in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings can be obtained by those skilled in the art without inventive effort.
FIG. 1 is a schematic structural diagram of an embodiment of the present invention;
FIG. 2 is a schematic diagram of a magnetic capacitance element according to an embodiment of the present invention;
FIG. 3 is a schematic structural diagram of a capacitor device according to an embodiment of the present invention;
fig. 4 is a plan view of the TMC magnetic sensor chip of the present embodiment;
FIG. 5 is a diagram illustrating a process for fabricating a reference magnetic capacitor device according to the present embodiment;
fig. 6 is a graph of capacitance values and a graph of resistance values of the TMC magnetic sensor chip and the TMR magnetic sensor chip under the action of a magnetic field;
FIG. 7 is a graph of TMC effect characteristics for different spin polarizabilities P;
FIG. 8 is a graph of TMC values versus frequency for different relaxation times;
FIG. 9 is a circuit diagram of a capacitance detection circuit;
FIG. 10 is a block diagram of a signal processing circuit;
fig. 11 is a schematic diagram of a quadrature phase-locked amplifier.
The following describes embodiments of the present invention in further detail with reference to the accompanying drawings.
Detailed Description
The invention will be described in detail below with reference to the accompanying drawings, wherein for the purpose of illustrating embodiments of the invention, the drawings showing the structure of the device are not to scale but are partly enlarged, and the schematic drawings are only examples, and should not be construed as limiting the scope of the invention. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is provided solely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
As shown in fig. 1, the topology identification receiving module of the present embodiment includes a magnetic focusing ring 1, a magnetic sensing chip 2, a signal processing circuit 3, an input/output terminal 4 and a housing 5, wherein the magnetic focusing ring 1, the magnetic sensing chip 2, the signal processing circuit 3 and the input/output terminal 4 are all disposed in the housing 5. The shell 5 of this embodiment is an open-close type structure, and includes an upper shell 5-1 and a lower shell 5-2, where the upper shell 5-1 is a semicircular ring and is hinged to the lower shell 5-2, when the upper shell 5-1 rotates, the upper shell 5-1 and the lower shell 5-2 can be opened and closed, when the upper shell 5-1 and the lower shell 5-2 are closed, a through hole 5a for the tested conductor 6 to pass through is formed therebetween, and the shell 5 (receiving module) can be conveniently sleeved on the periphery of the tested conductor 6 by rotating the upper shell 5-1 to perform current signal detection.
The magnetic focusing ring 1 of the present embodiment includes 3 arc-shaped iron cores enclosing into a circular ring shape, and may form a receiving module with an annular opening and closing structure. The magnetism gathering ring 1 can be made of silicon steel sheets, permalloy, nanocrystalline and other magnetic materials. A notch 1a is arranged on the magnetism-gathering ring 1, and the magnetic sensing chip 2 is arranged at the notch 1a (or opening) of the magnetism-gathering ring 1. The magnetic sensing chip 2 is used for magnetic field detection, and the magnetic sensitivity direction of the magnetic sensing chip 2 is perpendicular to the detected conductor 6. The magnetic sensing chip 2 is connected with the signal processing circuit 3 through pins or wires. The signal processing circuit 3 is disposed on a circuit board, and the circuit board is provided with an input/output terminal 4, and the input/output terminal 4 is used for power supply and communication.
The magnetic sensing chip of this embodiment is a TMC (Tunneling magnetic capacitance) magnetic sensing chip. The TMC magnetic sensing chip is different from the traditional TMR magnetic sensing chip mainly in that an MJT element (a magnetic tunnel junction element) or an MJT array is connected into a bridge circuit structure for magnetic field sensing, and the TMC magnetic sensing chip of the invention forms a capacitor circuit by connecting the MTJ element or the MJT array in parallel for magnetic field sensing. The TMC magnetic sensing chip comprises a measuring capacitor Cm and a reference capacitor Cr, wherein the measuring capacitor Cm is formed by connecting a plurality of measuring magnetic capacitor elements in parallel, and the reference capacitor Cr is formed by connecting a plurality of reference magnetic capacitor elements in parallel. The number of the measurement magnetic capacitor elements and the reference magnetic capacitor elements is not limited, and can be adjusted according to the required capacitance value. The reference capacitor Cr and the measurement capacitor Cm are independent of each other, the capacitance value of the reference capacitor Cr and the capacitance value of the measurement capacitor Cm may be different, and optionally, the ratio of the difference between the capacitance value of the measurement capacitor Cm and the capacitance value of the reference capacitor Cr to the capacitance value of the reference capacitor Cr is smaller than 1/4, so as to improve the precision of the measurement result.
As shown in fig. 2, the magnetic capacitance element (MTJ) includes, from bottom to top, a lower electrode layer 7, a pinned layer 8, a first insulating layer 9, a free layer 10, and an upper electrode layer 11. The free layer 10 is made of a ferromagnetic material, and the magnetization direction of the free layer 10 is changed according to an external magnetic field. The pinned layer 8 is composed of a magnetic layer whose magnetization direction is fixed and an antiferromagnetic layer (not shown), the magnetization direction of the pinned layer 8 is pinned in a fixed direction, and the magnetization direction of the pinned layer 8 does not change with an external magnetic field. When an external magnetic field is applied, the magnetization direction of the free layer 10 of the measurement magneto-capacitance element approaches the external magnetic field direction, and the capacitance value of the measurement magneto-capacitance element changes as the angle between the magnetization directions of the pinned layer 8 and the free layer 10 changes.
As shown in fig. 3, the reference magnetic capacitor element includes, in order from bottom to top, a lower electrode layer 7, a pinning layer 8, a first insulating layer 9, a free layer 10, an upper electrode layer 11, a second insulating layer 12, and a magnetic shield layer 13. The reference magnetic capacitance element and the measurement magnetic capacitance element differ in that: the reference magnetic capacitor element has a second insulating layer 12 and a magnetic shield layer 13. The magnetic shielding layer 13 is used for shielding an external magnetic field, and the magnetic shielding layer 13 on the second insulating layer 12 can keep the magnetization direction of the free layer 10 of the reference magnetic capacitance element unchanged, so that the capacitance value of the reference magnetic capacitance element is not changed by the external magnetic field. Magnetic shielding layer 13 adopts magnetic conductive material such as ferronickel to make, and magnetic shielding layer 13 except can shielding the MTJ that is located its below not influenced by external magnetic field, can also constitute a magnetic flux collector between two adjacent magnetic shielding layers, plays the effect of amplifying the magnetic field, helps promoting TMC magnetic sensing chip's sensitivity. The MTJ located between the two shield layers is analogous to a TMR chip placed in the core gap.
A plurality of measuring magnetic capacitance elements a are connected in parallel to form a group of measuring capacitance Cm, and a plurality of reference magnetic capacitance elements b are connected in parallel to form a group of reference capacitance Cr. As shown in fig. 4, the present embodiment provides two sets of measuring capacitors Cm and two sets of reference capacitors Cr, which are located outside the two sets of measuring capacitors Cm. The measuring capacitor Cm is connected to the signal processing circuit through a pair of measuring capacitor external pads 14, and the reference capacitor Cr is connected to the signal processing circuit through four reference capacitor external pads 15. Preferably, in order to improve the magnetic field sensing sensitivity, the magnetic focusing layers 16 are symmetrically arranged on both sides of each group of measuring capacitors Cm in the present embodiment for forming uniform magnetic lines of force, which is beneficial to magnetic field sensing. Because the magnetic shielding layer 13 of the reference capacitor Cr can play a role of magnetic concentration, the reference capacitor Cr is positioned at the side of the measurement capacitor Cm, and the magnetic shielding layer 13 of the reference capacitor Cr can be used as a magnetic concentration layer 16 to be matched with the magnetic concentration layer 16 positioned at the other side of the measurement capacitor Cm to form a magnetic concentration effect.
The reference magnetic capacitor element was prepared as follows: 1) sputtering and depositing a film stack on a wafer according to a TMC chip material formula; 2) etching according to the layout shown in a in FIG. 5 to obtain a lower electrode layer; 3) etching according to the layout shown in b in FIG. 5 to obtain a pinning layer; 4) sputtering and depositing a first insulating material (SIO2), and etching according to the layout shown in c in FIG. 5 to form a first insulating layer; 5) sputtering and depositing an upper electrode material (Au), and etching according to the layout shown by d in the figure 5 to obtain an upper electrode layer; 6) sputtering and depositing magnetic shielding material (NiFe), etching according to the layout shown by e in figure 5 to obtain a magnetic shielding layer, finally obtaining crystal grains shown by f in figure 5, and carrying out routing packaging. The manufacturing process of the magnetic capacitance element is similar, except that the magnetic capacitance element does not need to manufacture a second insulating layer and a magnetic shielding layer, and the manufacturing process of the magnetic capacitance element can be referred to.
Fig. 6 is a graph of capacitance value (TMC) and a graph of resistance value (TMR) of the TMC magnetic sensor chip of the present invention and the conventional TMR magnetic sensor chip under the action of an external magnetic field. The higher the TMC value or TMR value of the magnetic sensor chip is, the higher the sensitivity of the magnetic sensor chip (capacitance value or resistance value) to a magnetic field is. As can be seen from fig. 6, the TMC magnetic sensor chip and the TMR magnetic sensor chip composed of MTJs made based on the same layer structure and formulation have a greater TMC value (TMC effect) than a TMR value (TMR effect) at the same spin polarization ratio P, and become more significant as the spin polarization ratio P increases. Therefore, under the same structure and formula, the capacitance value variation at two ends of the MTJ element is larger than the resistance value variation for the same MTJ element, that is, under the same process and material formula, a magnetic field sensor chip with higher sensitivity can be obtained by using the TMC effect.
Fig. 7 is a characteristic diagram of TMC effect of different spin polarization rates P, and it can be seen from fig. 7 that the TMC effect frequency characteristics of different spin polarization rates P are the same, and the TMC effect reaches the maximum value at a certain frequency point. That is, the TMC magnetic sensing chip has different sensitivities at different frequencies, so that the frequency of the characteristic current to be injected into the line can be set at the specific frequency point to achieve the highest sensitivity, and the preset receiving frequency of the topology identification receiving module is consistent with the frequency of the characteristic current.
Figure 8 is a graph of TMC values versus frequency for different relaxation times (Tp). The maximum frequency point of the TMC effect can be adjusted by adjusting the relaxation time Tp, so that an expected pulse current injection frequency point is obtained.
The signal processing circuit of the embodiment comprises a capacitance detection circuit and a micro control processor, wherein a measurement capacitor and a reference capacitor in the TMC magnetic sensing chip are connected with the micro control processor through the capacitance detection circuit. Fig. 9 is a circuit diagram of the capacitance detection circuit, Cr in fig. 9 denotes a reference capacitance in the TMC magnetic sensor chip, and Cm denotes a measurement capacitance in the TMC magnetic sensor chip. The capacitance detection circuit comprises a dual-channel analog switch S, a reverse trigger U1 and a capacitance measurement chip U2, wherein the capacitance measurement chip U2 of the embodiment adopts a capacitance measurement chip with the model number PS021 of the Germany ACAM company. The TDC measuring unit in the capacitance measuring chip U2 is used for measuring the capacitance discharge time, two MOS tubes are used for controlling a discharge loop, and a sequence generator is used for generating a pulse square wave to control the conduction of the two-channel analog switch. The same type of capacitance measurement chip may be used in place of PS210 in other embodiments. The common end of the double-channel analog switch S is connected with the reverse trigger U1, the control end is connected with the capacitance measuring chip U2 and is controlled by a sequence in the capacitance measuring chip U2. A first channel S1 of the two-channel analog switch S is connected with a reference capacitor Cr, and a second channel S2 is connected with a measurement capacitor Cm. The common terminal of the dual-channel analog switch S of this embodiment is also connected to the charging pin of the capacitance measuring chip U2 and the discharging pin of the capacitance measuring chip U2 through the charging resistor R and the discharging resistor Rd, respectively. The discharge resistor Rd and the charge resistor R serve to limit the current in the loop.
The principle of the capacitance detection circuit for measuring the capacitance value of the TMC magnetic sensing chip is as follows: vc is a power supply end of a power supply, and during measurement, the capacitance measurement chip controls the conduction or disconnection of different switches in the dual-channel analog switch in turn, so that the reference capacitance Cr and the measurement capacitance Cm are charged and discharged in turn. If the capacitance measuring chip controls the first switch S1 in the dual-channel analog switch to be switched on and the second switch S2 to be switched off, at the moment, the power supply charges the reference capacitor Cr, when the reference capacitor Cr is charged to the power supply voltage Vc, the charging stops, the trigger reverses, the reference capacitor Cr starts to discharge through the discharge resistor Rd, when the voltage of the reference capacitor Cr is reduced to the threshold voltage of the reverse trigger, the trigger reverses again, the reference capacitor Cr starts to be charged again, the reference capacitor Cr repeats the charging and discharging process in the measuring process, and the charging and discharging time of the reference capacitor is measured by the TDC measuring unit of the capacitance measuring chip.
Similarly, the capacitance measuring chip controls the first switch S1 in the dual-channel analog switch to be switched off, the second switch S2 is switched on, the measuring capacitor Cm also repeats the same capacitor charging and discharging process, and the charging and discharging time of the measuring capacitor Cm is measured by the capacitance detecting capacitor. The capacitance value of the reference capacitor Cr is known and does not change along with the external magnetic field, and after the capacitance measuring chip respectively collects the charging and discharging time of the measuring capacitor Cm and the reference capacitor Cr, the ratio of the measuring capacitor Cm to the reference capacitor Cr can be obtained, and the capacitance value of the measuring capacitor Cm can be calculated. The TMC magnetic sensing chip is equivalent to two capacitors, the charging and discharging time of the capacitors is related to the capacitance value, the charging and discharging time of the two capacitors is different, the repeated charging and discharging process of the measurement capacitor and the reference capacitor is controlled by the capacitor measurement chip, and the capacitor detection circuit can output and measure the charging and discharging time of the capacitors.
As shown in fig. 10, the capacitance detection circuit outputs the detection result to the micro control processor, and the micro control processor collects the measured capacitance change of the TMC magnetic sensing chip through the capacitance detection circuit. The microprocessor controller of this embodiment includes a lock-in amplifier, the lock-in amplifier is used to filter out other frequency signals except the preset receiving frequency, and the (voltage) signal output by the lock-in amplifier reflects the strength of the same frequency part of the input signal of the lock-in amplifier and the preset frequency. The micro-control processor can directly judge whether the input signals contain signals with the same frequency as the topological frequency (preset frequency) according to the output of the phase-locked amplifier, namely, the micro-control processor performs phase-locked amplification on the digital signals output by the capacitance detection circuit, extracts the magnetic field amplitude value R near the preset receiving frequency, realizes the analysis and verification of the topological identification characteristic current, and the analysis and verification of the topological identification characteristic current according to the magnetic field amplitude value R of the signals are conventional technologies in the field.
The working principle of the present embodiment is described below with reference to fig. 1, 10, and 11:
as shown in fig. 1, 10 and 11, when receiving a pulse current signal, the topology identification receiving module passes the conductor 6 to be tested through the through hole of the housing 5, and when the master station starts topology identification, the topology signal injection module injects a characteristic pulse current signal into the conductor 6, and a magnetic field a is generated around the conductor 6 to be tested;
the TMC magnetic sensing chip 2 detects the magnetic field at the notch 1a of the magnetic gathering ring 1, and the capacitance detection circuit detects and outputs a digital signal V containing fundamental wave (characteristic pulse current signal) and carrier wave characteristics M (ii) a In the process of detecting the magnetic field by the TMC magnetic sensor chip 2, the capacitance measuring chip in the capacitance detection circuit samples and outputs the capacitance value at a fixed sampling rate (generally, ten times or more of the fundamental frequency), and the digital signal V output by the capacitance measuring chip is output M The signal is a discrete digital signal sequence, and the signal can be distinguished by performing phase-locked amplification or Fourier analysis on the discrete digital signal sequence by the micro-control processor;
digital signal V output by capacitance detection circuit M The (discrete digital signal sequence) carries fundamental wave and carrier wave characteristics, and the micro-control processor reads the digital signal V output by the capacitance detection circuit through the SPI bus M Phase-locked amplifier slave V M The amplitude value R of a signal with the same preset receiving frequency as that of the topology identification receiving module is extracted, when the preset receiving frequency is the same as that of the characteristic pulse current signal, the output R of the orthogonal phase-locked amplifier is not 0, so that the topology pulse current signal can be judged, the process of judging the signal according to the discrete digital signal sequence is the same as the process of judging the signal according to the digital signal of the conventional topology identification receiving module using the TMR sensing chip, the principle is consistent, the method is not an innovative point of the invention, and the innovation point is not described in detail.
The topology identification receiving module uses the TMC magnetic sensing chip comprising the capacitance circuit consisting of the MTJ element, and because the TMC effect is larger than the TMR effect under the same condition, the topology identification receiving module can realize higher sensitivity and reduce the cost of the high-sensitivity magnetic sensing chip. And the TMC magnetic sensing chip has the maximum sensitivity at a certain specific frequency and has different degrees of inhibition on other frequency signals, so when the maximum sensitivity gain frequency point of the TMC magnetic sensing chip is taken as the frequency of the injection pulse current, the TMC magnetic sensing chip can inhibit the interference signals of other frequencies.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (9)
1. A topology identification reception module comprising: the magnetic-field-focusing circuit comprises a magnetic-field-focusing ring, a magnetic sensing chip arranged at the notch or the opening of the magnetic-field-focusing ring and a signal processing circuit connected with the magnetic sensing chip;
the method is characterized in that:
the magnetic sensor chip comprises a measurement capacitance and a reference capacitance, wherein,
the measurement capacitor is formed by connecting a plurality of measurement magnetic capacitor elements in parallel, the measurement magnetic capacitor elements sequentially comprise a lower electrode layer, a pinning layer, a first insulating layer, a free layer and an upper electrode layer from bottom to top, the magnetization direction of the pinning layer of the measurement magnetic capacitor elements is unchanged, and the magnetization direction of the free layer of the measurement magnetic capacitor elements is changed along with an external magnetic field;
the reference capacitor is formed by connecting a plurality of reference magnetic capacitor elements in parallel, the reference magnetic capacitor elements sequentially comprise a lower electrode layer, a pinning layer, a first insulating layer, a free layer, an upper electrode layer, a second insulating layer and a magnetic shielding layer from bottom to top, and the magnetization directions of the free layer and the pinning layer of the reference magnetic capacitor elements are unchanged;
the signal processing circuit comprises a capacitance detection circuit for acquiring the capacitance value of the measurement capacitor and a micro-control processor connected with the capacitance detection circuit.
2. The topology identification reception module of claim 1, wherein: the ratio of the difference between the capacitance value of the measurement capacitance and the capacitance value of the reference capacitance to the capacitance value of the reference capacitance is less than 1/4.
3. The topology identification reception module of claim 1, wherein: and the two sides of the measuring capacitor are symmetrically provided with magnetic gathering layers.
4. The topology identification reception module of claim 3, wherein: the reference capacitor is arranged beside the measuring capacitor, the magnetism gathering layer on one side of the measuring capacitor is a measuring shielding layer of the reference capacitor, and the magnetic shielding layer is made of a magnetic conducting material.
5. The topology identification reception module of claim 1, wherein: the capacitance detection circuit includes: the device comprises a double-channel analog switch, a reverse trigger and a capacitance measuring chip, wherein a common end of the double-channel analog switch is connected with the reverse trigger, and a control end of the double-channel analog switch is connected with the capacitance measuring chip and is controlled by a sequencer in the capacitance measuring chip; a first channel in the dual-channel analog switch is connected with the reference capacitor, and a second channel is connected with the measurement capacitor; the common end of the two-channel analog switch is also connected with a charging pin and a discharging pin of the capacitance measuring chip respectively; the direction trigger is connected with a TDC measuring unit in the capacitance measuring chip; and the capacitance measuring chip outputs a result to the micro-control processor.
6. The topology identification reception module of claim 5, wherein: and the common end of the double-channel analog switch is connected with the charging pin and the discharging pin of the capacitance measuring chip through the charging resistor and the discharging resistor respectively.
7. The topology identification reception module of claim 1, wherein: the micro-control processor comprises a phase-locked amplifier which is used for performing phase-locked amplification on a result output by the capacitance detection circuit and filtering and extracting the amplitude of a signal with the same preset receiving frequency.
8. The topology identification reception module of claim 1, wherein: the maximum sensitivity gain frequency point of the magnetic sensing chip is the same as the frequency of the injected characteristic current.
9. The topology identification reception module of claim 1, wherein: the preset receiving frequency of the topology identification receiving module is the same as the frequency of the injected characteristic current.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202210394685.7A CN114895093A (en) | 2022-04-14 | 2022-04-14 | Topology identification receiving module |
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| CN115808588A (en) * | 2023-01-18 | 2023-03-17 | 辽宁汉华信息工程有限公司 | Pulse characteristic signal platform area topology identification method based on Rogowski coil |
| CN115808588B (en) * | 2023-01-18 | 2023-05-05 | 辽宁汉华信息工程有限公司 | Pulse characteristic signal area topology identification method based on rogowski coil |
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